1/* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 3 1999, 2000, 2001, 2002 Free Software Foundation, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING. If not, write to the Free 19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 20 02111-1307, USA. */ 21 22/* This pass converts stack-like registers from the "flat register 23 file" model that gcc uses, to a stack convention that the 387 uses. 24 25 * The form of the input: 26 27 On input, the function consists of insn that have had their 28 registers fully allocated to a set of "virtual" registers. Note that 29 the word "virtual" is used differently here than elsewhere in gcc: for 30 each virtual stack reg, there is a hard reg, but the mapping between 31 them is not known until this pass is run. On output, hard register 32 numbers have been substituted, and various pop and exchange insns have 33 been emitted. The hard register numbers and the virtual register 34 numbers completely overlap - before this pass, all stack register 35 numbers are virtual, and afterward they are all hard. 36 37 The virtual registers can be manipulated normally by gcc, and their 38 semantics are the same as for normal registers. After the hard 39 register numbers are substituted, the semantics of an insn containing 40 stack-like regs are not the same as for an insn with normal regs: for 41 instance, it is not safe to delete an insn that appears to be a no-op 42 move. In general, no insn containing hard regs should be changed 43 after this pass is done. 44 45 * The form of the output: 46 47 After this pass, hard register numbers represent the distance from 48 the current top of stack to the desired register. A reference to 49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 50 represents the register just below that, and so forth. Also, REG_DEAD 51 notes indicate whether or not a stack register should be popped. 52 53 A "swap" insn looks like a parallel of two patterns, where each 54 pattern is a SET: one sets A to B, the other B to A. 55 56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 58 will replace the existing stack top, not push a new value. 59 60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 61 SET_SRC is REG or MEM. 62 63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 64 appears ambiguous. As a special case, the presence of a REG_DEAD note 65 for FIRST_STACK_REG differentiates between a load insn and a pop. 66 67 If a REG_DEAD is present, the insn represents a "pop" that discards 68 the top of the register stack. If there is no REG_DEAD note, then the 69 insn represents a "dup" or a push of the current top of stack onto the 70 stack. 71 72 * Methodology: 73 74 Existing REG_DEAD and REG_UNUSED notes for stack registers are 75 deleted and recreated from scratch. REG_DEAD is never created for a 76 SET_DEST, only REG_UNUSED. 77 78 * asm_operands: 79 80 There are several rules on the usage of stack-like regs in 81 asm_operands insns. These rules apply only to the operands that are 82 stack-like regs: 83 84 1. Given a set of input regs that die in an asm_operands, it is 85 necessary to know which are implicitly popped by the asm, and 86 which must be explicitly popped by gcc. 87 88 An input reg that is implicitly popped by the asm must be 89 explicitly clobbered, unless it is constrained to match an 90 output operand. 91 92 2. For any input reg that is implicitly popped by an asm, it is 93 necessary to know how to adjust the stack to compensate for the pop. 94 If any non-popped input is closer to the top of the reg-stack than 95 the implicitly popped reg, it would not be possible to know what the 96 stack looked like - it's not clear how the rest of the stack "slides 97 up". 98 99 All implicitly popped input regs must be closer to the top of 100 the reg-stack than any input that is not implicitly popped. 101 102 3. It is possible that if an input dies in an insn, reload might 103 use the input reg for an output reload. Consider this example: 104 105 asm ("foo" : "=t" (a) : "f" (b)); 106 107 This asm says that input B is not popped by the asm, and that 108 the asm pushes a result onto the reg-stack, ie, the stack is one 109 deeper after the asm than it was before. But, it is possible that 110 reload will think that it can use the same reg for both the input and 111 the output, if input B dies in this insn. 112 113 If any input operand uses the "f" constraint, all output reg 114 constraints must use the "&" earlyclobber. 115 116 The asm above would be written as 117 118 asm ("foo" : "=&t" (a) : "f" (b)); 119 120 4. Some operands need to be in particular places on the stack. All 121 output operands fall in this category - there is no other way to 122 know which regs the outputs appear in unless the user indicates 123 this in the constraints. 124 125 Output operands must specifically indicate which reg an output 126 appears in after an asm. "=f" is not allowed: the operand 127 constraints must select a class with a single reg. 128 129 5. Output operands may not be "inserted" between existing stack regs. 130 Since no 387 opcode uses a read/write operand, all output operands 131 are dead before the asm_operands, and are pushed by the asm_operands. 132 It makes no sense to push anywhere but the top of the reg-stack. 133 134 Output operands must start at the top of the reg-stack: output 135 operands may not "skip" a reg. 136 137 6. Some asm statements may need extra stack space for internal 138 calculations. This can be guaranteed by clobbering stack registers 139 unrelated to the inputs and outputs. 140 141 Here are a couple of reasonable asms to want to write. This asm 142 takes one input, which is internally popped, and produces two outputs. 143 144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 145 146 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 147 and replaces them with one output. The user must code the "st(1)" 148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 149 150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 151 152*/ 153 154#include "config.h" 155#include "system.h" 156#include "tree.h" 157#include "rtl.h" 158#include "tm_p.h" 159#include "function.h" 160#include "insn-config.h" 161#include "regs.h" 162#include "hard-reg-set.h" 163#include "flags.h" 164#include "toplev.h" 165#include "recog.h" 166#include "output.h" 167#include "basic-block.h" 168#include "varray.h" 169#include "reload.h" 170#include "ggc.h" 171 172/* We use this array to cache info about insns, because otherwise we 173 spend too much time in stack_regs_mentioned_p. 174 175 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 176 the insn uses stack registers, two indicates the insn does not use 177 stack registers. */ 178static GTY(()) varray_type stack_regs_mentioned_data; 179 180#ifdef STACK_REGS 181 182#define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 183 184/* This is the basic stack record. TOP is an index into REG[] such 185 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 186 187 If TOP is -2, REG[] is not yet initialized. Stack initialization 188 consists of placing each live reg in array `reg' and setting `top' 189 appropriately. 190 191 REG_SET indicates which registers are live. */ 192 193typedef struct stack_def 194{ 195 int top; /* index to top stack element */ 196 HARD_REG_SET reg_set; /* set of live registers */ 197 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 198} *stack; 199 200/* This is used to carry information about basic blocks. It is 201 attached to the AUX field of the standard CFG block. */ 202 203typedef struct block_info_def 204{ 205 struct stack_def stack_in; /* Input stack configuration. */ 206 struct stack_def stack_out; /* Output stack configuration. */ 207 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 208 int done; /* True if block already converted. */ 209 int predecessors; /* Number of predecessors that needs 210 to be visited. */ 211} *block_info; 212 213#define BLOCK_INFO(B) ((block_info) (B)->aux) 214 215/* Passed to change_stack to indicate where to emit insns. */ 216enum emit_where 217{ 218 EMIT_AFTER, 219 EMIT_BEFORE 220}; 221 222/* The block we're currently working on. */ 223static basic_block current_block; 224 225/* This is the register file for all register after conversion. */ 226static rtx 227 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 228 229#define FP_MODE_REG(regno,mode) \ 230 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 231 232/* Used to initialize uninitialized registers. */ 233static rtx nan; 234 235/* Forward declarations */ 236 237static int stack_regs_mentioned_p PARAMS ((rtx pat)); 238static void straighten_stack PARAMS ((rtx, stack)); 239static void pop_stack PARAMS ((stack, int)); 240static rtx *get_true_reg PARAMS ((rtx *)); 241 242static int check_asm_stack_operands PARAMS ((rtx)); 243static int get_asm_operand_n_inputs PARAMS ((rtx)); 244static rtx stack_result PARAMS ((tree)); 245static void replace_reg PARAMS ((rtx *, int)); 246static void remove_regno_note PARAMS ((rtx, enum reg_note, 247 unsigned int)); 248static int get_hard_regnum PARAMS ((stack, rtx)); 249static rtx emit_pop_insn PARAMS ((rtx, stack, rtx, 250 enum emit_where)); 251static void emit_swap_insn PARAMS ((rtx, stack, rtx)); 252static bool move_for_stack_reg PARAMS ((rtx, stack, rtx)); 253static int swap_rtx_condition_1 PARAMS ((rtx)); 254static int swap_rtx_condition PARAMS ((rtx)); 255static void compare_for_stack_reg PARAMS ((rtx, stack, rtx)); 256static bool subst_stack_regs_pat PARAMS ((rtx, stack, rtx)); 257static void subst_asm_stack_regs PARAMS ((rtx, stack)); 258static bool subst_stack_regs PARAMS ((rtx, stack)); 259static void change_stack PARAMS ((rtx, stack, stack, 260 enum emit_where)); 261static int convert_regs_entry PARAMS ((void)); 262static void convert_regs_exit PARAMS ((void)); 263static int convert_regs_1 PARAMS ((FILE *, basic_block)); 264static int convert_regs_2 PARAMS ((FILE *, basic_block)); 265static int convert_regs PARAMS ((FILE *)); 266static void print_stack PARAMS ((FILE *, stack)); 267static rtx next_flags_user PARAMS ((rtx)); 268static void record_label_references PARAMS ((rtx, rtx)); 269static bool compensate_edge PARAMS ((edge, FILE *)); 270 271/* Return nonzero if any stack register is mentioned somewhere within PAT. */ 272 273static int 274stack_regs_mentioned_p (pat) 275 rtx pat; 276{ 277 const char *fmt; 278 int i; 279 280 if (STACK_REG_P (pat)) 281 return 1; 282 283 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 284 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 285 { 286 if (fmt[i] == 'E') 287 { 288 int j; 289 290 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 291 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 292 return 1; 293 } 294 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 295 return 1; 296 } 297 298 return 0; 299} 300 301/* Return nonzero if INSN mentions stacked registers, else return zero. */ 302 303int 304stack_regs_mentioned (insn) 305 rtx insn; 306{ 307 unsigned int uid, max; 308 int test; 309 310 if (! INSN_P (insn) || !stack_regs_mentioned_data) 311 return 0; 312 313 uid = INSN_UID (insn); 314 max = VARRAY_SIZE (stack_regs_mentioned_data); 315 if (uid >= max) 316 { 317 /* Allocate some extra size to avoid too many reallocs, but 318 do not grow too quickly. */ 319 max = uid + uid / 20; 320 VARRAY_GROW (stack_regs_mentioned_data, max); 321 } 322 323 test = VARRAY_CHAR (stack_regs_mentioned_data, uid); 324 if (test == 0) 325 { 326 /* This insn has yet to be examined. Do so now. */ 327 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 328 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test; 329 } 330 331 return test == 1; 332} 333 334static rtx ix86_flags_rtx; 335 336static rtx 337next_flags_user (insn) 338 rtx insn; 339{ 340 /* Search forward looking for the first use of this value. 341 Stop at block boundaries. */ 342 343 while (insn != current_block->end) 344 { 345 insn = NEXT_INSN (insn); 346 347 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 348 return insn; 349 350 if (GET_CODE (insn) == CALL_INSN) 351 return NULL_RTX; 352 } 353 return NULL_RTX; 354} 355 356/* Reorganize the stack into ascending numbers, 357 after this insn. */ 358 359static void 360straighten_stack (insn, regstack) 361 rtx insn; 362 stack regstack; 363{ 364 struct stack_def temp_stack; 365 int top; 366 367 /* If there is only a single register on the stack, then the stack is 368 already in increasing order and no reorganization is needed. 369 370 Similarly if the stack is empty. */ 371 if (regstack->top <= 0) 372 return; 373 374 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 375 376 for (top = temp_stack.top = regstack->top; top >= 0; top--) 377 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 378 379 change_stack (insn, regstack, &temp_stack, EMIT_AFTER); 380} 381 382/* Pop a register from the stack. */ 383 384static void 385pop_stack (regstack, regno) 386 stack regstack; 387 int regno; 388{ 389 int top = regstack->top; 390 391 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 392 regstack->top--; 393 /* If regno was not at the top of stack then adjust stack. */ 394 if (regstack->reg [top] != regno) 395 { 396 int i; 397 for (i = regstack->top; i >= 0; i--) 398 if (regstack->reg [i] == regno) 399 { 400 int j; 401 for (j = i; j < top; j++) 402 regstack->reg [j] = regstack->reg [j + 1]; 403 break; 404 } 405 } 406} 407 408/* Convert register usage from "flat" register file usage to a "stack 409 register file. FIRST is the first insn in the function, FILE is the 410 dump file, if used. 411 412 Construct a CFG and run life analysis. Then convert each insn one 413 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 414 code duplication created when the converter inserts pop insns on 415 the edges. */ 416 417void 418reg_to_stack (first, file) 419 rtx first; 420 FILE *file; 421{ 422 basic_block bb; 423 int i; 424 int max_uid; 425 426 /* Clean up previous run. */ 427 stack_regs_mentioned_data = 0; 428 429 /* See if there is something to do. Flow analysis is quite 430 expensive so we might save some compilation time. */ 431 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 432 if (regs_ever_live[i]) 433 break; 434 if (i > LAST_STACK_REG) 435 return; 436 437 /* Ok, floating point instructions exist. If not optimizing, 438 build the CFG and run life analysis. */ 439 if (!optimize) 440 { 441 count_or_remove_death_notes (NULL, 1); 442 life_analysis (first, file, PROP_DEATH_NOTES); 443 } 444 mark_dfs_back_edges (); 445 446 /* Set up block info for each basic block. */ 447 alloc_aux_for_blocks (sizeof (struct block_info_def)); 448 FOR_EACH_BB_REVERSE (bb) 449 { 450 edge e; 451 for (e = bb->pred; e; e=e->pred_next) 452 if (!(e->flags & EDGE_DFS_BACK) 453 && e->src != ENTRY_BLOCK_PTR) 454 BLOCK_INFO (bb)->predecessors++; 455 } 456 457 /* Create the replacement registers up front. */ 458 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 459 { 460 enum machine_mode mode; 461 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 462 mode != VOIDmode; 463 mode = GET_MODE_WIDER_MODE (mode)) 464 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 465 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 466 mode != VOIDmode; 467 mode = GET_MODE_WIDER_MODE (mode)) 468 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 469 } 470 471 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 472 473 /* A QNaN for initializing uninitialized variables. 474 475 ??? We can't load from constant memory in PIC mode, because 476 we're insertting these instructions before the prologue and 477 the PIC register hasn't been set up. In that case, fall back 478 on zero, which we can get from `ldz'. */ 479 480 if (flag_pic) 481 nan = CONST0_RTX (SFmode); 482 else 483 { 484 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); 485 nan = force_const_mem (SFmode, nan); 486 } 487 488 /* Allocate a cache for stack_regs_mentioned. */ 489 max_uid = get_max_uid (); 490 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1, 491 "stack_regs_mentioned cache"); 492 493 convert_regs (file); 494 495 free_aux_for_blocks (); 496} 497 498/* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the 499 label's chain of references, and note which insn contains each 500 reference. */ 501 502static void 503record_label_references (insn, pat) 504 rtx insn, pat; 505{ 506 enum rtx_code code = GET_CODE (pat); 507 int i; 508 const char *fmt; 509 510 if (code == LABEL_REF) 511 { 512 rtx label = XEXP (pat, 0); 513 rtx ref; 514 515 if (GET_CODE (label) != CODE_LABEL) 516 abort (); 517 518 /* If this is an undefined label, LABEL_REFS (label) contains 519 garbage. */ 520 if (INSN_UID (label) == 0) 521 return; 522 523 /* Don't make a duplicate in the code_label's chain. */ 524 525 for (ref = LABEL_REFS (label); 526 ref && ref != label; 527 ref = LABEL_NEXTREF (ref)) 528 if (CONTAINING_INSN (ref) == insn) 529 return; 530 531 CONTAINING_INSN (pat) = insn; 532 LABEL_NEXTREF (pat) = LABEL_REFS (label); 533 LABEL_REFS (label) = pat; 534 535 return; 536 } 537 538 fmt = GET_RTX_FORMAT (code); 539 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 540 { 541 if (fmt[i] == 'e') 542 record_label_references (insn, XEXP (pat, i)); 543 if (fmt[i] == 'E') 544 { 545 int j; 546 for (j = 0; j < XVECLEN (pat, i); j++) 547 record_label_references (insn, XVECEXP (pat, i, j)); 548 } 549 } 550} 551 552/* Return a pointer to the REG expression within PAT. If PAT is not a 553 REG, possible enclosed by a conversion rtx, return the inner part of 554 PAT that stopped the search. */ 555 556static rtx * 557get_true_reg (pat) 558 rtx *pat; 559{ 560 for (;;) 561 switch (GET_CODE (*pat)) 562 { 563 case SUBREG: 564 /* Eliminate FP subregister accesses in favor of the 565 actual FP register in use. */ 566 { 567 rtx subreg; 568 if (FP_REG_P (subreg = SUBREG_REG (*pat))) 569 { 570 int regno_off = subreg_regno_offset (REGNO (subreg), 571 GET_MODE (subreg), 572 SUBREG_BYTE (*pat), 573 GET_MODE (*pat)); 574 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 575 GET_MODE (subreg)); 576 default: 577 return pat; 578 } 579 } 580 case FLOAT: 581 case FIX: 582 case FLOAT_EXTEND: 583 pat = & XEXP (*pat, 0); 584 } 585} 586 587/* Set if we find any malformed asms in a block. */ 588static bool any_malformed_asm; 589 590/* There are many rules that an asm statement for stack-like regs must 591 follow. Those rules are explained at the top of this file: the rule 592 numbers below refer to that explanation. */ 593 594static int 595check_asm_stack_operands (insn) 596 rtx insn; 597{ 598 int i; 599 int n_clobbers; 600 int malformed_asm = 0; 601 rtx body = PATTERN (insn); 602 603 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 604 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 605 int alt; 606 607 rtx *clobber_reg = 0; 608 int n_inputs, n_outputs; 609 610 /* Find out what the constraints require. If no constraint 611 alternative matches, this asm is malformed. */ 612 extract_insn (insn); 613 constrain_operands (1); 614 alt = which_alternative; 615 616 preprocess_constraints (); 617 618 n_inputs = get_asm_operand_n_inputs (body); 619 n_outputs = recog_data.n_operands - n_inputs; 620 621 if (alt < 0) 622 { 623 malformed_asm = 1; 624 /* Avoid further trouble with this insn. */ 625 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 626 return 0; 627 } 628 629 /* Strip SUBREGs here to make the following code simpler. */ 630 for (i = 0; i < recog_data.n_operands; i++) 631 if (GET_CODE (recog_data.operand[i]) == SUBREG 632 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) 633 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 634 635 /* Set up CLOBBER_REG. */ 636 637 n_clobbers = 0; 638 639 if (GET_CODE (body) == PARALLEL) 640 { 641 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx)); 642 643 for (i = 0; i < XVECLEN (body, 0); i++) 644 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 645 { 646 rtx clobber = XVECEXP (body, 0, i); 647 rtx reg = XEXP (clobber, 0); 648 649 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 650 reg = SUBREG_REG (reg); 651 652 if (STACK_REG_P (reg)) 653 { 654 clobber_reg[n_clobbers] = reg; 655 n_clobbers++; 656 } 657 } 658 } 659 660 /* Enforce rule #4: Output operands must specifically indicate which 661 reg an output appears in after an asm. "=f" is not allowed: the 662 operand constraints must select a class with a single reg. 663 664 Also enforce rule #5: Output operands must start at the top of 665 the reg-stack: output operands may not "skip" a reg. */ 666 667 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 668 for (i = 0; i < n_outputs; i++) 669 if (STACK_REG_P (recog_data.operand[i])) 670 { 671 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1) 672 { 673 error_for_asm (insn, "output constraint %d must specify a single register", i); 674 malformed_asm = 1; 675 } 676 else 677 { 678 int j; 679 680 for (j = 0; j < n_clobbers; j++) 681 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 682 { 683 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 684 i, reg_names [REGNO (clobber_reg[j])]); 685 malformed_asm = 1; 686 break; 687 } 688 if (j == n_clobbers) 689 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 690 } 691 } 692 693 694 /* Search for first non-popped reg. */ 695 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 696 if (! reg_used_as_output[i]) 697 break; 698 699 /* If there are any other popped regs, that's an error. */ 700 for (; i < LAST_STACK_REG + 1; i++) 701 if (reg_used_as_output[i]) 702 break; 703 704 if (i != LAST_STACK_REG + 1) 705 { 706 error_for_asm (insn, "output regs must be grouped at top of stack"); 707 malformed_asm = 1; 708 } 709 710 /* Enforce rule #2: All implicitly popped input regs must be closer 711 to the top of the reg-stack than any input that is not implicitly 712 popped. */ 713 714 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 715 for (i = n_outputs; i < n_outputs + n_inputs; i++) 716 if (STACK_REG_P (recog_data.operand[i])) 717 { 718 /* An input reg is implicitly popped if it is tied to an 719 output, or if there is a CLOBBER for it. */ 720 int j; 721 722 for (j = 0; j < n_clobbers; j++) 723 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 724 break; 725 726 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 727 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 728 } 729 730 /* Search for first non-popped reg. */ 731 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 732 if (! implicitly_dies[i]) 733 break; 734 735 /* If there are any other popped regs, that's an error. */ 736 for (; i < LAST_STACK_REG + 1; i++) 737 if (implicitly_dies[i]) 738 break; 739 740 if (i != LAST_STACK_REG + 1) 741 { 742 error_for_asm (insn, 743 "implicitly popped regs must be grouped at top of stack"); 744 malformed_asm = 1; 745 } 746 747 /* Enfore rule #3: If any input operand uses the "f" constraint, all 748 output constraints must use the "&" earlyclobber. 749 750 ??? Detect this more deterministically by having constrain_asm_operands 751 record any earlyclobber. */ 752 753 for (i = n_outputs; i < n_outputs + n_inputs; i++) 754 if (recog_op_alt[i][alt].matches == -1) 755 { 756 int j; 757 758 for (j = 0; j < n_outputs; j++) 759 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 760 { 761 error_for_asm (insn, 762 "output operand %d must use `&' constraint", j); 763 malformed_asm = 1; 764 } 765 } 766 767 if (malformed_asm) 768 { 769 /* Avoid further trouble with this insn. */ 770 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 771 any_malformed_asm = true; 772 return 0; 773 } 774 775 return 1; 776} 777 778/* Calculate the number of inputs and outputs in BODY, an 779 asm_operands. N_OPERANDS is the total number of operands, and 780 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 781 placed. */ 782 783static int 784get_asm_operand_n_inputs (body) 785 rtx body; 786{ 787 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) 788 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); 789 790 else if (GET_CODE (body) == ASM_OPERANDS) 791 return ASM_OPERANDS_INPUT_LENGTH (body); 792 793 else if (GET_CODE (body) == PARALLEL 794 && GET_CODE (XVECEXP (body, 0, 0)) == SET) 795 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); 796 797 else if (GET_CODE (body) == PARALLEL 798 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) 799 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); 800 801 abort (); 802} 803 804/* If current function returns its result in an fp stack register, 805 return the REG. Otherwise, return 0. */ 806 807static rtx 808stack_result (decl) 809 tree decl; 810{ 811 rtx result; 812 813 /* If the value is supposed to be returned in memory, then clearly 814 it is not returned in a stack register. */ 815 if (aggregate_value_p (DECL_RESULT (decl))) 816 return 0; 817 818 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 819 if (result != 0) 820 { 821#ifdef FUNCTION_OUTGOING_VALUE 822 result 823 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 824#else 825 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 826#endif 827 } 828 829 return result != 0 && STACK_REG_P (result) ? result : 0; 830} 831 832 833/* 834 * This section deals with stack register substitution, and forms the second 835 * pass over the RTL. 836 */ 837 838/* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 839 the desired hard REGNO. */ 840 841static void 842replace_reg (reg, regno) 843 rtx *reg; 844 int regno; 845{ 846 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG 847 || ! STACK_REG_P (*reg)) 848 abort (); 849 850 switch (GET_MODE_CLASS (GET_MODE (*reg))) 851 { 852 default: abort (); 853 case MODE_FLOAT: 854 case MODE_COMPLEX_FLOAT:; 855 } 856 857 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 858} 859 860/* Remove a note of type NOTE, which must be found, for register 861 number REGNO from INSN. Remove only one such note. */ 862 863static void 864remove_regno_note (insn, note, regno) 865 rtx insn; 866 enum reg_note note; 867 unsigned int regno; 868{ 869 rtx *note_link, this; 870 871 note_link = ®_NOTES (insn); 872 for (this = *note_link; this; this = XEXP (this, 1)) 873 if (REG_NOTE_KIND (this) == note 874 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) 875 { 876 *note_link = XEXP (this, 1); 877 return; 878 } 879 else 880 note_link = &XEXP (this, 1); 881 882 abort (); 883} 884 885/* Find the hard register number of virtual register REG in REGSTACK. 886 The hard register number is relative to the top of the stack. -1 is 887 returned if the register is not found. */ 888 889static int 890get_hard_regnum (regstack, reg) 891 stack regstack; 892 rtx reg; 893{ 894 int i; 895 896 if (! STACK_REG_P (reg)) 897 abort (); 898 899 for (i = regstack->top; i >= 0; i--) 900 if (regstack->reg[i] == REGNO (reg)) 901 break; 902 903 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 904} 905 906/* Emit an insn to pop virtual register REG before or after INSN. 907 REGSTACK is the stack state after INSN and is updated to reflect this 908 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 909 is represented as a SET whose destination is the register to be popped 910 and source is the top of stack. A death note for the top of stack 911 cases the movdf pattern to pop. */ 912 913static rtx 914emit_pop_insn (insn, regstack, reg, where) 915 rtx insn; 916 stack regstack; 917 rtx reg; 918 enum emit_where where; 919{ 920 rtx pop_insn, pop_rtx; 921 int hard_regno; 922 923 /* For complex types take care to pop both halves. These may survive in 924 CLOBBER and USE expressions. */ 925 if (COMPLEX_MODE_P (GET_MODE (reg))) 926 { 927 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 928 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 929 930 pop_insn = NULL_RTX; 931 if (get_hard_regnum (regstack, reg1) >= 0) 932 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 933 if (get_hard_regnum (regstack, reg2) >= 0) 934 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 935 if (!pop_insn) 936 abort (); 937 return pop_insn; 938 } 939 940 hard_regno = get_hard_regnum (regstack, reg); 941 942 if (hard_regno < FIRST_STACK_REG) 943 abort (); 944 945 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), 946 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 947 948 if (where == EMIT_AFTER) 949 pop_insn = emit_insn_after (pop_rtx, insn); 950 else 951 pop_insn = emit_insn_before (pop_rtx, insn); 952 953 REG_NOTES (pop_insn) 954 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), 955 REG_NOTES (pop_insn)); 956 957 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 958 = regstack->reg[regstack->top]; 959 regstack->top -= 1; 960 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 961 962 return pop_insn; 963} 964 965/* Emit an insn before or after INSN to swap virtual register REG with 966 the top of stack. REGSTACK is the stack state before the swap, and 967 is updated to reflect the swap. A swap insn is represented as a 968 PARALLEL of two patterns: each pattern moves one reg to the other. 969 970 If REG is already at the top of the stack, no insn is emitted. */ 971 972static void 973emit_swap_insn (insn, regstack, reg) 974 rtx insn; 975 stack regstack; 976 rtx reg; 977{ 978 int hard_regno; 979 rtx swap_rtx; 980 int tmp, other_reg; /* swap regno temps */ 981 rtx i1; /* the stack-reg insn prior to INSN */ 982 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 983 984 hard_regno = get_hard_regnum (regstack, reg); 985 986 if (hard_regno < FIRST_STACK_REG) 987 abort (); 988 if (hard_regno == FIRST_STACK_REG) 989 return; 990 991 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 992 993 tmp = regstack->reg[other_reg]; 994 regstack->reg[other_reg] = regstack->reg[regstack->top]; 995 regstack->reg[regstack->top] = tmp; 996 997 /* Find the previous insn involving stack regs, but don't pass a 998 block boundary. */ 999 i1 = NULL; 1000 if (current_block && insn != current_block->head) 1001 { 1002 rtx tmp = PREV_INSN (insn); 1003 rtx limit = PREV_INSN (current_block->head); 1004 while (tmp != limit) 1005 { 1006 if (GET_CODE (tmp) == CODE_LABEL 1007 || GET_CODE (tmp) == CALL_INSN 1008 || NOTE_INSN_BASIC_BLOCK_P (tmp) 1009 || (GET_CODE (tmp) == INSN 1010 && stack_regs_mentioned (tmp))) 1011 { 1012 i1 = tmp; 1013 break; 1014 } 1015 tmp = PREV_INSN (tmp); 1016 } 1017 } 1018 1019 if (i1 != NULL_RTX 1020 && (i1set = single_set (i1)) != NULL_RTX) 1021 { 1022 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 1023 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 1024 1025 /* If the previous register stack push was from the reg we are to 1026 swap with, omit the swap. */ 1027 1028 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG 1029 && GET_CODE (i1src) == REG 1030 && REGNO (i1src) == (unsigned) hard_regno - 1 1031 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1032 return; 1033 1034 /* If the previous insn wrote to the reg we are to swap with, 1035 omit the swap. */ 1036 1037 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno 1038 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG 1039 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1040 return; 1041 } 1042 1043 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 1044 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 1045 1046 if (i1) 1047 emit_insn_after (swap_rtx, i1); 1048 else if (current_block) 1049 emit_insn_before (swap_rtx, current_block->head); 1050 else 1051 emit_insn_before (swap_rtx, insn); 1052} 1053 1054/* Handle a move to or from a stack register in PAT, which is in INSN. 1055 REGSTACK is the current stack. Return whether a control flow insn 1056 was deleted in the process. */ 1057 1058static bool 1059move_for_stack_reg (insn, regstack, pat) 1060 rtx insn; 1061 stack regstack; 1062 rtx pat; 1063{ 1064 rtx *psrc = get_true_reg (&SET_SRC (pat)); 1065 rtx *pdest = get_true_reg (&SET_DEST (pat)); 1066 rtx src, dest; 1067 rtx note; 1068 bool control_flow_insn_deleted = false; 1069 1070 src = *psrc; dest = *pdest; 1071 1072 if (STACK_REG_P (src) && STACK_REG_P (dest)) 1073 { 1074 /* Write from one stack reg to another. If SRC dies here, then 1075 just change the register mapping and delete the insn. */ 1076 1077 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1078 if (note) 1079 { 1080 int i; 1081 1082 /* If this is a no-op move, there must not be a REG_DEAD note. */ 1083 if (REGNO (src) == REGNO (dest)) 1084 abort (); 1085 1086 for (i = regstack->top; i >= 0; i--) 1087 if (regstack->reg[i] == REGNO (src)) 1088 break; 1089 1090 /* The source must be live, and the dest must be dead. */ 1091 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1092 abort (); 1093 1094 /* It is possible that the dest is unused after this insn. 1095 If so, just pop the src. */ 1096 1097 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1098 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 1099 else 1100 { 1101 regstack->reg[i] = REGNO (dest); 1102 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1103 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1104 } 1105 1106 control_flow_insn_deleted |= control_flow_insn_p (insn); 1107 delete_insn (insn); 1108 return control_flow_insn_deleted; 1109 } 1110 1111 /* The source reg does not die. */ 1112 1113 /* If this appears to be a no-op move, delete it, or else it 1114 will confuse the machine description output patterns. But if 1115 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1116 for REG_UNUSED will not work for deleted insns. */ 1117 1118 if (REGNO (src) == REGNO (dest)) 1119 { 1120 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1121 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1122 1123 control_flow_insn_deleted |= control_flow_insn_p (insn); 1124 delete_insn (insn); 1125 return control_flow_insn_deleted; 1126 } 1127 1128 /* The destination ought to be dead. */ 1129 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1130 abort (); 1131 1132 replace_reg (psrc, get_hard_regnum (regstack, src)); 1133 1134 regstack->reg[++regstack->top] = REGNO (dest); 1135 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1136 replace_reg (pdest, FIRST_STACK_REG); 1137 } 1138 else if (STACK_REG_P (src)) 1139 { 1140 /* Save from a stack reg to MEM, or possibly integer reg. Since 1141 only top of stack may be saved, emit an exchange first if 1142 needs be. */ 1143 1144 emit_swap_insn (insn, regstack, src); 1145 1146 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1147 if (note) 1148 { 1149 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1150 regstack->top--; 1151 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1152 } 1153 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode) 1154 && regstack->top < REG_STACK_SIZE - 1) 1155 { 1156 /* A 387 cannot write an XFmode value to a MEM without 1157 clobbering the source reg. The output code can handle 1158 this by reading back the value from the MEM. 1159 But it is more efficient to use a temp register if one is 1160 available. Push the source value here if the register 1161 stack is not full, and then write the value to memory via 1162 a pop. */ 1163 rtx push_rtx, push_insn; 1164 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1165 1166 if (GET_MODE (src) == TFmode) 1167 push_rtx = gen_movtf (top_stack_reg, top_stack_reg); 1168 else 1169 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1170 push_insn = emit_insn_before (push_rtx, insn); 1171 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, 1172 REG_NOTES (insn)); 1173 } 1174 1175 replace_reg (psrc, FIRST_STACK_REG); 1176 } 1177 else if (STACK_REG_P (dest)) 1178 { 1179 /* Load from MEM, or possibly integer REG or constant, into the 1180 stack regs. The actual target is always the top of the 1181 stack. The stack mapping is changed to reflect that DEST is 1182 now at top of stack. */ 1183 1184 /* The destination ought to be dead. */ 1185 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1186 abort (); 1187 1188 if (regstack->top >= REG_STACK_SIZE) 1189 abort (); 1190 1191 regstack->reg[++regstack->top] = REGNO (dest); 1192 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1193 replace_reg (pdest, FIRST_STACK_REG); 1194 } 1195 else 1196 abort (); 1197 1198 return control_flow_insn_deleted; 1199} 1200 1201/* Swap the condition on a branch, if there is one. Return true if we 1202 found a condition to swap. False if the condition was not used as 1203 such. */ 1204 1205static int 1206swap_rtx_condition_1 (pat) 1207 rtx pat; 1208{ 1209 const char *fmt; 1210 int i, r = 0; 1211 1212 if (GET_RTX_CLASS (GET_CODE (pat)) == '<') 1213 { 1214 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1215 r = 1; 1216 } 1217 else 1218 { 1219 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1220 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1221 { 1222 if (fmt[i] == 'E') 1223 { 1224 int j; 1225 1226 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1227 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1228 } 1229 else if (fmt[i] == 'e') 1230 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1231 } 1232 } 1233 1234 return r; 1235} 1236 1237static int 1238swap_rtx_condition (insn) 1239 rtx insn; 1240{ 1241 rtx pat = PATTERN (insn); 1242 1243 /* We're looking for a single set to cc0 or an HImode temporary. */ 1244 1245 if (GET_CODE (pat) == SET 1246 && GET_CODE (SET_DEST (pat)) == REG 1247 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1248 { 1249 insn = next_flags_user (insn); 1250 if (insn == NULL_RTX) 1251 return 0; 1252 pat = PATTERN (insn); 1253 } 1254 1255 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're 1256 not doing anything with the cc value right now. We may be able to 1257 search for one though. */ 1258 1259 if (GET_CODE (pat) == SET 1260 && GET_CODE (SET_SRC (pat)) == UNSPEC 1261 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1262 { 1263 rtx dest = SET_DEST (pat); 1264 1265 /* Search forward looking for the first use of this value. 1266 Stop at block boundaries. */ 1267 while (insn != current_block->end) 1268 { 1269 insn = NEXT_INSN (insn); 1270 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1271 break; 1272 if (GET_CODE (insn) == CALL_INSN) 1273 return 0; 1274 } 1275 1276 /* So we've found the insn using this value. If it is anything 1277 other than sahf, aka unspec 10, or the value does not die 1278 (meaning we'd have to search further), then we must give up. */ 1279 pat = PATTERN (insn); 1280 if (GET_CODE (pat) != SET 1281 || GET_CODE (SET_SRC (pat)) != UNSPEC 1282 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1283 || ! dead_or_set_p (insn, dest)) 1284 return 0; 1285 1286 /* Now we are prepared to handle this as a normal cc0 setter. */ 1287 insn = next_flags_user (insn); 1288 if (insn == NULL_RTX) 1289 return 0; 1290 pat = PATTERN (insn); 1291 } 1292 1293 if (swap_rtx_condition_1 (pat)) 1294 { 1295 int fail = 0; 1296 INSN_CODE (insn) = -1; 1297 if (recog_memoized (insn) == -1) 1298 fail = 1; 1299 /* In case the flags don't die here, recurse to try fix 1300 following user too. */ 1301 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1302 { 1303 insn = next_flags_user (insn); 1304 if (!insn || !swap_rtx_condition (insn)) 1305 fail = 1; 1306 } 1307 if (fail) 1308 { 1309 swap_rtx_condition_1 (pat); 1310 return 0; 1311 } 1312 return 1; 1313 } 1314 return 0; 1315} 1316 1317/* Handle a comparison. Special care needs to be taken to avoid 1318 causing comparisons that a 387 cannot do correctly, such as EQ. 1319 1320 Also, a pop insn may need to be emitted. The 387 does have an 1321 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1322 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1323 set up. */ 1324 1325static void 1326compare_for_stack_reg (insn, regstack, pat_src) 1327 rtx insn; 1328 stack regstack; 1329 rtx pat_src; 1330{ 1331 rtx *src1, *src2; 1332 rtx src1_note, src2_note; 1333 rtx flags_user; 1334 1335 src1 = get_true_reg (&XEXP (pat_src, 0)); 1336 src2 = get_true_reg (&XEXP (pat_src, 1)); 1337 flags_user = next_flags_user (insn); 1338 1339 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1340 registers that die in this insn - move those to stack top first. */ 1341 if ((! STACK_REG_P (*src1) 1342 || (STACK_REG_P (*src2) 1343 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1344 && swap_rtx_condition (insn)) 1345 { 1346 rtx temp; 1347 temp = XEXP (pat_src, 0); 1348 XEXP (pat_src, 0) = XEXP (pat_src, 1); 1349 XEXP (pat_src, 1) = temp; 1350 1351 src1 = get_true_reg (&XEXP (pat_src, 0)); 1352 src2 = get_true_reg (&XEXP (pat_src, 1)); 1353 1354 INSN_CODE (insn) = -1; 1355 } 1356 1357 /* We will fix any death note later. */ 1358 1359 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1360 1361 if (STACK_REG_P (*src2)) 1362 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1363 else 1364 src2_note = NULL_RTX; 1365 1366 emit_swap_insn (insn, regstack, *src1); 1367 1368 replace_reg (src1, FIRST_STACK_REG); 1369 1370 if (STACK_REG_P (*src2)) 1371 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1372 1373 if (src1_note) 1374 { 1375 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1376 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1377 } 1378 1379 /* If the second operand dies, handle that. But if the operands are 1380 the same stack register, don't bother, because only one death is 1381 needed, and it was just handled. */ 1382 1383 if (src2_note 1384 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1385 && REGNO (*src1) == REGNO (*src2))) 1386 { 1387 /* As a special case, two regs may die in this insn if src2 is 1388 next to top of stack and the top of stack also dies. Since 1389 we have already popped src1, "next to top of stack" is really 1390 at top (FIRST_STACK_REG) now. */ 1391 1392 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1393 && src1_note) 1394 { 1395 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1396 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1397 } 1398 else 1399 { 1400 /* The 386 can only represent death of the first operand in 1401 the case handled above. In all other cases, emit a separate 1402 pop and remove the death note from here. */ 1403 1404 /* link_cc0_insns (insn); */ 1405 1406 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1407 1408 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1409 EMIT_AFTER); 1410 } 1411 } 1412} 1413 1414/* Substitute new registers in PAT, which is part of INSN. REGSTACK 1415 is the current register layout. Return whether a control flow insn 1416 was deleted in the process. */ 1417 1418static bool 1419subst_stack_regs_pat (insn, regstack, pat) 1420 rtx insn; 1421 stack regstack; 1422 rtx pat; 1423{ 1424 rtx *dest, *src; 1425 bool control_flow_insn_deleted = false; 1426 1427 switch (GET_CODE (pat)) 1428 { 1429 case USE: 1430 /* Deaths in USE insns can happen in non optimizing compilation. 1431 Handle them by popping the dying register. */ 1432 src = get_true_reg (&XEXP (pat, 0)); 1433 if (STACK_REG_P (*src) 1434 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1435 { 1436 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1437 return control_flow_insn_deleted; 1438 } 1439 /* ??? Uninitialized USE should not happen. */ 1440 else if (get_hard_regnum (regstack, *src) == -1) 1441 abort (); 1442 break; 1443 1444 case CLOBBER: 1445 { 1446 rtx note; 1447 1448 dest = get_true_reg (&XEXP (pat, 0)); 1449 if (STACK_REG_P (*dest)) 1450 { 1451 note = find_reg_note (insn, REG_DEAD, *dest); 1452 1453 if (pat != PATTERN (insn)) 1454 { 1455 /* The fix_truncdi_1 pattern wants to be able to allocate 1456 it's own scratch register. It does this by clobbering 1457 an fp reg so that it is assured of an empty reg-stack 1458 register. If the register is live, kill it now. 1459 Remove the DEAD/UNUSED note so we don't try to kill it 1460 later too. */ 1461 1462 if (note) 1463 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1464 else 1465 { 1466 note = find_reg_note (insn, REG_UNUSED, *dest); 1467 if (!note) 1468 abort (); 1469 } 1470 remove_note (insn, note); 1471 replace_reg (dest, LAST_STACK_REG); 1472 } 1473 else 1474 { 1475 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1476 indicates an uninitialized value. Because reload removed 1477 all other clobbers, this must be due to a function 1478 returning without a value. Load up a NaN. */ 1479 1480 if (! note 1481 && get_hard_regnum (regstack, *dest) == -1) 1482 { 1483 pat = gen_rtx_SET (VOIDmode, 1484 FP_MODE_REG (REGNO (*dest), SFmode), 1485 nan); 1486 PATTERN (insn) = pat; 1487 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1488 } 1489 if (! note && COMPLEX_MODE_P (GET_MODE (*dest)) 1490 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1) 1491 { 1492 pat = gen_rtx_SET (VOIDmode, 1493 FP_MODE_REG (REGNO (*dest) + 1, SFmode), 1494 nan); 1495 PATTERN (insn) = pat; 1496 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1497 } 1498 } 1499 } 1500 break; 1501 } 1502 1503 case SET: 1504 { 1505 rtx *src1 = (rtx *) 0, *src2; 1506 rtx src1_note, src2_note; 1507 rtx pat_src; 1508 1509 dest = get_true_reg (&SET_DEST (pat)); 1510 src = get_true_reg (&SET_SRC (pat)); 1511 pat_src = SET_SRC (pat); 1512 1513 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1514 if (STACK_REG_P (*src) 1515 || (STACK_REG_P (*dest) 1516 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM 1517 || GET_CODE (*src) == CONST_DOUBLE))) 1518 { 1519 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1520 break; 1521 } 1522 1523 switch (GET_CODE (pat_src)) 1524 { 1525 case COMPARE: 1526 compare_for_stack_reg (insn, regstack, pat_src); 1527 break; 1528 1529 case CALL: 1530 { 1531 int count; 1532 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest)); 1533 --count >= 0;) 1534 { 1535 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1536 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1537 } 1538 } 1539 replace_reg (dest, FIRST_STACK_REG); 1540 break; 1541 1542 case REG: 1543 /* This is a `tstM2' case. */ 1544 if (*dest != cc0_rtx) 1545 abort (); 1546 src1 = src; 1547 1548 /* Fall through. */ 1549 1550 case FLOAT_TRUNCATE: 1551 case SQRT: 1552 case ABS: 1553 case NEG: 1554 /* These insns only operate on the top of the stack. DEST might 1555 be cc0_rtx if we're processing a tstM pattern. Also, it's 1556 possible that the tstM case results in a REG_DEAD note on the 1557 source. */ 1558 1559 if (src1 == 0) 1560 src1 = get_true_reg (&XEXP (pat_src, 0)); 1561 1562 emit_swap_insn (insn, regstack, *src1); 1563 1564 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1565 1566 if (STACK_REG_P (*dest)) 1567 replace_reg (dest, FIRST_STACK_REG); 1568 1569 if (src1_note) 1570 { 1571 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1572 regstack->top--; 1573 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1574 } 1575 1576 replace_reg (src1, FIRST_STACK_REG); 1577 break; 1578 1579 case MINUS: 1580 case DIV: 1581 /* On i386, reversed forms of subM3 and divM3 exist for 1582 MODE_FLOAT, so the same code that works for addM3 and mulM3 1583 can be used. */ 1584 case MULT: 1585 case PLUS: 1586 /* These insns can accept the top of stack as a destination 1587 from a stack reg or mem, or can use the top of stack as a 1588 source and some other stack register (possibly top of stack) 1589 as a destination. */ 1590 1591 src1 = get_true_reg (&XEXP (pat_src, 0)); 1592 src2 = get_true_reg (&XEXP (pat_src, 1)); 1593 1594 /* We will fix any death note later. */ 1595 1596 if (STACK_REG_P (*src1)) 1597 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1598 else 1599 src1_note = NULL_RTX; 1600 if (STACK_REG_P (*src2)) 1601 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1602 else 1603 src2_note = NULL_RTX; 1604 1605 /* If either operand is not a stack register, then the dest 1606 must be top of stack. */ 1607 1608 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1609 emit_swap_insn (insn, regstack, *dest); 1610 else 1611 { 1612 /* Both operands are REG. If neither operand is already 1613 at the top of stack, choose to make the one that is the dest 1614 the new top of stack. */ 1615 1616 int src1_hard_regnum, src2_hard_regnum; 1617 1618 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1619 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1620 if (src1_hard_regnum == -1 || src2_hard_regnum == -1) 1621 abort (); 1622 1623 if (src1_hard_regnum != FIRST_STACK_REG 1624 && src2_hard_regnum != FIRST_STACK_REG) 1625 emit_swap_insn (insn, regstack, *dest); 1626 } 1627 1628 if (STACK_REG_P (*src1)) 1629 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1630 if (STACK_REG_P (*src2)) 1631 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1632 1633 if (src1_note) 1634 { 1635 rtx src1_reg = XEXP (src1_note, 0); 1636 1637 /* If the register that dies is at the top of stack, then 1638 the destination is somewhere else - merely substitute it. 1639 But if the reg that dies is not at top of stack, then 1640 move the top of stack to the dead reg, as though we had 1641 done the insn and then a store-with-pop. */ 1642 1643 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1644 { 1645 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1646 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1647 } 1648 else 1649 { 1650 int regno = get_hard_regnum (regstack, src1_reg); 1651 1652 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1653 replace_reg (dest, regno); 1654 1655 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1656 = regstack->reg[regstack->top]; 1657 } 1658 1659 CLEAR_HARD_REG_BIT (regstack->reg_set, 1660 REGNO (XEXP (src1_note, 0))); 1661 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1662 regstack->top--; 1663 } 1664 else if (src2_note) 1665 { 1666 rtx src2_reg = XEXP (src2_note, 0); 1667 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1668 { 1669 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1670 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1671 } 1672 else 1673 { 1674 int regno = get_hard_regnum (regstack, src2_reg); 1675 1676 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1677 replace_reg (dest, regno); 1678 1679 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1680 = regstack->reg[regstack->top]; 1681 } 1682 1683 CLEAR_HARD_REG_BIT (regstack->reg_set, 1684 REGNO (XEXP (src2_note, 0))); 1685 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1686 regstack->top--; 1687 } 1688 else 1689 { 1690 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1691 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1692 } 1693 1694 /* Keep operand 1 maching with destination. */ 1695 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c' 1696 && REG_P (*src1) && REG_P (*src2) 1697 && REGNO (*src1) != REGNO (*dest)) 1698 { 1699 int tmp = REGNO (*src1); 1700 replace_reg (src1, REGNO (*src2)); 1701 replace_reg (src2, tmp); 1702 } 1703 break; 1704 1705 case UNSPEC: 1706 switch (XINT (pat_src, 1)) 1707 { 1708 case UNSPEC_SIN: 1709 case UNSPEC_COS: 1710 /* These insns only operate on the top of the stack. */ 1711 1712 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1713 1714 emit_swap_insn (insn, regstack, *src1); 1715 1716 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1717 1718 if (STACK_REG_P (*dest)) 1719 replace_reg (dest, FIRST_STACK_REG); 1720 1721 if (src1_note) 1722 { 1723 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1724 regstack->top--; 1725 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1726 } 1727 1728 replace_reg (src1, FIRST_STACK_REG); 1729 break; 1730 1731 case UNSPEC_SAHF: 1732 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) 1733 The combination matches the PPRO fcomi instruction. */ 1734 1735 pat_src = XVECEXP (pat_src, 0, 0); 1736 if (GET_CODE (pat_src) != UNSPEC 1737 || XINT (pat_src, 1) != UNSPEC_FNSTSW) 1738 abort (); 1739 /* FALLTHRU */ 1740 1741 case UNSPEC_FNSTSW: 1742 /* Combined fcomp+fnstsw generated for doing well with 1743 CSE. When optimizing this would have been broken 1744 up before now. */ 1745 1746 pat_src = XVECEXP (pat_src, 0, 0); 1747 if (GET_CODE (pat_src) != COMPARE) 1748 abort (); 1749 1750 compare_for_stack_reg (insn, regstack, pat_src); 1751 break; 1752 1753 default: 1754 abort (); 1755 } 1756 break; 1757 1758 case IF_THEN_ELSE: 1759 /* This insn requires the top of stack to be the destination. */ 1760 1761 src1 = get_true_reg (&XEXP (pat_src, 1)); 1762 src2 = get_true_reg (&XEXP (pat_src, 2)); 1763 1764 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1765 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1766 1767 /* If the comparison operator is an FP comparison operator, 1768 it is handled correctly by compare_for_stack_reg () who 1769 will move the destination to the top of stack. But if the 1770 comparison operator is not an FP comparison operator, we 1771 have to handle it here. */ 1772 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 1773 && REGNO (*dest) != regstack->reg[regstack->top]) 1774 { 1775 /* In case one of operands is the top of stack and the operands 1776 dies, it is safe to make it the destination operand by 1777 reversing the direction of cmove and avoid fxch. */ 1778 if ((REGNO (*src1) == regstack->reg[regstack->top] 1779 && src1_note) 1780 || (REGNO (*src2) == regstack->reg[regstack->top] 1781 && src2_note)) 1782 { 1783 int idx1 = (get_hard_regnum (regstack, *src1) 1784 - FIRST_STACK_REG); 1785 int idx2 = (get_hard_regnum (regstack, *src2) 1786 - FIRST_STACK_REG); 1787 1788 /* Make reg-stack believe that the operands are already 1789 swapped on the stack */ 1790 regstack->reg[regstack->top - idx1] = REGNO (*src2); 1791 regstack->reg[regstack->top - idx2] = REGNO (*src1); 1792 1793 /* Reverse condition to compensate the operand swap. 1794 i386 do have comparison always reversible. */ 1795 PUT_CODE (XEXP (pat_src, 0), 1796 reversed_comparison_code (XEXP (pat_src, 0), insn)); 1797 } 1798 else 1799 emit_swap_insn (insn, regstack, *dest); 1800 } 1801 1802 { 1803 rtx src_note [3]; 1804 int i; 1805 1806 src_note[0] = 0; 1807 src_note[1] = src1_note; 1808 src_note[2] = src2_note; 1809 1810 if (STACK_REG_P (*src1)) 1811 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1812 if (STACK_REG_P (*src2)) 1813 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1814 1815 for (i = 1; i <= 2; i++) 1816 if (src_note [i]) 1817 { 1818 int regno = REGNO (XEXP (src_note[i], 0)); 1819 1820 /* If the register that dies is not at the top of 1821 stack, then move the top of stack to the dead reg */ 1822 if (regno != regstack->reg[regstack->top]) 1823 { 1824 remove_regno_note (insn, REG_DEAD, regno); 1825 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 1826 EMIT_AFTER); 1827 } 1828 else 1829 /* Top of stack never dies, as it is the 1830 destination. */ 1831 abort (); 1832 } 1833 } 1834 1835 /* Make dest the top of stack. Add dest to regstack if 1836 not present. */ 1837 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 1838 regstack->reg[++regstack->top] = REGNO (*dest); 1839 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1840 replace_reg (dest, FIRST_STACK_REG); 1841 break; 1842 1843 default: 1844 abort (); 1845 } 1846 break; 1847 } 1848 1849 default: 1850 break; 1851 } 1852 1853 return control_flow_insn_deleted; 1854} 1855 1856/* Substitute hard regnums for any stack regs in INSN, which has 1857 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 1858 before the insn, and is updated with changes made here. 1859 1860 There are several requirements and assumptions about the use of 1861 stack-like regs in asm statements. These rules are enforced by 1862 record_asm_stack_regs; see comments there for details. Any 1863 asm_operands left in the RTL at this point may be assume to meet the 1864 requirements, since record_asm_stack_regs removes any problem asm. */ 1865 1866static void 1867subst_asm_stack_regs (insn, regstack) 1868 rtx insn; 1869 stack regstack; 1870{ 1871 rtx body = PATTERN (insn); 1872 int alt; 1873 1874 rtx *note_reg; /* Array of note contents */ 1875 rtx **note_loc; /* Address of REG field of each note */ 1876 enum reg_note *note_kind; /* The type of each note */ 1877 1878 rtx *clobber_reg = 0; 1879 rtx **clobber_loc = 0; 1880 1881 struct stack_def temp_stack; 1882 int n_notes; 1883 int n_clobbers; 1884 rtx note; 1885 int i; 1886 int n_inputs, n_outputs; 1887 1888 if (! check_asm_stack_operands (insn)) 1889 return; 1890 1891 /* Find out what the constraints required. If no constraint 1892 alternative matches, that is a compiler bug: we should have caught 1893 such an insn in check_asm_stack_operands. */ 1894 extract_insn (insn); 1895 constrain_operands (1); 1896 alt = which_alternative; 1897 1898 preprocess_constraints (); 1899 1900 n_inputs = get_asm_operand_n_inputs (body); 1901 n_outputs = recog_data.n_operands - n_inputs; 1902 1903 if (alt < 0) 1904 abort (); 1905 1906 /* Strip SUBREGs here to make the following code simpler. */ 1907 for (i = 0; i < recog_data.n_operands; i++) 1908 if (GET_CODE (recog_data.operand[i]) == SUBREG 1909 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) 1910 { 1911 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 1912 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 1913 } 1914 1915 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 1916 1917 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1918 i++; 1919 1920 note_reg = (rtx *) alloca (i * sizeof (rtx)); 1921 note_loc = (rtx **) alloca (i * sizeof (rtx *)); 1922 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note)); 1923 1924 n_notes = 0; 1925 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1926 { 1927 rtx reg = XEXP (note, 0); 1928 rtx *loc = & XEXP (note, 0); 1929 1930 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 1931 { 1932 loc = & SUBREG_REG (reg); 1933 reg = SUBREG_REG (reg); 1934 } 1935 1936 if (STACK_REG_P (reg) 1937 && (REG_NOTE_KIND (note) == REG_DEAD 1938 || REG_NOTE_KIND (note) == REG_UNUSED)) 1939 { 1940 note_reg[n_notes] = reg; 1941 note_loc[n_notes] = loc; 1942 note_kind[n_notes] = REG_NOTE_KIND (note); 1943 n_notes++; 1944 } 1945 } 1946 1947 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 1948 1949 n_clobbers = 0; 1950 1951 if (GET_CODE (body) == PARALLEL) 1952 { 1953 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx)); 1954 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *)); 1955 1956 for (i = 0; i < XVECLEN (body, 0); i++) 1957 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 1958 { 1959 rtx clobber = XVECEXP (body, 0, i); 1960 rtx reg = XEXP (clobber, 0); 1961 rtx *loc = & XEXP (clobber, 0); 1962 1963 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 1964 { 1965 loc = & SUBREG_REG (reg); 1966 reg = SUBREG_REG (reg); 1967 } 1968 1969 if (STACK_REG_P (reg)) 1970 { 1971 clobber_reg[n_clobbers] = reg; 1972 clobber_loc[n_clobbers] = loc; 1973 n_clobbers++; 1974 } 1975 } 1976 } 1977 1978 temp_stack = *regstack; 1979 1980 /* Put the input regs into the desired place in TEMP_STACK. */ 1981 1982 for (i = n_outputs; i < n_outputs + n_inputs; i++) 1983 if (STACK_REG_P (recog_data.operand[i]) 1984 && reg_class_subset_p (recog_op_alt[i][alt].class, 1985 FLOAT_REGS) 1986 && recog_op_alt[i][alt].class != FLOAT_REGS) 1987 { 1988 /* If an operand needs to be in a particular reg in 1989 FLOAT_REGS, the constraint was either 't' or 'u'. Since 1990 these constraints are for single register classes, and 1991 reload guaranteed that operand[i] is already in that class, 1992 we can just use REGNO (recog_data.operand[i]) to know which 1993 actual reg this operand needs to be in. */ 1994 1995 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 1996 1997 if (regno < 0) 1998 abort (); 1999 2000 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2001 { 2002 /* recog_data.operand[i] is not in the right place. Find 2003 it and swap it with whatever is already in I's place. 2004 K is where recog_data.operand[i] is now. J is where it 2005 should be. */ 2006 int j, k, temp; 2007 2008 k = temp_stack.top - (regno - FIRST_STACK_REG); 2009 j = (temp_stack.top 2010 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2011 2012 temp = temp_stack.reg[k]; 2013 temp_stack.reg[k] = temp_stack.reg[j]; 2014 temp_stack.reg[j] = temp; 2015 } 2016 } 2017 2018 /* Emit insns before INSN to make sure the reg-stack is in the right 2019 order. */ 2020 2021 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2022 2023 /* Make the needed input register substitutions. Do death notes and 2024 clobbers too, because these are for inputs, not outputs. */ 2025 2026 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2027 if (STACK_REG_P (recog_data.operand[i])) 2028 { 2029 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2030 2031 if (regnum < 0) 2032 abort (); 2033 2034 replace_reg (recog_data.operand_loc[i], regnum); 2035 } 2036 2037 for (i = 0; i < n_notes; i++) 2038 if (note_kind[i] == REG_DEAD) 2039 { 2040 int regnum = get_hard_regnum (regstack, note_reg[i]); 2041 2042 if (regnum < 0) 2043 abort (); 2044 2045 replace_reg (note_loc[i], regnum); 2046 } 2047 2048 for (i = 0; i < n_clobbers; i++) 2049 { 2050 /* It's OK for a CLOBBER to reference a reg that is not live. 2051 Don't try to replace it in that case. */ 2052 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2053 2054 if (regnum >= 0) 2055 { 2056 /* Sigh - clobbers always have QImode. But replace_reg knows 2057 that these regs can't be MODE_INT and will abort. Just put 2058 the right reg there without calling replace_reg. */ 2059 2060 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2061 } 2062 } 2063 2064 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2065 2066 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2067 if (STACK_REG_P (recog_data.operand[i])) 2068 { 2069 /* An input reg is implicitly popped if it is tied to an 2070 output, or if there is a CLOBBER for it. */ 2071 int j; 2072 2073 for (j = 0; j < n_clobbers; j++) 2074 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2075 break; 2076 2077 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 2078 { 2079 /* recog_data.operand[i] might not be at the top of stack. 2080 But that's OK, because all we need to do is pop the 2081 right number of regs off of the top of the reg-stack. 2082 record_asm_stack_regs guaranteed that all implicitly 2083 popped regs were grouped at the top of the reg-stack. */ 2084 2085 CLEAR_HARD_REG_BIT (regstack->reg_set, 2086 regstack->reg[regstack->top]); 2087 regstack->top--; 2088 } 2089 } 2090 2091 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2092 Note that there isn't any need to substitute register numbers. 2093 ??? Explain why this is true. */ 2094 2095 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2096 { 2097 /* See if there is an output for this hard reg. */ 2098 int j; 2099 2100 for (j = 0; j < n_outputs; j++) 2101 if (STACK_REG_P (recog_data.operand[j]) 2102 && REGNO (recog_data.operand[j]) == (unsigned) i) 2103 { 2104 regstack->reg[++regstack->top] = i; 2105 SET_HARD_REG_BIT (regstack->reg_set, i); 2106 break; 2107 } 2108 } 2109 2110 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2111 input that the asm didn't implicitly pop. If the asm didn't 2112 implicitly pop an input reg, that reg will still be live. 2113 2114 Note that we can't use find_regno_note here: the register numbers 2115 in the death notes have already been substituted. */ 2116 2117 for (i = 0; i < n_outputs; i++) 2118 if (STACK_REG_P (recog_data.operand[i])) 2119 { 2120 int j; 2121 2122 for (j = 0; j < n_notes; j++) 2123 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2124 && note_kind[j] == REG_UNUSED) 2125 { 2126 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2127 EMIT_AFTER); 2128 break; 2129 } 2130 } 2131 2132 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2133 if (STACK_REG_P (recog_data.operand[i])) 2134 { 2135 int j; 2136 2137 for (j = 0; j < n_notes; j++) 2138 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2139 && note_kind[j] == REG_DEAD 2140 && TEST_HARD_REG_BIT (regstack->reg_set, 2141 REGNO (recog_data.operand[i]))) 2142 { 2143 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2144 EMIT_AFTER); 2145 break; 2146 } 2147 } 2148} 2149 2150/* Substitute stack hard reg numbers for stack virtual registers in 2151 INSN. Non-stack register numbers are not changed. REGSTACK is the 2152 current stack content. Insns may be emitted as needed to arrange the 2153 stack for the 387 based on the contents of the insn. Return whether 2154 a control flow insn was deleted in the process. */ 2155 2156static bool 2157subst_stack_regs (insn, regstack) 2158 rtx insn; 2159 stack regstack; 2160{ 2161 rtx *note_link, note; 2162 bool control_flow_insn_deleted = false; 2163 int i; 2164 2165 if (GET_CODE (insn) == CALL_INSN) 2166 { 2167 int top = regstack->top; 2168 2169 /* If there are any floating point parameters to be passed in 2170 registers for this call, make sure they are in the right 2171 order. */ 2172 2173 if (top >= 0) 2174 { 2175 straighten_stack (PREV_INSN (insn), regstack); 2176 2177 /* Now mark the arguments as dead after the call. */ 2178 2179 while (regstack->top >= 0) 2180 { 2181 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2182 regstack->top--; 2183 } 2184 } 2185 } 2186 2187 /* Do the actual substitution if any stack regs are mentioned. 2188 Since we only record whether entire insn mentions stack regs, and 2189 subst_stack_regs_pat only works for patterns that contain stack regs, 2190 we must check each pattern in a parallel here. A call_value_pop could 2191 fail otherwise. */ 2192 2193 if (stack_regs_mentioned (insn)) 2194 { 2195 int n_operands = asm_noperands (PATTERN (insn)); 2196 if (n_operands >= 0) 2197 { 2198 /* This insn is an `asm' with operands. Decode the operands, 2199 decide how many are inputs, and do register substitution. 2200 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2201 2202 subst_asm_stack_regs (insn, regstack); 2203 return control_flow_insn_deleted; 2204 } 2205 2206 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2207 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2208 { 2209 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2210 control_flow_insn_deleted 2211 |= subst_stack_regs_pat (insn, regstack, 2212 XVECEXP (PATTERN (insn), 0, i)); 2213 } 2214 else 2215 control_flow_insn_deleted 2216 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2217 } 2218 2219 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2220 REG_UNUSED will already have been dealt with, so just return. */ 2221 2222 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn)) 2223 return control_flow_insn_deleted; 2224 2225 /* If there is a REG_UNUSED note on a stack register on this insn, 2226 the indicated reg must be popped. The REG_UNUSED note is removed, 2227 since the form of the newly emitted pop insn references the reg, 2228 making it no longer `unset'. */ 2229 2230 note_link = ®_NOTES (insn); 2231 for (note = *note_link; note; note = XEXP (note, 1)) 2232 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2233 { 2234 *note_link = XEXP (note, 1); 2235 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2236 } 2237 else 2238 note_link = &XEXP (note, 1); 2239 2240 return control_flow_insn_deleted; 2241} 2242 2243/* Change the organization of the stack so that it fits a new basic 2244 block. Some registers might have to be popped, but there can never be 2245 a register live in the new block that is not now live. 2246 2247 Insert any needed insns before or after INSN, as indicated by 2248 WHERE. OLD is the original stack layout, and NEW is the desired 2249 form. OLD is updated to reflect the code emitted, ie, it will be 2250 the same as NEW upon return. 2251 2252 This function will not preserve block_end[]. But that information 2253 is no longer needed once this has executed. */ 2254 2255static void 2256change_stack (insn, old, new, where) 2257 rtx insn; 2258 stack old; 2259 stack new; 2260 enum emit_where where; 2261{ 2262 int reg; 2263 int update_end = 0; 2264 2265 /* We will be inserting new insns "backwards". If we are to insert 2266 after INSN, find the next insn, and insert before it. */ 2267 2268 if (where == EMIT_AFTER) 2269 { 2270 if (current_block && current_block->end == insn) 2271 update_end = 1; 2272 insn = NEXT_INSN (insn); 2273 } 2274 2275 /* Pop any registers that are not needed in the new block. */ 2276 2277 for (reg = old->top; reg >= 0; reg--) 2278 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) 2279 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode), 2280 EMIT_BEFORE); 2281 2282 if (new->top == -2) 2283 { 2284 /* If the new block has never been processed, then it can inherit 2285 the old stack order. */ 2286 2287 new->top = old->top; 2288 memcpy (new->reg, old->reg, sizeof (new->reg)); 2289 } 2290 else 2291 { 2292 /* This block has been entered before, and we must match the 2293 previously selected stack order. */ 2294 2295 /* By now, the only difference should be the order of the stack, 2296 not their depth or liveliness. */ 2297 2298 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); 2299 abort (); 2300 win: 2301 if (old->top != new->top) 2302 abort (); 2303 2304 /* If the stack is not empty (new->top != -1), loop here emitting 2305 swaps until the stack is correct. 2306 2307 The worst case number of swaps emitted is N + 2, where N is the 2308 depth of the stack. In some cases, the reg at the top of 2309 stack may be correct, but swapped anyway in order to fix 2310 other regs. But since we never swap any other reg away from 2311 its correct slot, this algorithm will converge. */ 2312 2313 if (new->top != -1) 2314 do 2315 { 2316 /* Swap the reg at top of stack into the position it is 2317 supposed to be in, until the correct top of stack appears. */ 2318 2319 while (old->reg[old->top] != new->reg[new->top]) 2320 { 2321 for (reg = new->top; reg >= 0; reg--) 2322 if (new->reg[reg] == old->reg[old->top]) 2323 break; 2324 2325 if (reg == -1) 2326 abort (); 2327 2328 emit_swap_insn (insn, old, 2329 FP_MODE_REG (old->reg[reg], DFmode)); 2330 } 2331 2332 /* See if any regs remain incorrect. If so, bring an 2333 incorrect reg to the top of stack, and let the while loop 2334 above fix it. */ 2335 2336 for (reg = new->top; reg >= 0; reg--) 2337 if (new->reg[reg] != old->reg[reg]) 2338 { 2339 emit_swap_insn (insn, old, 2340 FP_MODE_REG (old->reg[reg], DFmode)); 2341 break; 2342 } 2343 } while (reg >= 0); 2344 2345 /* At this point there must be no differences. */ 2346 2347 for (reg = old->top; reg >= 0; reg--) 2348 if (old->reg[reg] != new->reg[reg]) 2349 abort (); 2350 } 2351 2352 if (update_end) 2353 current_block->end = PREV_INSN (insn); 2354} 2355 2356/* Print stack configuration. */ 2357 2358static void 2359print_stack (file, s) 2360 FILE *file; 2361 stack s; 2362{ 2363 if (! file) 2364 return; 2365 2366 if (s->top == -2) 2367 fprintf (file, "uninitialized\n"); 2368 else if (s->top == -1) 2369 fprintf (file, "empty\n"); 2370 else 2371 { 2372 int i; 2373 fputs ("[ ", file); 2374 for (i = 0; i <= s->top; ++i) 2375 fprintf (file, "%d ", s->reg[i]); 2376 fputs ("]\n", file); 2377 } 2378} 2379 2380/* This function was doing life analysis. We now let the regular live 2381 code do it's job, so we only need to check some extra invariants 2382 that reg-stack expects. Primary among these being that all registers 2383 are initialized before use. 2384 2385 The function returns true when code was emitted to CFG edges and 2386 commit_edge_insertions needs to be called. */ 2387 2388static int 2389convert_regs_entry () 2390{ 2391 int inserted = 0; 2392 edge e; 2393 basic_block block; 2394 2395 FOR_EACH_BB_REVERSE (block) 2396 { 2397 block_info bi = BLOCK_INFO (block); 2398 int reg; 2399 2400 /* Set current register status at last instruction `uninitialized'. */ 2401 bi->stack_in.top = -2; 2402 2403 /* Copy live_at_end and live_at_start into temporaries. */ 2404 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 2405 { 2406 if (REGNO_REG_SET_P (block->global_live_at_end, reg)) 2407 SET_HARD_REG_BIT (bi->out_reg_set, reg); 2408 if (REGNO_REG_SET_P (block->global_live_at_start, reg)) 2409 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 2410 } 2411 } 2412 2413 /* Load something into each stack register live at function entry. 2414 Such live registers can be caused by uninitialized variables or 2415 functions not returning values on all paths. In order to keep 2416 the push/pop code happy, and to not scrog the register stack, we 2417 must put something in these registers. Use a QNaN. 2418 2419 Note that we are insertting converted code here. This code is 2420 never seen by the convert_regs pass. */ 2421 2422 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) 2423 { 2424 basic_block block = e->dest; 2425 block_info bi = BLOCK_INFO (block); 2426 int reg, top = -1; 2427 2428 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2429 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2430 { 2431 rtx init; 2432 2433 bi->stack_in.reg[++top] = reg; 2434 2435 init = gen_rtx_SET (VOIDmode, 2436 FP_MODE_REG (FIRST_STACK_REG, SFmode), 2437 nan); 2438 insert_insn_on_edge (init, e); 2439 inserted = 1; 2440 } 2441 2442 bi->stack_in.top = top; 2443 } 2444 2445 return inserted; 2446} 2447 2448/* Construct the desired stack for function exit. This will either 2449 be `empty', or the function return value at top-of-stack. */ 2450 2451static void 2452convert_regs_exit () 2453{ 2454 int value_reg_low, value_reg_high; 2455 stack output_stack; 2456 rtx retvalue; 2457 2458 retvalue = stack_result (current_function_decl); 2459 value_reg_low = value_reg_high = -1; 2460 if (retvalue) 2461 { 2462 value_reg_low = REGNO (retvalue); 2463 value_reg_high = value_reg_low 2464 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1; 2465 } 2466 2467 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; 2468 if (value_reg_low == -1) 2469 output_stack->top = -1; 2470 else 2471 { 2472 int reg; 2473 2474 output_stack->top = value_reg_high - value_reg_low; 2475 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2476 { 2477 output_stack->reg[value_reg_high - reg] = reg; 2478 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2479 } 2480 } 2481} 2482 2483/* Adjust the stack of this block on exit to match the stack of the 2484 target block, or copy stack info into the stack of the successor 2485 of the successor hasn't been processed yet. */ 2486static bool 2487compensate_edge (e, file) 2488 edge e; 2489 FILE *file; 2490{ 2491 basic_block block = e->src, target = e->dest; 2492 block_info bi = BLOCK_INFO (block); 2493 struct stack_def regstack, tmpstack; 2494 stack target_stack = &BLOCK_INFO (target)->stack_in; 2495 int reg; 2496 2497 current_block = block; 2498 regstack = bi->stack_out; 2499 if (file) 2500 fprintf (file, "Edge %d->%d: ", block->index, target->index); 2501 2502 if (target_stack->top == -2) 2503 { 2504 /* The target block hasn't had a stack order selected. 2505 We need merely ensure that no pops are needed. */ 2506 for (reg = regstack.top; reg >= 0; --reg) 2507 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg])) 2508 break; 2509 2510 if (reg == -1) 2511 { 2512 if (file) 2513 fprintf (file, "new block; copying stack position\n"); 2514 2515 /* change_stack kills values in regstack. */ 2516 tmpstack = regstack; 2517 2518 change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER); 2519 return false; 2520 } 2521 2522 if (file) 2523 fprintf (file, "new block; pops needed\n"); 2524 } 2525 else 2526 { 2527 if (target_stack->top == regstack.top) 2528 { 2529 for (reg = target_stack->top; reg >= 0; --reg) 2530 if (target_stack->reg[reg] != regstack.reg[reg]) 2531 break; 2532 2533 if (reg == -1) 2534 { 2535 if (file) 2536 fprintf (file, "no changes needed\n"); 2537 return false; 2538 } 2539 } 2540 2541 if (file) 2542 { 2543 fprintf (file, "correcting stack to "); 2544 print_stack (file, target_stack); 2545 } 2546 } 2547 2548 /* Care for non-call EH edges specially. The normal return path have 2549 values in registers. These will be popped en masse by the unwind 2550 library. */ 2551 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH) 2552 target_stack->top = -1; 2553 2554 /* Other calls may appear to have values live in st(0), but the 2555 abnormal return path will not have actually loaded the values. */ 2556 else if (e->flags & EDGE_ABNORMAL_CALL) 2557 { 2558 /* Assert that the lifetimes are as we expect -- one value 2559 live at st(0) on the end of the source block, and no 2560 values live at the beginning of the destination block. */ 2561 HARD_REG_SET tmp; 2562 2563 CLEAR_HARD_REG_SET (tmp); 2564 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1); 2565 abort (); 2566 eh1: 2567 2568 /* We are sure that there is st(0) live, otherwise we won't compensate. 2569 For complex return values, we may have st(1) live as well. */ 2570 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG); 2571 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1)) 2572 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1); 2573 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2); 2574 abort (); 2575 eh2: 2576 2577 target_stack->top = -1; 2578 } 2579 2580 /* It is better to output directly to the end of the block 2581 instead of to the edge, because emit_swap can do minimal 2582 insn scheduling. We can do this when there is only one 2583 edge out, and it is not abnormal. */ 2584 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL)) 2585 { 2586 /* change_stack kills values in regstack. */ 2587 tmpstack = regstack; 2588 2589 change_stack (block->end, &tmpstack, target_stack, 2590 (GET_CODE (block->end) == JUMP_INSN 2591 ? EMIT_BEFORE : EMIT_AFTER)); 2592 } 2593 else 2594 { 2595 rtx seq, after; 2596 2597 /* We don't support abnormal edges. Global takes care to 2598 avoid any live register across them, so we should never 2599 have to insert instructions on such edges. */ 2600 if (e->flags & EDGE_ABNORMAL) 2601 abort (); 2602 2603 current_block = NULL; 2604 start_sequence (); 2605 2606 /* ??? change_stack needs some point to emit insns after. */ 2607 after = emit_note (NULL, NOTE_INSN_DELETED); 2608 2609 tmpstack = regstack; 2610 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE); 2611 2612 seq = get_insns (); 2613 end_sequence (); 2614 2615 insert_insn_on_edge (seq, e); 2616 return true; 2617 } 2618 return false; 2619} 2620 2621/* Convert stack register references in one block. */ 2622 2623static int 2624convert_regs_1 (file, block) 2625 FILE *file; 2626 basic_block block; 2627{ 2628 struct stack_def regstack; 2629 block_info bi = BLOCK_INFO (block); 2630 int deleted, inserted, reg; 2631 rtx insn, next; 2632 edge e, beste = NULL; 2633 bool control_flow_insn_deleted = false; 2634 2635 inserted = 0; 2636 deleted = 0; 2637 any_malformed_asm = false; 2638 2639 /* Find the edge we will copy stack from. It should be the most frequent 2640 one as it will get cheapest after compensation code is generated, 2641 if multiple such exists, take one with largest count, prefer critical 2642 one (as splitting critical edges is more expensive), or one with lowest 2643 index, to avoid random changes with different orders of the edges. */ 2644 for (e = block->pred; e ; e = e->pred_next) 2645 { 2646 if (e->flags & EDGE_DFS_BACK) 2647 ; 2648 else if (! beste) 2649 beste = e; 2650 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e)) 2651 beste = e; 2652 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e)) 2653 ; 2654 else if (beste->count < e->count) 2655 beste = e; 2656 else if (beste->count > e->count) 2657 ; 2658 else if ((EDGE_CRITICAL_P (e) != 0) 2659 != (EDGE_CRITICAL_P (beste) != 0)) 2660 { 2661 if (EDGE_CRITICAL_P (e)) 2662 beste = e; 2663 } 2664 else if (e->src->index < beste->src->index) 2665 beste = e; 2666 } 2667 2668 /* Initialize stack at block entry. */ 2669 if (bi->stack_in.top == -2) 2670 { 2671 if (beste) 2672 inserted |= compensate_edge (beste, file); 2673 else 2674 { 2675 /* No predecessors. Create an arbitrary input stack. */ 2676 int reg; 2677 2678 bi->stack_in.top = -1; 2679 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2680 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2681 bi->stack_in.reg[++bi->stack_in.top] = reg; 2682 } 2683 } 2684 else 2685 /* Entry blocks do have stack already initialized. */ 2686 beste = NULL; 2687 2688 current_block = block; 2689 2690 if (file) 2691 { 2692 fprintf (file, "\nBasic block %d\nInput stack: ", block->index); 2693 print_stack (file, &bi->stack_in); 2694 } 2695 2696 /* Process all insns in this block. Keep track of NEXT so that we 2697 don't process insns emitted while substituting in INSN. */ 2698 next = block->head; 2699 regstack = bi->stack_in; 2700 do 2701 { 2702 insn = next; 2703 next = NEXT_INSN (insn); 2704 2705 /* Ensure we have not missed a block boundary. */ 2706 if (next == NULL) 2707 abort (); 2708 if (insn == block->end) 2709 next = NULL; 2710 2711 /* Don't bother processing unless there is a stack reg 2712 mentioned or if it's a CALL_INSN. */ 2713 if (stack_regs_mentioned (insn) 2714 || GET_CODE (insn) == CALL_INSN) 2715 { 2716 if (file) 2717 { 2718 fprintf (file, " insn %d input stack: ", 2719 INSN_UID (insn)); 2720 print_stack (file, ®stack); 2721 } 2722 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2723 } 2724 } 2725 while (next); 2726 2727 if (file) 2728 { 2729 fprintf (file, "Expected live registers ["); 2730 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2731 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 2732 fprintf (file, " %d", reg); 2733 fprintf (file, " ]\nOutput stack: "); 2734 print_stack (file, ®stack); 2735 } 2736 2737 insn = block->end; 2738 if (GET_CODE (insn) == JUMP_INSN) 2739 insn = PREV_INSN (insn); 2740 2741 /* If the function is declared to return a value, but it returns one 2742 in only some cases, some registers might come live here. Emit 2743 necessary moves for them. */ 2744 2745 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2746 { 2747 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 2748 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 2749 { 2750 rtx set; 2751 2752 if (file) 2753 { 2754 fprintf (file, "Emitting insn initializing reg %d\n", 2755 reg); 2756 } 2757 2758 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), 2759 nan); 2760 insn = emit_insn_after (set, insn); 2761 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2762 } 2763 } 2764 2765 /* Amongst the insns possibly deleted during the substitution process above, 2766 might have been the only trapping insn in the block. We purge the now 2767 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 2768 called at the end of convert_regs. The order in which we process the 2769 blocks ensures that we never delete an already processed edge. 2770 2771 Note that, at this point, the CFG may have been damaged by the emission 2772 of instructions after an abnormal call, which moves the basic block end 2773 (and is the reason why we call fixup_abnormal_edges later). So we must 2774 be sure that the trapping insn has been deleted before trying to purge 2775 dead edges, otherwise we risk purging valid edges. 2776 2777 ??? We are normally supposed not to delete trapping insns, so we pretend 2778 that the insns deleted above don't actually trap. It would have been 2779 better to detect this earlier and avoid creating the EH edge in the first 2780 place, still, but we don't have enough information at that time. */ 2781 2782 if (control_flow_insn_deleted) 2783 purge_dead_edges (block); 2784 2785 /* Something failed if the stack lives don't match. If we had malformed 2786 asms, we zapped the instruction itself, but that didn't produce the 2787 same pattern of register kills as before. */ 2788 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win); 2789 if (!any_malformed_asm) 2790 abort (); 2791 win: 2792 bi->stack_out = regstack; 2793 2794 /* Compensate the back edges, as those wasn't visited yet. */ 2795 for (e = block->succ; e ; e = e->succ_next) 2796 { 2797 if (e->flags & EDGE_DFS_BACK 2798 || (e->dest == EXIT_BLOCK_PTR)) 2799 { 2800 if (!BLOCK_INFO (e->dest)->done 2801 && e->dest != block) 2802 abort (); 2803 inserted |= compensate_edge (e, file); 2804 } 2805 } 2806 for (e = block->pred; e ; e = e->pred_next) 2807 { 2808 if (e != beste && !(e->flags & EDGE_DFS_BACK) 2809 && e->src != ENTRY_BLOCK_PTR) 2810 { 2811 if (!BLOCK_INFO (e->src)->done) 2812 abort (); 2813 inserted |= compensate_edge (e, file); 2814 } 2815 } 2816 2817 return inserted; 2818} 2819 2820/* Convert registers in all blocks reachable from BLOCK. */ 2821 2822static int 2823convert_regs_2 (file, block) 2824 FILE *file; 2825 basic_block block; 2826{ 2827 basic_block *stack, *sp; 2828 int inserted; 2829 2830 /* We process the blocks in a top-down manner, in a way such that one block 2831 is only processed after all its predecessors. The number of predecessors 2832 of every block has already been computed. */ 2833 2834 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks); 2835 sp = stack; 2836 2837 *sp++ = block; 2838 2839 inserted = 0; 2840 do 2841 { 2842 edge e; 2843 2844 block = *--sp; 2845 2846 /* Processing BLOCK is achieved by convert_regs_1, which may purge 2847 some dead EH outgoing edge after the deletion of the trapping 2848 insn inside the block. Since the number of predecessors of 2849 BLOCK's successors was computed based on the initial edge set, 2850 we check the necessity to process some of these successors 2851 before such an edge deletion may happen. However, there is 2852 a pitfall: if BLOCK is the only predecessor of a successor and 2853 the edge between them happens to be deleted, the successor 2854 becomes unreachable and should not be processed. The problem 2855 is that there is no way to preventively detect this case so we 2856 stack the successor in all cases and hand over the task of 2857 fixing up the discrepancy to convert_regs_1. */ 2858 2859 for (e = block->succ; e ; e = e->succ_next) 2860 if (! (e->flags & EDGE_DFS_BACK)) 2861 { 2862 BLOCK_INFO (e->dest)->predecessors--; 2863 if (!BLOCK_INFO (e->dest)->predecessors) 2864 *sp++ = e->dest; 2865 } 2866 2867 inserted |= convert_regs_1 (file, block); 2868 BLOCK_INFO (block)->done = 1; 2869 } 2870 while (sp != stack); 2871 2872 return inserted; 2873} 2874 2875/* Traverse all basic blocks in a function, converting the register 2876 references in each insn from the "flat" register file that gcc uses, 2877 to the stack-like registers the 387 uses. */ 2878 2879static int 2880convert_regs (file) 2881 FILE *file; 2882{ 2883 int inserted; 2884 basic_block b; 2885 edge e; 2886 2887 /* Initialize uninitialized registers on function entry. */ 2888 inserted = convert_regs_entry (); 2889 2890 /* Construct the desired stack for function exit. */ 2891 convert_regs_exit (); 2892 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; 2893 2894 /* ??? Future: process inner loops first, and give them arbitrary 2895 initial stacks which emit_swap_insn can modify. This ought to 2896 prevent double fxch that aften appears at the head of a loop. */ 2897 2898 /* Process all blocks reachable from all entry points. */ 2899 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) 2900 inserted |= convert_regs_2 (file, e->dest); 2901 2902 /* ??? Process all unreachable blocks. Though there's no excuse 2903 for keeping these even when not optimizing. */ 2904 FOR_EACH_BB (b) 2905 { 2906 block_info bi = BLOCK_INFO (b); 2907 2908 if (! bi->done) 2909 inserted |= convert_regs_2 (file, b); 2910 } 2911 clear_aux_for_blocks (); 2912 2913 fixup_abnormal_edges (); 2914 if (inserted) 2915 commit_edge_insertions (); 2916 2917 if (file) 2918 fputc ('\n', file); 2919 2920 return inserted; 2921} 2922#endif /* STACK_REGS */ 2923 2924#include "gt-reg-stack.h" 2925