1/* Definitions of target machine for GNU compiler. 2 Matsushita MN10300 series 3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002 4 Free Software Foundation, Inc. 5 Contributed by Jeff Law (law@cygnus.com). 6 7This file is part of GNU CC. 8 9GNU CC is free software; you can redistribute it and/or modify 10it under the terms of the GNU General Public License as published by 11the Free Software Foundation; either version 2, or (at your option) 12any later version. 13 14GNU CC is distributed in the hope that it will be useful, 15but WITHOUT ANY WARRANTY; without even the implied warranty of 16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17GNU General Public License for more details. 18 19You should have received a copy of the GNU General Public License 20along with GNU CC; see the file COPYING. If not, write to 21the Free Software Foundation, 59 Temple Place - Suite 330, 22Boston, MA 02111-1307, USA. */ 23 24 25#undef ASM_SPEC 26#undef ASM_FINAL_SPEC 27#undef LIB_SPEC 28#undef ENDFILE_SPEC 29#undef LINK_SPEC 30#define LINK_SPEC "%{mrelax:--relax}" 31#undef STARTFILE_SPEC 32#define STARTFILE_SPEC "%{!mno-crt0:%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}" 33 34/* Names to predefine in the preprocessor for this target machine. */ 35 36#define CPP_PREDEFINES "-D__mn10300__ -D__MN10300__" 37 38#define CPP_SPEC "%{mam33:-D__AM33__}" 39 40/* Run-time compilation parameters selecting different hardware subsets. */ 41 42extern int target_flags; 43 44/* Macros used in the machine description to test the flags. */ 45 46/* Macro to define tables used to set the flags. 47 This is a list in braces of pairs in braces, 48 each pair being { "NAME", VALUE } 49 where VALUE is the bits to set or minus the bits to clear. 50 An empty string NAME is used to identify the default VALUE. */ 51 52/* Generate code to work around mul/mulq bugs on the mn10300. */ 53#define TARGET_MULT_BUG (target_flags & 0x1) 54 55/* Generate code for the AM33 processor. */ 56#define TARGET_AM33 (target_flags & 0x2) 57 58#define TARGET_SWITCHES \ 59 {{ "mult-bug", 0x1, N_("Work around hardware multiply bug")}, \ 60 { "no-mult-bug", -0x1, N_("Do not work around hardware multiply bug")},\ 61 { "am33", 0x2, N_("Target the AM33 processor")}, \ 62 { "am33", -(0x1), ""},\ 63 { "no-am33", -0x2, ""}, \ 64 { "no-crt0", 0, N_("No default crt0.o") }, \ 65 { "relax", 0, N_("Enable linker relaxations") }, \ 66 { "", TARGET_DEFAULT, NULL}} 67 68#ifndef TARGET_DEFAULT 69#define TARGET_DEFAULT 0x1 70#endif 71 72/* Print subsidiary information on the compiler version in use. */ 73 74#define TARGET_VERSION fprintf (stderr, " (MN10300)"); 75 76 77/* Target machine storage layout */ 78 79/* Define this if most significant bit is lowest numbered 80 in instructions that operate on numbered bit-fields. 81 This is not true on the Matsushita MN1003. */ 82#define BITS_BIG_ENDIAN 0 83 84/* Define this if most significant byte of a word is the lowest numbered. */ 85/* This is not true on the Matsushita MN10300. */ 86#define BYTES_BIG_ENDIAN 0 87 88/* Define this if most significant word of a multiword number is lowest 89 numbered. 90 This is not true on the Matsushita MN10300. */ 91#define WORDS_BIG_ENDIAN 0 92 93/* Width of a word, in units (bytes). */ 94#define UNITS_PER_WORD 4 95 96/* Allocation boundary (in *bits*) for storing arguments in argument list. */ 97#define PARM_BOUNDARY 32 98 99/* The stack goes in 32 bit lumps. */ 100#define STACK_BOUNDARY 32 101 102/* Allocation boundary (in *bits*) for the code of a function. 103 8 is the minimum boundary; it's unclear if bigger alignments 104 would improve performance. */ 105#define FUNCTION_BOUNDARY 8 106 107/* No data type wants to be aligned rounder than this. */ 108#define BIGGEST_ALIGNMENT 32 109 110/* Alignment of field after `int : 0' in a structure. */ 111#define EMPTY_FIELD_BOUNDARY 32 112 113/* Define this if move instructions will actually fail to work 114 when given unaligned data. */ 115#define STRICT_ALIGNMENT 1 116 117/* Define this as 1 if `char' should by default be signed; else as 0. */ 118#define DEFAULT_SIGNED_CHAR 0 119 120/* Standard register usage. */ 121 122/* Number of actual hardware registers. 123 The hardware registers are assigned numbers for the compiler 124 from 0 to just below FIRST_PSEUDO_REGISTER. 125 126 All registers that the compiler knows about must be given numbers, 127 even those that are not normally considered general registers. */ 128 129#define FIRST_PSEUDO_REGISTER 18 130 131/* Specify machine-specific register numbers. */ 132#define FIRST_DATA_REGNUM 0 133#define LAST_DATA_REGNUM 3 134#define FIRST_ADDRESS_REGNUM 4 135#define LAST_ADDRESS_REGNUM 8 136#define FIRST_EXTENDED_REGNUM 10 137#define LAST_EXTENDED_REGNUM 17 138 139/* Specify the registers used for certain standard purposes. 140 The values of these macros are register numbers. */ 141 142/* Register to use for pushing function arguments. */ 143#define STACK_POINTER_REGNUM (LAST_ADDRESS_REGNUM+1) 144 145/* Base register for access to local variables of the function. */ 146#define FRAME_POINTER_REGNUM (LAST_ADDRESS_REGNUM-1) 147 148/* Base register for access to arguments of the function. This 149 is a fake register and will be eliminated into either the frame 150 pointer or stack pointer. */ 151#define ARG_POINTER_REGNUM LAST_ADDRESS_REGNUM 152 153/* Register in which static-chain is passed to a function. */ 154#define STATIC_CHAIN_REGNUM (FIRST_ADDRESS_REGNUM+1) 155 156/* 1 for registers that have pervasive standard uses 157 and are not available for the register allocator. */ 158 159#define FIXED_REGISTERS \ 160 { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0} 161 162/* 1 for registers not available across function calls. 163 These must include the FIXED_REGISTERS and also any 164 registers that can be used without being saved. 165 The latter must include the registers where values are returned 166 and the register where structure-value addresses are passed. 167 Aside from that, you can include as many other registers as you 168 like. */ 169 170#define CALL_USED_REGISTERS \ 171 { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0} 172 173#define REG_ALLOC_ORDER \ 174 { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9} 175 176#define CONDITIONAL_REGISTER_USAGE \ 177{ \ 178 unsigned int i; \ 179 \ 180 if (!TARGET_AM33) \ 181 { \ 182 for (i = FIRST_EXTENDED_REGNUM; \ 183 i <= LAST_EXTENDED_REGNUM; i++) \ 184 fixed_regs[i] = call_used_regs[i] = 1; \ 185 } \ 186} 187 188/* Return number of consecutive hard regs needed starting at reg REGNO 189 to hold something of mode MODE. 190 191 This is ordinarily the length in words of a value of mode MODE 192 but can be less for certain modes in special long registers. */ 193 194#define HARD_REGNO_NREGS(REGNO, MODE) \ 195 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 196 197/* Value is 1 if hard register REGNO can hold a value of machine-mode 198 MODE. */ 199 200#define HARD_REGNO_MODE_OK(REGNO, MODE) \ 201 ((REGNO_REG_CLASS (REGNO) == DATA_REGS \ 202 || (TARGET_AM33 && REGNO_REG_CLASS (REGNO) == ADDRESS_REGS) \ 203 || REGNO_REG_CLASS (REGNO) == EXTENDED_REGS) \ 204 ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4 \ 205 : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4) 206 207/* Value is 1 if it is a good idea to tie two pseudo registers 208 when one has mode MODE1 and one has mode MODE2. 209 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 210 for any hard reg, then this must be 0 for correct output. */ 211#define MODES_TIEABLE_P(MODE1, MODE2) \ 212 (TARGET_AM33 \ 213 || MODE1 == MODE2 \ 214 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4)) 215 216/* 4 data, and effectively 3 address registers is small as far as I'm 217 concerned. */ 218#define SMALL_REGISTER_CLASSES 1 219 220/* Define the classes of registers for register constraints in the 221 machine description. Also define ranges of constants. 222 223 One of the classes must always be named ALL_REGS and include all hard regs. 224 If there is more than one class, another class must be named NO_REGS 225 and contain no registers. 226 227 The name GENERAL_REGS must be the name of a class (or an alias for 228 another name such as ALL_REGS). This is the class of registers 229 that is allowed by "g" or "r" in a register constraint. 230 Also, registers outside this class are allocated only when 231 instructions express preferences for them. 232 233 The classes must be numbered in nondecreasing order; that is, 234 a larger-numbered class must never be contained completely 235 in a smaller-numbered class. 236 237 For any two classes, it is very desirable that there be another 238 class that represents their union. */ 239 240enum reg_class { 241 NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS, 242 DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, 243 EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, 244 SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, 245 GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES 246}; 247 248#define N_REG_CLASSES (int) LIM_REG_CLASSES 249 250/* Give names of register classes as strings for dump file. */ 251 252#define REG_CLASS_NAMES \ 253{ "NO_REGS", "DATA_REGS", "ADDRESS_REGS", \ 254 "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS", \ 255 "EXTENDED_REGS", \ 256 "DATA_OR_EXTENDED_REGS", "ADDRESS_OR_EXTENDED_REGS", \ 257 "SP_OR_EXTENDED_REGS", "SP_OR_ADDRESS_OR_EXTENDED_REGS", \ 258 "GENERAL_REGS", "ALL_REGS", "LIM_REGS" } 259 260/* Define which registers fit in which classes. 261 This is an initializer for a vector of HARD_REG_SET 262 of length N_REG_CLASSES. */ 263 264#define REG_CLASS_CONTENTS \ 265{ {0}, /* No regs */ \ 266 {0x0000f}, /* DATA_REGS */ \ 267 {0x001f0}, /* ADDRESS_REGS */ \ 268 {0x00200}, /* SP_REGS */ \ 269 {0x001ff}, /* DATA_OR_ADDRESS_REGS */\ 270 {0x003f0}, /* SP_OR_ADDRESS_REGS */\ 271 {0x3fc00}, /* EXTENDED_REGS */ \ 272 {0x3fc0f}, /* DATA_OR_EXTENDED_REGS */ \ 273 {0x3fdf0}, /* ADDRESS_OR_EXTENDED_REGS */ \ 274 {0x3fe00}, /* SP_OR_EXTENDED_REGS */ \ 275 {0x3fff0}, /* SP_OR_ADDRESS_OR_EXTENDED_REGS */ \ 276 {0x3fdff}, /* GENERAL_REGS */ \ 277 {0x3ffff}, /* ALL_REGS */ \ 278} 279 280/* The same information, inverted: 281 Return the class number of the smallest class containing 282 reg number REGNO. This could be a conditional expression 283 or could index an array. */ 284 285#define REGNO_REG_CLASS(REGNO) \ 286 ((REGNO) <= LAST_DATA_REGNUM ? DATA_REGS : \ 287 (REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS : \ 288 (REGNO) == STACK_POINTER_REGNUM ? SP_REGS : \ 289 (REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \ 290 NO_REGS) 291 292/* The class value for index registers, and the one for base regs. */ 293#define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS 294#define BASE_REG_CLASS SP_OR_ADDRESS_REGS 295 296/* Get reg_class from a letter such as appears in the machine description. */ 297 298#define REG_CLASS_FROM_LETTER(C) \ 299 ((C) == 'd' ? DATA_REGS : \ 300 (C) == 'a' ? ADDRESS_REGS : \ 301 (C) == 'y' ? SP_REGS : \ 302 ! TARGET_AM33 ? NO_REGS : \ 303 (C) == 'x' ? EXTENDED_REGS : \ 304 NO_REGS) 305 306/* Macros to check register numbers against specific register classes. */ 307 308/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 309 and check its validity for a certain class. 310 We have two alternate definitions for each of them. 311 The usual definition accepts all pseudo regs; the other rejects 312 them unless they have been allocated suitable hard regs. 313 The symbol REG_OK_STRICT causes the latter definition to be used. 314 315 Most source files want to accept pseudo regs in the hope that 316 they will get allocated to the class that the insn wants them to be in. 317 Source files for reload pass need to be strict. 318 After reload, it makes no difference, since pseudo regs have 319 been eliminated by then. */ 320 321/* These assume that REGNO is a hard or pseudo reg number. 322 They give nonzero only if REGNO is a hard reg of the suitable class 323 or a pseudo reg currently allocated to a suitable hard reg. 324 Since they use reg_renumber, they are safe only once reg_renumber 325 has been allocated, which happens in local-alloc.c. */ 326 327#ifndef REG_OK_STRICT 328# define REGNO_IN_RANGE_P(regno,min,max) \ 329 (IN_RANGE ((regno), (min), (max)) || (regno) >= FIRST_PSEUDO_REGISTER) 330#else 331# define REGNO_IN_RANGE_P(regno,min,max) \ 332 (IN_RANGE ((regno), (min), (max)) \ 333 || (reg_renumber \ 334 && reg_renumber[(regno)] >= (min) && reg_renumber[(regno)] <= (max))) 335#endif 336 337#define REGNO_DATA_P(regno) \ 338 REGNO_IN_RANGE_P ((regno), FIRST_DATA_REGNUM, LAST_DATA_REGNUM) 339#define REGNO_ADDRESS_P(regno) \ 340 REGNO_IN_RANGE_P ((regno), FIRST_ADDRESS_REGNUM, LAST_ADDRESS_REGNUM) 341#define REGNO_SP_P(regno) \ 342 REGNO_IN_RANGE_P ((regno), STACK_POINTER_REGNUM, STACK_POINTER_REGNUM) 343#define REGNO_EXTENDED_P(regno) \ 344 REGNO_IN_RANGE_P ((regno), FIRST_EXTENDED_REGNUM, LAST_EXTENDED_REGNUM) 345#define REGNO_AM33_P(regno) \ 346 (REGNO_DATA_P ((regno)) || REGNO_ADDRESS_P ((regno)) \ 347 || REGNO_EXTENDED_P ((regno))) 348 349#define REGNO_OK_FOR_BASE_P(regno) \ 350 (REGNO_SP_P ((regno)) \ 351 || REGNO_ADDRESS_P ((regno)) || REGNO_EXTENDED_P ((regno))) 352#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 353 354#define REGNO_OK_FOR_BIT_BASE_P(regno) \ 355 (REGNO_SP_P ((regno)) || REGNO_ADDRESS_P ((regno))) 356#define REG_OK_FOR_BIT_BASE_P(X) REGNO_OK_FOR_BIT_BASE_P (REGNO (X)) 357 358#define REGNO_OK_FOR_INDEX_P(regno) \ 359 (REGNO_DATA_P ((regno)) || REGNO_EXTENDED_P ((regno))) 360#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 361 362/* Given an rtx X being reloaded into a reg required to be 363 in class CLASS, return the class of reg to actually use. 364 In general this is just CLASS; but on some machines 365 in some cases it is preferable to use a more restrictive class. */ 366 367#define PREFERRED_RELOAD_CLASS(X,CLASS) \ 368 ((X) == stack_pointer_rtx && (CLASS) != SP_REGS \ 369 ? ADDRESS_OR_EXTENDED_REGS \ 370 : (GET_CODE (X) == MEM \ 371 || (GET_CODE (X) == REG \ 372 && REGNO (X) >= FIRST_PSEUDO_REGISTER) \ 373 || (GET_CODE (X) == SUBREG \ 374 && GET_CODE (SUBREG_REG (X)) == REG \ 375 && REGNO (SUBREG_REG (X)) >= FIRST_PSEUDO_REGISTER) \ 376 ? LIMIT_RELOAD_CLASS (GET_MODE (X), CLASS) \ 377 : (CLASS))) 378 379#define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) \ 380 (X == stack_pointer_rtx && CLASS != SP_REGS \ 381 ? ADDRESS_OR_EXTENDED_REGS : CLASS) 382 383#define LIMIT_RELOAD_CLASS(MODE, CLASS) \ 384 (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS) 385 386#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \ 387 secondary_reload_class(CLASS,MODE,IN) 388 389/* Return the maximum number of consecutive registers 390 needed to represent mode MODE in a register of class CLASS. */ 391 392#define CLASS_MAX_NREGS(CLASS, MODE) \ 393 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 394 395/* The letters I, J, K, L, M, N, O, P in a register constraint string 396 can be used to stand for particular ranges of immediate operands. 397 This macro defines what the ranges are. 398 C is the letter, and VALUE is a constant value. 399 Return 1 if VALUE is in the range specified by C. */ 400 401#define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100) 402#define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000) 403 404#define CONST_OK_FOR_I(VALUE) ((VALUE) == 0) 405#define CONST_OK_FOR_J(VALUE) ((VALUE) == 1) 406#define CONST_OK_FOR_K(VALUE) ((VALUE) == 2) 407#define CONST_OK_FOR_L(VALUE) ((VALUE) == 4) 408#define CONST_OK_FOR_M(VALUE) ((VALUE) == 3) 409#define CONST_OK_FOR_N(VALUE) ((VALUE) == 255 || (VALUE) == 65535) 410 411#define CONST_OK_FOR_LETTER_P(VALUE, C) \ 412 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \ 413 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \ 414 (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \ 415 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \ 416 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \ 417 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : 0) 418 419 420/* Similar, but for floating constants, and defining letters G and H. 421 Here VALUE is the CONST_DOUBLE rtx itself. 422 423 `G' is a floating-point zero. */ 424 425#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 426 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \ 427 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) : 0) 428 429 430/* Stack layout; function entry, exit and calling. */ 431 432/* Define this if pushing a word on the stack 433 makes the stack pointer a smaller address. */ 434 435#define STACK_GROWS_DOWNWARD 436 437/* Define this if the nominal address of the stack frame 438 is at the high-address end of the local variables; 439 that is, each additional local variable allocated 440 goes at a more negative offset in the frame. */ 441 442#define FRAME_GROWS_DOWNWARD 443 444/* Offset within stack frame to start allocating local variables at. 445 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 446 first local allocated. Otherwise, it is the offset to the BEGINNING 447 of the first local allocated. */ 448 449#define STARTING_FRAME_OFFSET 0 450 451/* Offset of first parameter from the argument pointer register value. */ 452/* Is equal to the size of the saved fp + pc, even if an fp isn't 453 saved since the value is used before we know. */ 454 455#define FIRST_PARM_OFFSET(FNDECL) 4 456 457#define ELIMINABLE_REGS \ 458{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 459 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 460 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 461 462#define CAN_ELIMINATE(FROM, TO) 1 463 464#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 465 OFFSET = initial_offset (FROM, TO) 466 467/* We can debug without frame pointers on the mn10300, so eliminate 468 them whenever possible. */ 469#define FRAME_POINTER_REQUIRED 0 470#define CAN_DEBUG_WITHOUT_FP 471 472/* A guess for the MN10300. */ 473#define PROMOTE_PROTOTYPES 1 474 475/* Value is the number of bytes of arguments automatically 476 popped when returning from a subroutine call. 477 FUNDECL is the declaration node of the function (as a tree), 478 FUNTYPE is the data type of the function (as a tree), 479 or for a library call it is an identifier node for the subroutine name. 480 SIZE is the number of bytes of arguments passed on the stack. */ 481 482#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 483 484/* We use d0/d1 for passing parameters, so allocate 8 bytes of space 485 for a register flushback area. */ 486#define REG_PARM_STACK_SPACE(DECL) 8 487#define OUTGOING_REG_PARM_STACK_SPACE 488#define ACCUMULATE_OUTGOING_ARGS 1 489 490/* So we can allocate space for return pointers once for the function 491 instead of around every call. */ 492#define STACK_POINTER_OFFSET 4 493 494/* 1 if N is a possible register number for function argument passing. 495 On the MN10300, no registers are used in this way. */ 496 497#define FUNCTION_ARG_REGNO_P(N) ((N) <= 1) 498 499 500/* Define a data type for recording info about an argument list 501 during the scan of that argument list. This data type should 502 hold all necessary information about the function itself 503 and about the args processed so far, enough to enable macros 504 such as FUNCTION_ARG to determine where the next arg should go. 505 506 On the MN10300, this is a single integer, which is a number of bytes 507 of arguments scanned so far. */ 508 509#define CUMULATIVE_ARGS struct cum_arg 510struct cum_arg {int nbytes; }; 511 512/* Initialize a variable CUM of type CUMULATIVE_ARGS 513 for a call to a function whose data type is FNTYPE. 514 For a library call, FNTYPE is 0. 515 516 On the MN10300, the offset starts at 0. */ 517 518#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \ 519 ((CUM).nbytes = 0) 520 521/* Update the data in CUM to advance over an argument 522 of mode MODE and data type TYPE. 523 (TYPE is null for libcalls where that information may not be available.) */ 524 525#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 526 ((CUM).nbytes += ((MODE) != BLKmode \ 527 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \ 528 : (int_size_in_bytes (TYPE) + 3) & ~3)) 529 530/* Define where to put the arguments to a function. 531 Value is zero to push the argument on the stack, 532 or a hard register in which to store the argument. 533 534 MODE is the argument's machine mode. 535 TYPE is the data type of the argument (as a tree). 536 This is null for libcalls where that information may 537 not be available. 538 CUM is a variable of type CUMULATIVE_ARGS which gives info about 539 the preceding args and about the function being called. 540 NAMED is nonzero if this argument is a named parameter 541 (otherwise it is an extra parameter matching an ellipsis). */ 542 543/* On the MN10300 all args are pushed. */ 544 545#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 546 function_arg (&CUM, MODE, TYPE, NAMED) 547 548#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ 549 function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) 550 551#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ 552 ((TYPE) && int_size_in_bytes (TYPE) > 8) 553 554#define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \ 555 ((TYPE) && int_size_in_bytes (TYPE) > 8) 556 557/* Define how to find the value returned by a function. 558 VALTYPE is the data type of the value (as a tree). 559 If the precise function being called is known, FUNC is its FUNCTION_DECL; 560 otherwise, FUNC is 0. */ 561 562#define FUNCTION_VALUE(VALTYPE, FUNC) \ 563 gen_rtx_REG (TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) \ 564 ? FIRST_ADDRESS_REGNUM : FIRST_DATA_REGNUM) 565 566/* Define how to find the value returned by a library function 567 assuming the value has mode MODE. */ 568 569#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_DATA_REGNUM) 570 571/* 1 if N is a possible register number for a function value. */ 572 573#define FUNCTION_VALUE_REGNO_P(N) \ 574 ((N) == FIRST_DATA_REGNUM || (N) == FIRST_ADDRESS_REGNUM) 575 576/* Return values > 8 bytes in length in memory. */ 577#define DEFAULT_PCC_STRUCT_RETURN 0 578#define RETURN_IN_MEMORY(TYPE) \ 579 (int_size_in_bytes (TYPE) > 8 || TYPE_MODE (TYPE) == BLKmode) 580 581/* Register in which address to store a structure value 582 is passed to a function. On the MN10300 it's passed as 583 the first parameter. */ 584 585#define STRUCT_VALUE FIRST_DATA_REGNUM 586 587/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 588 the stack pointer does not matter. The value is tested only in 589 functions that have frame pointers. 590 No definition is equivalent to always zero. */ 591 592#define EXIT_IGNORE_STACK 1 593 594/* Output assembler code to FILE to increment profiler label # LABELNO 595 for profiling a function entry. */ 596 597#define FUNCTION_PROFILER(FILE, LABELNO) ; 598 599#define TRAMPOLINE_TEMPLATE(FILE) \ 600 do { \ 601 fprintf (FILE, "\tadd -4,sp\n"); \ 602 fprintf (FILE, "\t.long 0x0004fffa\n"); \ 603 fprintf (FILE, "\tmov (0,sp),a0\n"); \ 604 fprintf (FILE, "\tadd 4,sp\n"); \ 605 fprintf (FILE, "\tmov (13,a0),a1\n"); \ 606 fprintf (FILE, "\tmov (17,a0),a0\n"); \ 607 fprintf (FILE, "\tjmp (a0)\n"); \ 608 fprintf (FILE, "\t.long 0\n"); \ 609 fprintf (FILE, "\t.long 0\n"); \ 610 } while (0) 611 612/* Length in units of the trampoline for entering a nested function. */ 613 614#define TRAMPOLINE_SIZE 0x1b 615 616#define TRAMPOLINE_ALIGNMENT 32 617 618/* Emit RTL insns to initialize the variable parts of a trampoline. 619 FNADDR is an RTX for the address of the function's pure code. 620 CXT is an RTX for the static chain value for the function. */ 621 622#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 623{ \ 624 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)), \ 625 (CXT)); \ 626 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)), \ 627 (FNADDR)); \ 628} 629/* A C expression whose value is RTL representing the value of the return 630 address for the frame COUNT steps up from the current frame. 631 632 On the mn10300, the return address is not at a constant location 633 due to the frame layout. Luckily, it is at a constant offset from 634 the argument pointer, so we define RETURN_ADDR_RTX to return a 635 MEM using arg_pointer_rtx. Reload will replace arg_pointer_rtx 636 with a reference to the stack/frame pointer + an appropriate offset. */ 637 638#define RETURN_ADDR_RTX(COUNT, FRAME) \ 639 ((COUNT == 0) \ 640 ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \ 641 : (rtx) 0) 642 643/* Emit code for a call to builtin_saveregs. We must emit USE insns which 644 reference the 2 integer arg registers. 645 Ordinarily they are not call used registers, but they are for 646 _builtin_saveregs, so we must make this explicit. */ 647 648#define EXPAND_BUILTIN_SAVEREGS() mn10300_builtin_saveregs () 649 650/* Implement `va_start' for varargs and stdarg. */ 651#define EXPAND_BUILTIN_VA_START(valist, nextarg) \ 652 mn10300_va_start (valist, nextarg) 653 654/* Implement `va_arg'. */ 655#define EXPAND_BUILTIN_VA_ARG(valist, type) \ 656 mn10300_va_arg (valist, type) 657 658/* Addressing modes, and classification of registers for them. */ 659 660 661/* 1 if X is an rtx for a constant that is a valid address. */ 662 663#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X) 664 665/* Extra constraints. */ 666 667#define OK_FOR_R(OP) \ 668 (GET_CODE (OP) == MEM \ 669 && GET_MODE (OP) == QImode \ 670 && (CONSTANT_ADDRESS_P (XEXP (OP, 0)) \ 671 || (GET_CODE (XEXP (OP, 0)) == REG \ 672 && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \ 673 && XEXP (OP, 0) != stack_pointer_rtx) \ 674 || (GET_CODE (XEXP (OP, 0)) == PLUS \ 675 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \ 676 && REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (OP, 0), 0)) \ 677 && XEXP (XEXP (OP, 0), 0) != stack_pointer_rtx \ 678 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT \ 679 && INT_8_BITS (INTVAL (XEXP (XEXP (OP, 0), 1)))))) 680 681#define OK_FOR_T(OP) \ 682 (GET_CODE (OP) == MEM \ 683 && GET_MODE (OP) == QImode \ 684 && (GET_CODE (XEXP (OP, 0)) == REG \ 685 && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \ 686 && XEXP (OP, 0) != stack_pointer_rtx)) 687 688#define EXTRA_CONSTRAINT(OP, C) \ 689 ((C) == 'R' ? OK_FOR_R (OP) \ 690 : (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF \ 691 : (C) == 'T' ? OK_FOR_T (OP) \ 692 : 0) 693 694/* Maximum number of registers that can appear in a valid memory address. */ 695 696#define MAX_REGS_PER_ADDRESS 2 697 698 699#define HAVE_POST_INCREMENT (TARGET_AM33) 700 701/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 702 that is a valid memory address for an instruction. 703 The MODE argument is the machine mode for the MEM expression 704 that wants to use this address. 705 706 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, 707 except for CONSTANT_ADDRESS_P which is actually 708 machine-independent. 709 710 On the mn10300, the value in the address register must be 711 in the same memory space/segment as the effective address. 712 713 This is problematical for reload since it does not understand 714 that base+index != index+base in a memory reference. 715 716 Note it is still possible to use reg+reg addressing modes, 717 it's just much more difficult. For a discussion of a possible 718 workaround and solution, see the comments in pa.c before the 719 function record_unscaled_index_insn_codes. */ 720 721/* Accept either REG or SUBREG where a register is valid. */ 722 723#define RTX_OK_FOR_BASE_P(X) \ 724 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ 725 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \ 726 && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) 727 728#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 729{ \ 730 if (CONSTANT_ADDRESS_P (X)) \ 731 goto ADDR; \ 732 if (RTX_OK_FOR_BASE_P (X)) \ 733 goto ADDR; \ 734 if (TARGET_AM33 \ 735 && GET_CODE (X) == POST_INC \ 736 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \ 737 && (MODE == SImode || MODE == SFmode || MODE == HImode))\ 738 goto ADDR; \ 739 if (GET_CODE (X) == PLUS) \ 740 { \ 741 rtx base = 0, index = 0; \ 742 if (REG_P (XEXP (X, 0)) \ 743 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \ 744 base = XEXP (X, 0), index = XEXP (X, 1); \ 745 if (REG_P (XEXP (X, 1)) \ 746 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \ 747 base = XEXP (X, 1), index = XEXP (X, 0); \ 748 if (base != 0 && index != 0) \ 749 { \ 750 if (GET_CODE (index) == CONST_INT) \ 751 goto ADDR; \ 752 } \ 753 } \ 754} 755 756 757/* Try machine-dependent ways of modifying an illegitimate address 758 to be legitimate. If we find one, return the new, valid address. 759 This macro is used in only one place: `memory_address' in explow.c. 760 761 OLDX is the address as it was before break_out_memory_refs was called. 762 In some cases it is useful to look at this to decide what needs to be done. 763 764 MODE and WIN are passed so that this macro can use 765 GO_IF_LEGITIMATE_ADDRESS. 766 767 It is always safe for this macro to do nothing. It exists to recognize 768 opportunities to optimize the output. */ 769 770#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ 771{ rtx orig_x = (X); \ 772 (X) = legitimize_address (X, OLDX, MODE); \ 773 if ((X) != orig_x && memory_address_p (MODE, X)) \ 774 goto WIN; } 775 776/* Go to LABEL if ADDR (a legitimate address expression) 777 has an effect that depends on the machine mode it is used for. */ 778 779#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ 780 if (GET_CODE (ADDR) == POST_INC) \ 781 goto LABEL 782 783/* Nonzero if the constant value X is a legitimate general operand. 784 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 785 786#define LEGITIMATE_CONSTANT_P(X) 1 787 788 789/* Tell final.c how to eliminate redundant test instructions. */ 790 791/* Here we define machine-dependent flags and fields in cc_status 792 (see `conditions.h'). No extra ones are needed for the VAX. */ 793 794/* Store in cc_status the expressions 795 that the condition codes will describe 796 after execution of an instruction whose pattern is EXP. 797 Do not alter them if the instruction would not alter the cc's. */ 798 799#define CC_OVERFLOW_UNUSABLE 0x200 800#define CC_NO_CARRY CC_NO_OVERFLOW 801#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN) 802 803/* Compute the cost of computing a constant rtl expression RTX 804 whose rtx-code is CODE. The body of this macro is a portion 805 of a switch statement. If the code is computed here, 806 return it with a return statement. Otherwise, break from the switch. */ 807 808#define CONST_COSTS(RTX,CODE,OUTER_CODE) \ 809 case CONST_INT: \ 810 /* Zeros are extremely cheap. */ \ 811 if (INTVAL (RTX) == 0 && OUTER_CODE == SET) \ 812 return 0; \ 813 /* If it fits in 8 bits, then it's still relatively cheap. */ \ 814 if (INT_8_BITS (INTVAL (RTX))) \ 815 return 1; \ 816 /* This is the "base" cost, includes constants where either the \ 817 upper or lower 16bits are all zeros. */ \ 818 if (INT_16_BITS (INTVAL (RTX)) \ 819 || (INTVAL (RTX) & 0xffff) == 0 \ 820 || (INTVAL (RTX) & 0xffff0000) == 0) \ 821 return 2; \ 822 return 4; \ 823 /* These are more costly than a CONST_INT, but we can relax them, \ 824 so they're less costly than a CONST_DOUBLE. */ \ 825 case CONST: \ 826 case LABEL_REF: \ 827 case SYMBOL_REF: \ 828 return 6; \ 829 /* We don't optimize CONST_DOUBLEs well nor do we relax them well, \ 830 so their cost is very high. */ \ 831 case CONST_DOUBLE: \ 832 return 8; 833 834#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 835 ((CLASS1 == CLASS2 && (CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS)) ? 2 :\ 836 ((CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS) && \ 837 (CLASS2 == ADDRESS_REGS || CLASS2 == DATA_REGS)) ? 4 : \ 838 (CLASS1 == SP_REGS && CLASS2 == ADDRESS_REGS) ? 2 : \ 839 (CLASS1 == ADDRESS_REGS && CLASS2 == SP_REGS) ? 4 : \ 840 ! TARGET_AM33 ? 6 : \ 841 (CLASS1 == SP_REGS || CLASS2 == SP_REGS) ? 6 : \ 842 (CLASS1 == CLASS2 && CLASS1 == EXTENDED_REGS) ? 6 : \ 843 (CLASS1 == EXTENDED_REGS || CLASS2 == EXTENDED_REGS) ? 4 : \ 844 4) 845 846#define ADDRESS_COST(X) mn10300_address_cost((X), 0) 847 848/* A crude cut at RTX_COSTS for the MN10300. */ 849 850/* Provide the costs of a rtl expression. This is in the body of a 851 switch on CODE. */ 852#define RTX_COSTS(RTX,CODE,OUTER_CODE) \ 853 case UMOD: \ 854 case UDIV: \ 855 case MOD: \ 856 case DIV: \ 857 return 8; \ 858 case MULT: \ 859 return 8; 860 861/* Nonzero if access to memory by bytes or half words is no faster 862 than accessing full words. */ 863#define SLOW_BYTE_ACCESS 1 864 865/* Dispatch tables on the mn10300 are extremely expensive in terms of code 866 and readonly data size. So we crank up the case threshold value to 867 encourage a series of if/else comparisons to implement many small switch 868 statements. In theory, this value could be increased much more if we 869 were solely optimizing for space, but we keep it "reasonable" to avoid 870 serious code efficiency lossage. */ 871#define CASE_VALUES_THRESHOLD 6 872 873#define NO_FUNCTION_CSE 874 875/* According expr.c, a value of around 6 should minimize code size, and 876 for the MN10300 series, that's our primary concern. */ 877#define MOVE_RATIO 6 878 879#define TEXT_SECTION_ASM_OP "\t.section .text" 880#define DATA_SECTION_ASM_OP "\t.section .data" 881#define BSS_SECTION_ASM_OP "\t.section .bss" 882 883/* Output at beginning/end of assembler file. */ 884#undef ASM_FILE_START 885#define ASM_FILE_START(FILE) asm_file_start(FILE) 886 887#define ASM_COMMENT_START "#" 888 889/* Output to assembler file text saying following lines 890 may contain character constants, extra white space, comments, etc. */ 891 892#define ASM_APP_ON "#APP\n" 893 894/* Output to assembler file text saying following lines 895 no longer contain unusual constructs. */ 896 897#define ASM_APP_OFF "#NO_APP\n" 898 899/* This says how to output the assembler to define a global 900 uninitialized but not common symbol. 901 Try to use asm_output_bss to implement this macro. */ 902 903#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ 904 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN)) 905 906/* Globalizing directive for a label. */ 907#define GLOBAL_ASM_OP "\t.global " 908 909/* This is how to output a reference to a user-level label named NAME. 910 `assemble_name' uses this. */ 911 912#undef ASM_OUTPUT_LABELREF 913#define ASM_OUTPUT_LABELREF(FILE, NAME) \ 914 fprintf (FILE, "_%s", (*targetm.strip_name_encoding) (NAME)) 915 916/* Store in OUTPUT a string (made with alloca) containing 917 an assembler-name for a local static variable named NAME. 918 LABELNO is an integer which is different for each call. */ 919 920#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ 921( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ 922 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO))) 923 924/* This is how we tell the assembler that two symbols have the same value. */ 925 926#define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \ 927 do { assemble_name(FILE, NAME1); \ 928 fputs(" = ", FILE); \ 929 assemble_name(FILE, NAME2); \ 930 fputc('\n', FILE); } while (0) 931 932 933/* How to refer to registers in assembler output. 934 This sequence is indexed by compiler's hard-register-number (see above). */ 935 936#define REGISTER_NAMES \ 937{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp", \ 938 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" \ 939} 940 941#define ADDITIONAL_REGISTER_NAMES \ 942{ {"r8", 4}, {"r9", 5}, {"r10", 6}, {"r11", 7}, \ 943 {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3}, \ 944 {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13}, \ 945 {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17} \ 946} 947 948/* Print an instruction operand X on file FILE. 949 look in mn10300.c for details */ 950 951#define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE,X,CODE) 952 953/* Print a memory operand whose address is X, on file FILE. 954 This uses a function in output-vax.c. */ 955 956#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) 957 958#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) 959#define ASM_OUTPUT_REG_POP(FILE,REGNO) 960 961/* This is how to output an element of a case-vector that is absolute. */ 962 963#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 964 fprintf (FILE, "\t%s .L%d\n", ".long", VALUE) 965 966/* This is how to output an element of a case-vector that is relative. */ 967 968#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 969 fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL) 970 971#define ASM_OUTPUT_ALIGN(FILE,LOG) \ 972 if ((LOG) != 0) \ 973 fprintf (FILE, "\t.align %d\n", (LOG)) 974 975/* We don't have to worry about dbx compatibility for the mn10300. */ 976#define DEFAULT_GDB_EXTENSIONS 1 977 978/* Use dwarf2 debugging info by default. */ 979#undef PREFERRED_DEBUGGING_TYPE 980#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG 981 982#define DWARF2_ASM_LINE_DEBUG_INFO 1 983 984/* GDB always assumes the current function's frame begins at the value 985 of the stack pointer upon entry to the current function. Accessing 986 local variables and parameters passed on the stack is done using the 987 base of the frame + an offset provided by GCC. 988 989 For functions which have frame pointers this method works fine; 990 the (frame pointer) == (stack pointer at function entry) and GCC provides 991 an offset relative to the frame pointer. 992 993 This loses for functions without a frame pointer; GCC provides an offset 994 which is relative to the stack pointer after adjusting for the function's 995 frame size. GDB would prefer the offset to be relative to the value of 996 the stack pointer at the function's entry. Yuk! */ 997#define DEBUGGER_AUTO_OFFSET(X) \ 998 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \ 999 + (frame_pointer_needed \ 1000 ? 0 : -initial_offset (FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM))) 1001 1002#define DEBUGGER_ARG_OFFSET(OFFSET, X) \ 1003 ((GET_CODE (X) == PLUS ? OFFSET : 0) \ 1004 + (frame_pointer_needed \ 1005 ? 0 : -initial_offset (ARG_POINTER_REGNUM, STACK_POINTER_REGNUM))) 1006 1007/* Specify the machine mode that this machine uses 1008 for the index in the tablejump instruction. */ 1009#define CASE_VECTOR_MODE Pmode 1010 1011/* Define if operations between registers always perform the operation 1012 on the full register even if a narrower mode is specified. */ 1013#define WORD_REGISTER_OPERATIONS 1014 1015#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 1016 1017/* This flag, if defined, says the same insns that convert to a signed fixnum 1018 also convert validly to an unsigned one. */ 1019#define FIXUNS_TRUNC_LIKE_FIX_TRUNC 1020 1021/* Max number of bytes we can move from memory to memory 1022 in one reasonably fast instruction. */ 1023#define MOVE_MAX 4 1024 1025/* Define if shifts truncate the shift count 1026 which implies one can omit a sign-extension or zero-extension 1027 of a shift count. */ 1028#define SHIFT_COUNT_TRUNCATED 1 1029 1030/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 1031 is done just by pretending it is already truncated. */ 1032#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 1033 1034/* Specify the machine mode that pointers have. 1035 After generation of rtl, the compiler makes no further distinction 1036 between pointers and any other objects of this machine mode. */ 1037#define Pmode SImode 1038 1039/* A function address in a call instruction 1040 is a byte address (for indexing purposes) 1041 so give the MEM rtx a byte's mode. */ 1042#define FUNCTION_MODE QImode 1043 1044/* The assembler op to get a word. */ 1045 1046#define FILE_ASM_OP "\t.file\n" 1047 1048