1/* Target-dependent code for GDB, the GNU debugger. 2 3 Copyright 2001, 2002, 2003, 2004 Free Software Foundation, Inc. 4 5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) 6 for IBM Deutschland Entwicklung GmbH, IBM Corporation. 7 8 This file is part of GDB. 9 10 This program is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 2 of the License, or 13 (at your option) any later version. 14 15 This program is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software 22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 23 02111-1307, USA. */ 24 25#include "defs.h" 26#include "arch-utils.h" 27#include "frame.h" 28#include "inferior.h" 29#include "symtab.h" 30#include "target.h" 31#include "gdbcore.h" 32#include "gdbcmd.h" 33#include "objfiles.h" 34#include "tm.h" 35#include "../bfd/bfd.h" 36#include "floatformat.h" 37#include "regcache.h" 38#include "trad-frame.h" 39#include "frame-base.h" 40#include "frame-unwind.h" 41#include "dwarf2-frame.h" 42#include "reggroups.h" 43#include "regset.h" 44#include "value.h" 45#include "gdb_assert.h" 46#include "dis-asm.h" 47#include "solib-svr4.h" /* For struct link_map_offsets. */ 48 49#include "s390-tdep.h" 50 51 52/* The tdep structure. */ 53 54struct gdbarch_tdep 55{ 56 /* ABI version. */ 57 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi; 58 59 /* Core file register sets. */ 60 const struct regset *gregset; 61 int sizeof_gregset; 62 63 const struct regset *fpregset; 64 int sizeof_fpregset; 65}; 66 67 68/* Register information. */ 69 70struct s390_register_info 71{ 72 char *name; 73 struct type **type; 74}; 75 76static struct s390_register_info s390_register_info[S390_NUM_TOTAL_REGS] = 77{ 78 /* Program Status Word. */ 79 { "pswm", &builtin_type_long }, 80 { "pswa", &builtin_type_long }, 81 82 /* General Purpose Registers. */ 83 { "r0", &builtin_type_long }, 84 { "r1", &builtin_type_long }, 85 { "r2", &builtin_type_long }, 86 { "r3", &builtin_type_long }, 87 { "r4", &builtin_type_long }, 88 { "r5", &builtin_type_long }, 89 { "r6", &builtin_type_long }, 90 { "r7", &builtin_type_long }, 91 { "r8", &builtin_type_long }, 92 { "r9", &builtin_type_long }, 93 { "r10", &builtin_type_long }, 94 { "r11", &builtin_type_long }, 95 { "r12", &builtin_type_long }, 96 { "r13", &builtin_type_long }, 97 { "r14", &builtin_type_long }, 98 { "r15", &builtin_type_long }, 99 100 /* Access Registers. */ 101 { "acr0", &builtin_type_int }, 102 { "acr1", &builtin_type_int }, 103 { "acr2", &builtin_type_int }, 104 { "acr3", &builtin_type_int }, 105 { "acr4", &builtin_type_int }, 106 { "acr5", &builtin_type_int }, 107 { "acr6", &builtin_type_int }, 108 { "acr7", &builtin_type_int }, 109 { "acr8", &builtin_type_int }, 110 { "acr9", &builtin_type_int }, 111 { "acr10", &builtin_type_int }, 112 { "acr11", &builtin_type_int }, 113 { "acr12", &builtin_type_int }, 114 { "acr13", &builtin_type_int }, 115 { "acr14", &builtin_type_int }, 116 { "acr15", &builtin_type_int }, 117 118 /* Floating Point Control Word. */ 119 { "fpc", &builtin_type_int }, 120 121 /* Floating Point Registers. */ 122 { "f0", &builtin_type_double }, 123 { "f1", &builtin_type_double }, 124 { "f2", &builtin_type_double }, 125 { "f3", &builtin_type_double }, 126 { "f4", &builtin_type_double }, 127 { "f5", &builtin_type_double }, 128 { "f6", &builtin_type_double }, 129 { "f7", &builtin_type_double }, 130 { "f8", &builtin_type_double }, 131 { "f9", &builtin_type_double }, 132 { "f10", &builtin_type_double }, 133 { "f11", &builtin_type_double }, 134 { "f12", &builtin_type_double }, 135 { "f13", &builtin_type_double }, 136 { "f14", &builtin_type_double }, 137 { "f15", &builtin_type_double }, 138 139 /* Pseudo registers. */ 140 { "pc", &builtin_type_void_func_ptr }, 141 { "cc", &builtin_type_int }, 142}; 143 144/* Return the name of register REGNUM. */ 145static const char * 146s390_register_name (int regnum) 147{ 148 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS); 149 return s390_register_info[regnum].name; 150} 151 152/* Return the GDB type object for the "standard" data type of data in 153 register REGNUM. */ 154static struct type * 155s390_register_type (struct gdbarch *gdbarch, int regnum) 156{ 157 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS); 158 return *s390_register_info[regnum].type; 159} 160 161/* DWARF Register Mapping. */ 162 163static int s390_dwarf_regmap[] = 164{ 165 /* General Purpose Registers. */ 166 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, 167 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, 168 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, 169 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, 170 171 /* Floating Point Registers. */ 172 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM, 173 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM, 174 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM, 175 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM, 176 177 /* Control Registers (not mapped). */ 178 -1, -1, -1, -1, -1, -1, -1, -1, 179 -1, -1, -1, -1, -1, -1, -1, -1, 180 181 /* Access Registers. */ 182 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM, 183 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM, 184 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM, 185 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM, 186 187 /* Program Status Word. */ 188 S390_PSWM_REGNUM, 189 S390_PSWA_REGNUM 190}; 191 192/* Convert DWARF register number REG to the appropriate register 193 number used by GDB. */ 194static int 195s390_dwarf_reg_to_regnum (int reg) 196{ 197 int regnum = -1; 198 199 if (reg >= 0 || reg < ARRAY_SIZE (s390_dwarf_regmap)) 200 regnum = s390_dwarf_regmap[reg]; 201 202 if (regnum == -1) 203 warning ("Unmapped DWARF Register #%d encountered\n", reg); 204 205 return regnum; 206} 207 208/* Pseudo registers - PC and condition code. */ 209 210static void 211s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, 212 int regnum, void *buf) 213{ 214 ULONGEST val; 215 216 switch (regnum) 217 { 218 case S390_PC_REGNUM: 219 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val); 220 store_unsigned_integer (buf, 4, val & 0x7fffffff); 221 break; 222 223 case S390_CC_REGNUM: 224 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val); 225 store_unsigned_integer (buf, 4, (val >> 12) & 3); 226 break; 227 228 default: 229 internal_error (__FILE__, __LINE__, "invalid regnum"); 230 } 231} 232 233static void 234s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, 235 int regnum, const void *buf) 236{ 237 ULONGEST val, psw; 238 239 switch (regnum) 240 { 241 case S390_PC_REGNUM: 242 val = extract_unsigned_integer (buf, 4); 243 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw); 244 psw = (psw & 0x80000000) | (val & 0x7fffffff); 245 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, psw); 246 break; 247 248 case S390_CC_REGNUM: 249 val = extract_unsigned_integer (buf, 4); 250 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw); 251 psw = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12); 252 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw); 253 break; 254 255 default: 256 internal_error (__FILE__, __LINE__, "invalid regnum"); 257 } 258} 259 260static void 261s390x_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, 262 int regnum, void *buf) 263{ 264 ULONGEST val; 265 266 switch (regnum) 267 { 268 case S390_PC_REGNUM: 269 regcache_raw_read (regcache, S390_PSWA_REGNUM, buf); 270 break; 271 272 case S390_CC_REGNUM: 273 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val); 274 store_unsigned_integer (buf, 4, (val >> 44) & 3); 275 break; 276 277 default: 278 internal_error (__FILE__, __LINE__, "invalid regnum"); 279 } 280} 281 282static void 283s390x_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, 284 int regnum, const void *buf) 285{ 286 ULONGEST val, psw; 287 288 switch (regnum) 289 { 290 case S390_PC_REGNUM: 291 regcache_raw_write (regcache, S390_PSWA_REGNUM, buf); 292 break; 293 294 case S390_CC_REGNUM: 295 val = extract_unsigned_integer (buf, 4); 296 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw); 297 psw = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44); 298 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw); 299 break; 300 301 default: 302 internal_error (__FILE__, __LINE__, "invalid regnum"); 303 } 304} 305 306/* 'float' values are stored in the upper half of floating-point 307 registers, even though we are otherwise a big-endian platform. */ 308 309static int 310s390_convert_register_p (int regno, struct type *type) 311{ 312 return (regno >= S390_F0_REGNUM && regno <= S390_F15_REGNUM) 313 && TYPE_LENGTH (type) < 8; 314} 315 316static void 317s390_register_to_value (struct frame_info *frame, int regnum, 318 struct type *valtype, void *out) 319{ 320 char in[8]; 321 int len = TYPE_LENGTH (valtype); 322 gdb_assert (len < 8); 323 324 get_frame_register (frame, regnum, in); 325 memcpy (out, in, len); 326} 327 328static void 329s390_value_to_register (struct frame_info *frame, int regnum, 330 struct type *valtype, const void *in) 331{ 332 char out[8]; 333 int len = TYPE_LENGTH (valtype); 334 gdb_assert (len < 8); 335 336 memset (out, 0, 8); 337 memcpy (out, in, len); 338 put_frame_register (frame, regnum, out); 339} 340 341/* Register groups. */ 342 343static int 344s390_register_reggroup_p (struct gdbarch *gdbarch, int regnum, 345 struct reggroup *group) 346{ 347 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 348 349 /* Registers displayed via 'info regs'. */ 350 if (group == general_reggroup) 351 return (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM) 352 || regnum == S390_PC_REGNUM 353 || regnum == S390_CC_REGNUM; 354 355 /* Registers displayed via 'info float'. */ 356 if (group == float_reggroup) 357 return (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM) 358 || regnum == S390_FPC_REGNUM; 359 360 /* Registers that need to be saved/restored in order to 361 push or pop frames. */ 362 if (group == save_reggroup || group == restore_reggroup) 363 return regnum != S390_PSWM_REGNUM && regnum != S390_PSWA_REGNUM; 364 365 return default_register_reggroup_p (gdbarch, regnum, group); 366} 367 368 369/* Core file register sets. */ 370 371int s390_regmap_gregset[S390_NUM_REGS] = 372{ 373 /* Program Status Word. */ 374 0x00, 0x04, 375 /* General Purpose Registers. */ 376 0x08, 0x0c, 0x10, 0x14, 377 0x18, 0x1c, 0x20, 0x24, 378 0x28, 0x2c, 0x30, 0x34, 379 0x38, 0x3c, 0x40, 0x44, 380 /* Access Registers. */ 381 0x48, 0x4c, 0x50, 0x54, 382 0x58, 0x5c, 0x60, 0x64, 383 0x68, 0x6c, 0x70, 0x74, 384 0x78, 0x7c, 0x80, 0x84, 385 /* Floating Point Control Word. */ 386 -1, 387 /* Floating Point Registers. */ 388 -1, -1, -1, -1, -1, -1, -1, -1, 389 -1, -1, -1, -1, -1, -1, -1, -1, 390}; 391 392int s390x_regmap_gregset[S390_NUM_REGS] = 393{ 394 0x00, 0x08, 395 /* General Purpose Registers. */ 396 0x10, 0x18, 0x20, 0x28, 397 0x30, 0x38, 0x40, 0x48, 398 0x50, 0x58, 0x60, 0x68, 399 0x70, 0x78, 0x80, 0x88, 400 /* Access Registers. */ 401 0x90, 0x94, 0x98, 0x9c, 402 0xa0, 0xa4, 0xa8, 0xac, 403 0xb0, 0xb4, 0xb8, 0xbc, 404 0xc0, 0xc4, 0xc8, 0xcc, 405 /* Floating Point Control Word. */ 406 -1, 407 /* Floating Point Registers. */ 408 -1, -1, -1, -1, -1, -1, -1, -1, 409 -1, -1, -1, -1, -1, -1, -1, -1, 410}; 411 412int s390_regmap_fpregset[S390_NUM_REGS] = 413{ 414 /* Program Status Word. */ 415 -1, -1, 416 /* General Purpose Registers. */ 417 -1, -1, -1, -1, -1, -1, -1, -1, 418 -1, -1, -1, -1, -1, -1, -1, -1, 419 /* Access Registers. */ 420 -1, -1, -1, -1, -1, -1, -1, -1, 421 -1, -1, -1, -1, -1, -1, -1, -1, 422 /* Floating Point Control Word. */ 423 0x00, 424 /* Floating Point Registers. */ 425 0x08, 0x10, 0x18, 0x20, 426 0x28, 0x30, 0x38, 0x40, 427 0x48, 0x50, 0x58, 0x60, 428 0x68, 0x70, 0x78, 0x80, 429}; 430 431/* Supply register REGNUM from the register set REGSET to register cache 432 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ 433static void 434s390_supply_regset (const struct regset *regset, struct regcache *regcache, 435 int regnum, const void *regs, size_t len) 436{ 437 const int *offset = regset->descr; 438 int i; 439 440 for (i = 0; i < S390_NUM_REGS; i++) 441 { 442 if ((regnum == i || regnum == -1) && offset[i] != -1) 443 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]); 444 } 445} 446 447static const struct regset s390_gregset = { 448 s390_regmap_gregset, 449 s390_supply_regset 450}; 451 452static const struct regset s390x_gregset = { 453 s390x_regmap_gregset, 454 s390_supply_regset 455}; 456 457static const struct regset s390_fpregset = { 458 s390_regmap_fpregset, 459 s390_supply_regset 460}; 461 462/* Return the appropriate register set for the core section identified 463 by SECT_NAME and SECT_SIZE. */ 464const struct regset * 465s390_regset_from_core_section (struct gdbarch *gdbarch, 466 const char *sect_name, size_t sect_size) 467{ 468 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 469 470 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset) 471 return tdep->gregset; 472 473 if (strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset) 474 return tdep->fpregset; 475 476 return NULL; 477} 478 479 480/* Prologue analysis. */ 481 482/* When we analyze a prologue, we're really doing 'abstract 483 interpretation' or 'pseudo-evaluation': running the function's code 484 in simulation, but using conservative approximations of the values 485 it would have when it actually runs. For example, if our function 486 starts with the instruction: 487 488 ahi r1, 42 # add halfword immediate 42 to r1 489 490 we don't know exactly what value will be in r1 after executing this 491 instruction, but we do know it'll be 42 greater than its original 492 value. 493 494 If we then see an instruction like: 495 496 ahi r1, 22 # add halfword immediate 22 to r1 497 498 we still don't know what r1's value is, but again, we can say it is 499 now 64 greater than its original value. 500 501 If the next instruction were: 502 503 lr r2, r1 # set r2 to r1's value 504 505 then we can say that r2's value is now the original value of r1 506 plus 64. And so on. 507 508 Of course, this can only go so far before it gets unreasonable. If 509 we wanted to be able to say anything about the value of r1 after 510 the instruction: 511 512 xr r1, r3 # exclusive-or r1 and r3, place result in r1 513 514 then things would get pretty complex. But remember, we're just 515 doing a conservative approximation; if exclusive-or instructions 516 aren't relevant to prologues, we can just say r1's value is now 517 'unknown'. We can ignore things that are too complex, if that loss 518 of information is acceptable for our application. 519 520 Once you've reached an instruction that you don't know how to 521 simulate, you stop. Now you examine the state of the registers and 522 stack slots you've kept track of. For example: 523 524 - To see how large your stack frame is, just check the value of sp; 525 if it's the original value of sp minus a constant, then that 526 constant is the stack frame's size. If the sp's value has been 527 marked as 'unknown', then that means the prologue has done 528 something too complex for us to track, and we don't know the 529 frame size. 530 531 - To see whether we've saved the SP in the current frame's back 532 chain slot, we just check whether the current value of the back 533 chain stack slot is the original value of the sp. 534 535 Sure, this takes some work. But prologue analyzers aren't 536 quick-and-simple pattern patching to recognize a few fixed prologue 537 forms any more; they're big, hairy functions. Along with inferior 538 function calls, prologue analysis accounts for a substantial 539 portion of the time needed to stabilize a GDB port. So I think 540 it's worthwhile to look for an approach that will be easier to 541 understand and maintain. In the approach used here: 542 543 - It's easier to see that the analyzer is correct: you just see 544 whether the analyzer properly (albiet conservatively) simulates 545 the effect of each instruction. 546 547 - It's easier to extend the analyzer: you can add support for new 548 instructions, and know that you haven't broken anything that 549 wasn't already broken before. 550 551 - It's orthogonal: to gather new information, you don't need to 552 complicate the code for each instruction. As long as your domain 553 of conservative values is already detailed enough to tell you 554 what you need, then all the existing instruction simulations are 555 already gathering the right data for you. 556 557 A 'struct prologue_value' is a conservative approximation of the 558 real value the register or stack slot will have. */ 559 560struct prologue_value { 561 562 /* What sort of value is this? This determines the interpretation 563 of subsequent fields. */ 564 enum { 565 566 /* We don't know anything about the value. This is also used for 567 values we could have kept track of, when doing so would have 568 been too complex and we don't want to bother. The bottom of 569 our lattice. */ 570 pv_unknown, 571 572 /* A known constant. K is its value. */ 573 pv_constant, 574 575 /* The value that register REG originally had *UPON ENTRY TO THE 576 FUNCTION*, plus K. If K is zero, this means, obviously, just 577 the value REG had upon entry to the function. REG is a GDB 578 register number. Before we start interpreting, we initialize 579 every register R to { pv_register, R, 0 }. */ 580 pv_register, 581 582 } kind; 583 584 /* The meanings of the following fields depend on 'kind'; see the 585 comments for the specific 'kind' values. */ 586 int reg; 587 CORE_ADDR k; 588}; 589 590 591/* Set V to be unknown. */ 592static void 593pv_set_to_unknown (struct prologue_value *v) 594{ 595 v->kind = pv_unknown; 596} 597 598 599/* Set V to the constant K. */ 600static void 601pv_set_to_constant (struct prologue_value *v, CORE_ADDR k) 602{ 603 v->kind = pv_constant; 604 v->k = k; 605} 606 607 608/* Set V to the original value of register REG, plus K. */ 609static void 610pv_set_to_register (struct prologue_value *v, int reg, CORE_ADDR k) 611{ 612 v->kind = pv_register; 613 v->reg = reg; 614 v->k = k; 615} 616 617 618/* If one of *A and *B is a constant, and the other isn't, swap the 619 pointers as necessary to ensure that *B points to the constant. 620 This can reduce the number of cases we need to analyze in the 621 functions below. */ 622static void 623pv_constant_last (struct prologue_value **a, 624 struct prologue_value **b) 625{ 626 if ((*a)->kind == pv_constant 627 && (*b)->kind != pv_constant) 628 { 629 struct prologue_value *temp = *a; 630 *a = *b; 631 *b = temp; 632 } 633} 634 635 636/* Set SUM to the sum of A and B. SUM, A, and B may point to the same 637 'struct prologue_value' object. */ 638static void 639pv_add (struct prologue_value *sum, 640 struct prologue_value *a, 641 struct prologue_value *b) 642{ 643 pv_constant_last (&a, &b); 644 645 /* We can handle adding constants to registers, and other constants. */ 646 if (b->kind == pv_constant 647 && (a->kind == pv_register 648 || a->kind == pv_constant)) 649 { 650 sum->kind = a->kind; 651 sum->reg = a->reg; /* not meaningful if a is pv_constant, but 652 harmless */ 653 sum->k = a->k + b->k; 654 } 655 656 /* Anything else we don't know how to add. We don't have a 657 representation for, say, the sum of two registers, or a multiple 658 of a register's value (adding a register to itself). */ 659 else 660 sum->kind = pv_unknown; 661} 662 663 664/* Add the constant K to V. */ 665static void 666pv_add_constant (struct prologue_value *v, CORE_ADDR k) 667{ 668 struct prologue_value pv_k; 669 670 /* Rather than thinking of all the cases we can and can't handle, 671 we'll just let pv_add take care of that for us. */ 672 pv_set_to_constant (&pv_k, k); 673 pv_add (v, v, &pv_k); 674} 675 676 677/* Subtract B from A, and put the result in DIFF. 678 679 This isn't quite the same as negating B and adding it to A, since 680 we don't have a representation for the negation of anything but a 681 constant. For example, we can't negate { pv_register, R1, 10 }, 682 but we do know that { pv_register, R1, 10 } minus { pv_register, 683 R1, 5 } is { pv_constant, <ignored>, 5 }. 684 685 This means, for example, that we can subtract two stack addresses; 686 they're both relative to the original SP. Since the frame pointer 687 is set based on the SP, its value will be the original SP plus some 688 constant (probably zero), so we can use its value just fine. */ 689static void 690pv_subtract (struct prologue_value *diff, 691 struct prologue_value *a, 692 struct prologue_value *b) 693{ 694 pv_constant_last (&a, &b); 695 696 /* We can subtract a constant from another constant, or from a 697 register. */ 698 if (b->kind == pv_constant 699 && (a->kind == pv_register 700 || a->kind == pv_constant)) 701 { 702 diff->kind = a->kind; 703 diff->reg = a->reg; /* not always meaningful, but harmless */ 704 diff->k = a->k - b->k; 705 } 706 707 /* We can subtract a register from itself, yielding a constant. */ 708 else if (a->kind == pv_register 709 && b->kind == pv_register 710 && a->reg == b->reg) 711 { 712 diff->kind = pv_constant; 713 diff->k = a->k - b->k; 714 } 715 716 /* We don't know how to subtract anything else. */ 717 else 718 diff->kind = pv_unknown; 719} 720 721 722/* Set AND to the logical and of A and B. */ 723static void 724pv_logical_and (struct prologue_value *and, 725 struct prologue_value *a, 726 struct prologue_value *b) 727{ 728 pv_constant_last (&a, &b); 729 730 /* We can 'and' two constants. */ 731 if (a->kind == pv_constant 732 && b->kind == pv_constant) 733 { 734 and->kind = pv_constant; 735 and->k = a->k & b->k; 736 } 737 738 /* We can 'and' anything with the constant zero. */ 739 else if (b->kind == pv_constant 740 && b->k == 0) 741 { 742 and->kind = pv_constant; 743 and->k = 0; 744 } 745 746 /* We can 'and' anything with ~0. */ 747 else if (b->kind == pv_constant 748 && b->k == ~ (CORE_ADDR) 0) 749 *and = *a; 750 751 /* We can 'and' a register with itself. */ 752 else if (a->kind == pv_register 753 && b->kind == pv_register 754 && a->reg == b->reg 755 && a->k == b->k) 756 *and = *a; 757 758 /* Otherwise, we don't know. */ 759 else 760 pv_set_to_unknown (and); 761} 762 763 764/* Return non-zero iff A and B are identical expressions. 765 766 This is not the same as asking if the two values are equal; the 767 result of such a comparison would have to be a pv_boolean, and 768 asking whether two 'unknown' values were equal would give you 769 pv_maybe. Same for comparing, say, { pv_register, R1, 0 } and { 770 pv_register, R2, 0}. Instead, this is asking whether the two 771 representations are the same. */ 772static int 773pv_is_identical (struct prologue_value *a, 774 struct prologue_value *b) 775{ 776 if (a->kind != b->kind) 777 return 0; 778 779 switch (a->kind) 780 { 781 case pv_unknown: 782 return 1; 783 case pv_constant: 784 return (a->k == b->k); 785 case pv_register: 786 return (a->reg == b->reg && a->k == b->k); 787 default: 788 gdb_assert (0); 789 } 790} 791 792 793/* Return non-zero if A is the original value of register number R 794 plus K, zero otherwise. */ 795static int 796pv_is_register (struct prologue_value *a, int r, CORE_ADDR k) 797{ 798 return (a->kind == pv_register 799 && a->reg == r 800 && a->k == k); 801} 802 803 804/* Decoding S/390 instructions. */ 805 806/* Named opcode values for the S/390 instructions we recognize. Some 807 instructions have their opcode split across two fields; those are the 808 op1_* and op2_* enums. */ 809enum 810 { 811 op1_lhi = 0xa7, op2_lhi = 0x08, 812 op1_lghi = 0xa7, op2_lghi = 0x09, 813 op_lr = 0x18, 814 op_lgr = 0xb904, 815 op_l = 0x58, 816 op1_ly = 0xe3, op2_ly = 0x58, 817 op1_lg = 0xe3, op2_lg = 0x04, 818 op_lm = 0x98, 819 op1_lmy = 0xeb, op2_lmy = 0x98, 820 op1_lmg = 0xeb, op2_lmg = 0x04, 821 op_st = 0x50, 822 op1_sty = 0xe3, op2_sty = 0x50, 823 op1_stg = 0xe3, op2_stg = 0x24, 824 op_std = 0x60, 825 op_stm = 0x90, 826 op1_stmy = 0xeb, op2_stmy = 0x90, 827 op1_stmg = 0xeb, op2_stmg = 0x24, 828 op1_aghi = 0xa7, op2_aghi = 0x0b, 829 op1_ahi = 0xa7, op2_ahi = 0x0a, 830 op_ar = 0x1a, 831 op_agr = 0xb908, 832 op_a = 0x5a, 833 op1_ay = 0xe3, op2_ay = 0x5a, 834 op1_ag = 0xe3, op2_ag = 0x08, 835 op_sr = 0x1b, 836 op_sgr = 0xb909, 837 op_s = 0x5b, 838 op1_sy = 0xe3, op2_sy = 0x5b, 839 op1_sg = 0xe3, op2_sg = 0x09, 840 op_nr = 0x14, 841 op_ngr = 0xb980, 842 op_la = 0x41, 843 op1_lay = 0xe3, op2_lay = 0x71, 844 op1_larl = 0xc0, op2_larl = 0x00, 845 op_basr = 0x0d, 846 op_bas = 0x4d, 847 op_bcr = 0x07, 848 op_bc = 0x0d, 849 op1_bras = 0xa7, op2_bras = 0x05, 850 op1_brasl= 0xc0, op2_brasl= 0x05, 851 op1_brc = 0xa7, op2_brc = 0x04, 852 op1_brcl = 0xc0, op2_brcl = 0x04, 853 }; 854 855 856/* Read a single instruction from address AT. */ 857 858#define S390_MAX_INSTR_SIZE 6 859static int 860s390_readinstruction (bfd_byte instr[], CORE_ADDR at) 861{ 862 static int s390_instrlen[] = { 2, 4, 4, 6 }; 863 int instrlen; 864 865 if (deprecated_read_memory_nobpt (at, &instr[0], 2)) 866 return -1; 867 instrlen = s390_instrlen[instr[0] >> 6]; 868 if (instrlen > 2) 869 { 870 if (deprecated_read_memory_nobpt (at + 2, &instr[2], instrlen - 2)) 871 return -1; 872 } 873 return instrlen; 874} 875 876 877/* The functions below are for recognizing and decoding S/390 878 instructions of various formats. Each of them checks whether INSN 879 is an instruction of the given format, with the specified opcodes. 880 If it is, it sets the remaining arguments to the values of the 881 instruction's fields, and returns a non-zero value; otherwise, it 882 returns zero. 883 884 These functions' arguments appear in the order they appear in the 885 instruction, not in the machine-language form. So, opcodes always 886 come first, even though they're sometimes scattered around the 887 instructions. And displacements appear before base and extension 888 registers, as they do in the assembly syntax, not at the end, as 889 they do in the machine language. */ 890static int 891is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2) 892{ 893 if (insn[0] == op1 && (insn[1] & 0xf) == op2) 894 { 895 *r1 = (insn[1] >> 4) & 0xf; 896 /* i2 is a 16-bit signed quantity. */ 897 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; 898 return 1; 899 } 900 else 901 return 0; 902} 903 904 905static int 906is_ril (bfd_byte *insn, int op1, int op2, 907 unsigned int *r1, int *i2) 908{ 909 if (insn[0] == op1 && (insn[1] & 0xf) == op2) 910 { 911 *r1 = (insn[1] >> 4) & 0xf; 912 /* i2 is a signed quantity. If the host 'int' is 32 bits long, 913 no sign extension is necessary, but we don't want to assume 914 that. */ 915 *i2 = (((insn[2] << 24) 916 | (insn[3] << 16) 917 | (insn[4] << 8) 918 | (insn[5])) ^ 0x80000000) - 0x80000000; 919 return 1; 920 } 921 else 922 return 0; 923} 924 925 926static int 927is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) 928{ 929 if (insn[0] == op) 930 { 931 *r1 = (insn[1] >> 4) & 0xf; 932 *r2 = insn[1] & 0xf; 933 return 1; 934 } 935 else 936 return 0; 937} 938 939 940static int 941is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) 942{ 943 if (((insn[0] << 8) | insn[1]) == op) 944 { 945 /* Yes, insn[3]. insn[2] is unused in RRE format. */ 946 *r1 = (insn[3] >> 4) & 0xf; 947 *r2 = insn[3] & 0xf; 948 return 1; 949 } 950 else 951 return 0; 952} 953 954 955static int 956is_rs (bfd_byte *insn, int op, 957 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) 958{ 959 if (insn[0] == op) 960 { 961 *r1 = (insn[1] >> 4) & 0xf; 962 *r3 = insn[1] & 0xf; 963 *b2 = (insn[2] >> 4) & 0xf; 964 *d2 = ((insn[2] & 0xf) << 8) | insn[3]; 965 return 1; 966 } 967 else 968 return 0; 969} 970 971 972static int 973is_rsy (bfd_byte *insn, int op1, int op2, 974 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) 975{ 976 if (insn[0] == op1 977 && insn[5] == op2) 978 { 979 *r1 = (insn[1] >> 4) & 0xf; 980 *r3 = insn[1] & 0xf; 981 *b2 = (insn[2] >> 4) & 0xf; 982 /* The 'long displacement' is a 20-bit signed integer. */ 983 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) 984 ^ 0x80000) - 0x80000; 985 return 1; 986 } 987 else 988 return 0; 989} 990 991 992static int 993is_rx (bfd_byte *insn, int op, 994 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) 995{ 996 if (insn[0] == op) 997 { 998 *r1 = (insn[1] >> 4) & 0xf; 999 *x2 = insn[1] & 0xf; 1000 *b2 = (insn[2] >> 4) & 0xf; 1001 *d2 = ((insn[2] & 0xf) << 8) | insn[3]; 1002 return 1; 1003 } 1004 else 1005 return 0; 1006} 1007 1008 1009static int 1010is_rxy (bfd_byte *insn, int op1, int op2, 1011 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) 1012{ 1013 if (insn[0] == op1 1014 && insn[5] == op2) 1015 { 1016 *r1 = (insn[1] >> 4) & 0xf; 1017 *x2 = insn[1] & 0xf; 1018 *b2 = (insn[2] >> 4) & 0xf; 1019 /* The 'long displacement' is a 20-bit signed integer. */ 1020 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) 1021 ^ 0x80000) - 0x80000; 1022 return 1; 1023 } 1024 else 1025 return 0; 1026} 1027 1028 1029/* Set ADDR to the effective address for an X-style instruction, like: 1030 1031 L R1, D2(X2, B2) 1032 1033 Here, X2 and B2 are registers, and D2 is a signed 20-bit 1034 constant; the effective address is the sum of all three. If either 1035 X2 or B2 are zero, then it doesn't contribute to the sum --- this 1036 means that r0 can't be used as either X2 or B2. 1037 1038 GPR is an array of general register values, indexed by GPR number, 1039 not GDB register number. */ 1040static void 1041compute_x_addr (struct prologue_value *addr, 1042 struct prologue_value *gpr, 1043 int d2, unsigned int x2, unsigned int b2) 1044{ 1045 /* We can't just add stuff directly in addr; it might alias some of 1046 the registers we need to read. */ 1047 struct prologue_value result; 1048 1049 pv_set_to_constant (&result, d2); 1050 if (x2) 1051 pv_add (&result, &result, &gpr[x2]); 1052 if (b2) 1053 pv_add (&result, &result, &gpr[b2]); 1054 1055 *addr = result; 1056} 1057 1058 1059#define S390_NUM_GPRS 16 1060#define S390_NUM_FPRS 16 1061 1062struct s390_prologue_data { 1063 1064 /* The size of a GPR or FPR. */ 1065 int gpr_size; 1066 int fpr_size; 1067 1068 /* The general-purpose registers. */ 1069 struct prologue_value gpr[S390_NUM_GPRS]; 1070 1071 /* The floating-point registers. */ 1072 struct prologue_value fpr[S390_NUM_FPRS]; 1073 1074 /* The offset relative to the CFA where the incoming GPR N was saved 1075 by the function prologue. 0 if not saved or unknown. */ 1076 int gpr_slot[S390_NUM_GPRS]; 1077 1078 /* Likewise for FPRs. */ 1079 int fpr_slot[S390_NUM_FPRS]; 1080 1081 /* Nonzero if the backchain was saved. This is assumed to be the 1082 case when the incoming SP is saved at the current SP location. */ 1083 int back_chain_saved_p; 1084}; 1085 1086/* Do a SIZE-byte store of VALUE to ADDR. */ 1087static void 1088s390_store (struct prologue_value *addr, 1089 CORE_ADDR size, 1090 struct prologue_value *value, 1091 struct s390_prologue_data *data) 1092{ 1093 struct prologue_value cfa, offset; 1094 int i; 1095 1096 /* Check whether we are storing the backchain. */ 1097 pv_subtract (&offset, &data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr); 1098 1099 if (offset.kind == pv_constant && offset.k == 0) 1100 if (size == data->gpr_size 1101 && pv_is_register (value, S390_SP_REGNUM, 0)) 1102 { 1103 data->back_chain_saved_p = 1; 1104 return; 1105 } 1106 1107 1108 /* Check whether we are storing a register into the stack. */ 1109 pv_set_to_register (&cfa, S390_SP_REGNUM, 16 * data->gpr_size + 32); 1110 pv_subtract (&offset, &cfa, addr); 1111 1112 if (offset.kind == pv_constant 1113 && offset.k < INT_MAX && offset.k > 0 1114 && offset.k % data->gpr_size == 0) 1115 { 1116 /* If we are storing the original value of a register, we want to 1117 record the CFA offset. If the same register is stored multiple 1118 times, the stack slot with the highest address counts. */ 1119 1120 for (i = 0; i < S390_NUM_GPRS; i++) 1121 if (size == data->gpr_size 1122 && pv_is_register (value, S390_R0_REGNUM + i, 0)) 1123 if (data->gpr_slot[i] == 0 1124 || data->gpr_slot[i] > offset.k) 1125 { 1126 data->gpr_slot[i] = offset.k; 1127 return; 1128 } 1129 1130 for (i = 0; i < S390_NUM_FPRS; i++) 1131 if (size == data->fpr_size 1132 && pv_is_register (value, S390_F0_REGNUM + i, 0)) 1133 if (data->fpr_slot[i] == 0 1134 || data->fpr_slot[i] > offset.k) 1135 { 1136 data->fpr_slot[i] = offset.k; 1137 return; 1138 } 1139 } 1140 1141 1142 /* Note: If this is some store we cannot identify, you might think we 1143 should forget our cached values, as any of those might have been hit. 1144 1145 However, we make the assumption that the register save areas are only 1146 ever stored to once in any given function, and we do recognize these 1147 stores. Thus every store we cannot recognize does not hit our data. */ 1148} 1149 1150/* Do a SIZE-byte load from ADDR into VALUE. */ 1151static void 1152s390_load (struct prologue_value *addr, 1153 CORE_ADDR size, 1154 struct prologue_value *value, 1155 struct s390_prologue_data *data) 1156{ 1157 struct prologue_value cfa, offset; 1158 int i; 1159 1160 /* If it's a load from an in-line constant pool, then we can 1161 simulate that, under the assumption that the code isn't 1162 going to change between the time the processor actually 1163 executed it creating the current frame, and the time when 1164 we're analyzing the code to unwind past that frame. */ 1165 if (addr->kind == pv_constant) 1166 { 1167 struct section_table *secp; 1168 secp = target_section_by_addr (¤t_target, addr->k); 1169 if (secp != NULL 1170 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section) 1171 & SEC_READONLY)) 1172 { 1173 pv_set_to_constant (value, read_memory_integer (addr->k, size)); 1174 return; 1175 } 1176 } 1177 1178 /* Check whether we are accessing one of our save slots. */ 1179 pv_set_to_register (&cfa, S390_SP_REGNUM, 16 * data->gpr_size + 32); 1180 pv_subtract (&offset, &cfa, addr); 1181 1182 if (offset.kind == pv_constant 1183 && offset.k < INT_MAX && offset.k > 0) 1184 { 1185 for (i = 0; i < S390_NUM_GPRS; i++) 1186 if (offset.k == data->gpr_slot[i]) 1187 { 1188 pv_set_to_register (value, S390_R0_REGNUM + i, 0); 1189 return; 1190 } 1191 1192 for (i = 0; i < S390_NUM_FPRS; i++) 1193 if (offset.k == data->fpr_slot[i]) 1194 { 1195 pv_set_to_register (value, S390_F0_REGNUM + i, 0); 1196 return; 1197 } 1198 } 1199 1200 /* Otherwise, we don't know the value. */ 1201 pv_set_to_unknown (value); 1202} 1203 1204 1205/* Analyze the prologue of the function starting at START_PC, 1206 continuing at most until CURRENT_PC. Initialize DATA to 1207 hold all information we find out about the state of the registers 1208 and stack slots. Return the address of the instruction after 1209 the last one that changed the SP, FP, or back chain; or zero 1210 on error. */ 1211static CORE_ADDR 1212s390_analyze_prologue (struct gdbarch *gdbarch, 1213 CORE_ADDR start_pc, 1214 CORE_ADDR current_pc, 1215 struct s390_prologue_data *data) 1216{ 1217 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 1218 1219 /* Our return value: 1220 The address of the instruction after the last one that changed 1221 the SP, FP, or back chain; zero if we got an error trying to 1222 read memory. */ 1223 CORE_ADDR result = start_pc; 1224 1225 /* The current PC for our abstract interpretation. */ 1226 CORE_ADDR pc; 1227 1228 /* The address of the next instruction after that. */ 1229 CORE_ADDR next_pc; 1230 1231 /* Set up everything's initial value. */ 1232 { 1233 int i; 1234 1235 /* For the purpose of prologue tracking, we consider the GPR size to 1236 be equal to the ABI word size, even if it is actually larger 1237 (i.e. when running a 32-bit binary under a 64-bit kernel). */ 1238 data->gpr_size = word_size; 1239 data->fpr_size = 8; 1240 1241 for (i = 0; i < S390_NUM_GPRS; i++) 1242 pv_set_to_register (&data->gpr[i], S390_R0_REGNUM + i, 0); 1243 1244 for (i = 0; i < S390_NUM_FPRS; i++) 1245 pv_set_to_register (&data->fpr[i], S390_F0_REGNUM + i, 0); 1246 1247 for (i = 0; i < S390_NUM_GPRS; i++) 1248 data->gpr_slot[i] = 0; 1249 1250 for (i = 0; i < S390_NUM_FPRS; i++) 1251 data->fpr_slot[i] = 0; 1252 1253 data->back_chain_saved_p = 0; 1254 } 1255 1256 /* Start interpreting instructions, until we hit the frame's 1257 current PC or the first branch instruction. */ 1258 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc) 1259 { 1260 bfd_byte insn[S390_MAX_INSTR_SIZE]; 1261 int insn_len = s390_readinstruction (insn, pc); 1262 1263 /* Fields for various kinds of instructions. */ 1264 unsigned int b2, r1, r2, x2, r3; 1265 int i2, d2; 1266 1267 /* The values of SP and FP before this instruction, 1268 for detecting instructions that change them. */ 1269 struct prologue_value pre_insn_sp, pre_insn_fp; 1270 /* Likewise for the flag whether the back chain was saved. */ 1271 int pre_insn_back_chain_saved_p; 1272 1273 /* If we got an error trying to read the instruction, report it. */ 1274 if (insn_len < 0) 1275 { 1276 result = 0; 1277 break; 1278 } 1279 1280 next_pc = pc + insn_len; 1281 1282 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; 1283 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; 1284 pre_insn_back_chain_saved_p = data->back_chain_saved_p; 1285 1286 /* LHI r1, i2 --- load halfword immediate */ 1287 if (word_size == 4 1288 && is_ri (insn, op1_lhi, op2_lhi, &r1, &i2)) 1289 pv_set_to_constant (&data->gpr[r1], i2); 1290 1291 /* LGHI r1, i2 --- load halfword immediate (64-bit version) */ 1292 else if (word_size == 8 1293 && is_ri (insn, op1_lghi, op2_lghi, &r1, &i2)) 1294 pv_set_to_constant (&data->gpr[r1], i2); 1295 1296 /* LR r1, r2 --- load from register */ 1297 else if (word_size == 4 1298 && is_rr (insn, op_lr, &r1, &r2)) 1299 data->gpr[r1] = data->gpr[r2]; 1300 1301 /* LGR r1, r2 --- load from register (64-bit version) */ 1302 else if (word_size == 8 1303 && is_rre (insn, op_lgr, &r1, &r2)) 1304 data->gpr[r1] = data->gpr[r2]; 1305 1306 /* L r1, d2(x2, b2) --- load */ 1307 else if (word_size == 4 1308 && is_rx (insn, op_l, &r1, &d2, &x2, &b2)) 1309 { 1310 struct prologue_value addr; 1311 1312 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1313 s390_load (&addr, 4, &data->gpr[r1], data); 1314 } 1315 1316 /* LY r1, d2(x2, b2) --- load (long-displacement version) */ 1317 else if (word_size == 4 1318 && is_rxy (insn, op1_ly, op2_ly, &r1, &d2, &x2, &b2)) 1319 { 1320 struct prologue_value addr; 1321 1322 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1323 s390_load (&addr, 4, &data->gpr[r1], data); 1324 } 1325 1326 /* LG r1, d2(x2, b2) --- load (64-bit version) */ 1327 else if (word_size == 8 1328 && is_rxy (insn, op1_lg, op2_lg, &r1, &d2, &x2, &b2)) 1329 { 1330 struct prologue_value addr; 1331 1332 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1333 s390_load (&addr, 8, &data->gpr[r1], data); 1334 } 1335 1336 /* ST r1, d2(x2, b2) --- store */ 1337 else if (word_size == 4 1338 && is_rx (insn, op_st, &r1, &d2, &x2, &b2)) 1339 { 1340 struct prologue_value addr; 1341 1342 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1343 s390_store (&addr, 4, &data->gpr[r1], data); 1344 } 1345 1346 /* STY r1, d2(x2, b2) --- store (long-displacement version) */ 1347 else if (word_size == 4 1348 && is_rxy (insn, op1_sty, op2_sty, &r1, &d2, &x2, &b2)) 1349 { 1350 struct prologue_value addr; 1351 1352 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1353 s390_store (&addr, 4, &data->gpr[r1], data); 1354 } 1355 1356 /* STG r1, d2(x2, b2) --- store (64-bit version) */ 1357 else if (word_size == 8 1358 && is_rxy (insn, op1_stg, op2_stg, &r1, &d2, &x2, &b2)) 1359 { 1360 struct prologue_value addr; 1361 1362 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1363 s390_store (&addr, 8, &data->gpr[r1], data); 1364 } 1365 1366 /* STD r1, d2(x2,b2) --- store floating-point register */ 1367 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2)) 1368 { 1369 struct prologue_value addr; 1370 1371 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1372 s390_store (&addr, 8, &data->fpr[r1], data); 1373 } 1374 1375 /* STM r1, r3, d2(b2) --- store multiple */ 1376 else if (word_size == 4 1377 && is_rs (insn, op_stm, &r1, &r3, &d2, &b2)) 1378 { 1379 int regnum; 1380 int offset; 1381 struct prologue_value addr; 1382 1383 for (regnum = r1, offset = 0; 1384 regnum <= r3; 1385 regnum++, offset += 4) 1386 { 1387 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2); 1388 s390_store (&addr, 4, &data->gpr[regnum], data); 1389 } 1390 } 1391 1392 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement version) */ 1393 else if (word_size == 4 1394 && is_rsy (insn, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)) 1395 { 1396 int regnum; 1397 int offset; 1398 struct prologue_value addr; 1399 1400 for (regnum = r1, offset = 0; 1401 regnum <= r3; 1402 regnum++, offset += 4) 1403 { 1404 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2); 1405 s390_store (&addr, 4, &data->gpr[regnum], data); 1406 } 1407 } 1408 1409 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version) */ 1410 else if (word_size == 8 1411 && is_rsy (insn, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2)) 1412 { 1413 int regnum; 1414 int offset; 1415 struct prologue_value addr; 1416 1417 for (regnum = r1, offset = 0; 1418 regnum <= r3; 1419 regnum++, offset += 8) 1420 { 1421 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2); 1422 s390_store (&addr, 8, &data->gpr[regnum], data); 1423 } 1424 } 1425 1426 /* AHI r1, i2 --- add halfword immediate */ 1427 else if (word_size == 4 1428 && is_ri (insn, op1_ahi, op2_ahi, &r1, &i2)) 1429 pv_add_constant (&data->gpr[r1], i2); 1430 1431 /* AGHI r1, i2 --- add halfword immediate (64-bit version) */ 1432 else if (word_size == 8 1433 && is_ri (insn, op1_aghi, op2_aghi, &r1, &i2)) 1434 pv_add_constant (&data->gpr[r1], i2); 1435 1436 /* AR r1, r2 -- add register */ 1437 else if (word_size == 4 1438 && is_rr (insn, op_ar, &r1, &r2)) 1439 pv_add (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]); 1440 1441 /* AGR r1, r2 -- add register (64-bit version) */ 1442 else if (word_size == 8 1443 && is_rre (insn, op_agr, &r1, &r2)) 1444 pv_add (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]); 1445 1446 /* A r1, d2(x2, b2) -- add */ 1447 else if (word_size == 4 1448 && is_rx (insn, op_a, &r1, &d2, &x2, &b2)) 1449 { 1450 struct prologue_value addr; 1451 struct prologue_value value; 1452 1453 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1454 s390_load (&addr, 4, &value, data); 1455 1456 pv_add (&data->gpr[r1], &data->gpr[r1], &value); 1457 } 1458 1459 /* AY r1, d2(x2, b2) -- add (long-displacement version) */ 1460 else if (word_size == 4 1461 && is_rxy (insn, op1_ay, op2_ay, &r1, &d2, &x2, &b2)) 1462 { 1463 struct prologue_value addr; 1464 struct prologue_value value; 1465 1466 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1467 s390_load (&addr, 4, &value, data); 1468 1469 pv_add (&data->gpr[r1], &data->gpr[r1], &value); 1470 } 1471 1472 /* AG r1, d2(x2, b2) -- add (64-bit version) */ 1473 else if (word_size == 8 1474 && is_rxy (insn, op1_ag, op2_ag, &r1, &d2, &x2, &b2)) 1475 { 1476 struct prologue_value addr; 1477 struct prologue_value value; 1478 1479 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1480 s390_load (&addr, 8, &value, data); 1481 1482 pv_add (&data->gpr[r1], &data->gpr[r1], &value); 1483 } 1484 1485 /* SR r1, r2 -- subtract register */ 1486 else if (word_size == 4 1487 && is_rr (insn, op_sr, &r1, &r2)) 1488 pv_subtract (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]); 1489 1490 /* SGR r1, r2 -- subtract register (64-bit version) */ 1491 else if (word_size == 8 1492 && is_rre (insn, op_sgr, &r1, &r2)) 1493 pv_subtract (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]); 1494 1495 /* S r1, d2(x2, b2) -- subtract */ 1496 else if (word_size == 4 1497 && is_rx (insn, op_s, &r1, &d2, &x2, &b2)) 1498 { 1499 struct prologue_value addr; 1500 struct prologue_value value; 1501 1502 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1503 s390_load (&addr, 4, &value, data); 1504 1505 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value); 1506 } 1507 1508 /* SY r1, d2(x2, b2) -- subtract (long-displacement version) */ 1509 else if (word_size == 4 1510 && is_rxy (insn, op1_sy, op2_sy, &r1, &d2, &x2, &b2)) 1511 { 1512 struct prologue_value addr; 1513 struct prologue_value value; 1514 1515 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1516 s390_load (&addr, 4, &value, data); 1517 1518 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value); 1519 } 1520 1521 /* SG r1, d2(x2, b2) -- subtract (64-bit version) */ 1522 else if (word_size == 8 1523 && is_rxy (insn, op1_sg, op2_sg, &r1, &d2, &x2, &b2)) 1524 { 1525 struct prologue_value addr; 1526 struct prologue_value value; 1527 1528 compute_x_addr (&addr, data->gpr, d2, x2, b2); 1529 s390_load (&addr, 8, &value, data); 1530 1531 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value); 1532 } 1533 1534 /* NR r1, r2 --- logical and */ 1535 else if (word_size == 4 1536 && is_rr (insn, op_nr, &r1, &r2)) 1537 pv_logical_and (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]); 1538 1539 /* NGR r1, r2 >--- logical and (64-bit version) */ 1540 else if (word_size == 8 1541 && is_rre (insn, op_ngr, &r1, &r2)) 1542 pv_logical_and (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]); 1543 1544 /* LA r1, d2(x2, b2) --- load address */ 1545 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)) 1546 compute_x_addr (&data->gpr[r1], data->gpr, d2, x2, b2); 1547 1548 /* LAY r1, d2(x2, b2) --- load address (long-displacement version) */ 1549 else if (is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2)) 1550 compute_x_addr (&data->gpr[r1], data->gpr, d2, x2, b2); 1551 1552 /* LARL r1, i2 --- load address relative long */ 1553 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) 1554 pv_set_to_constant (&data->gpr[r1], pc + i2 * 2); 1555 1556 /* BASR r1, 0 --- branch and save 1557 Since r2 is zero, this saves the PC in r1, but doesn't branch. */ 1558 else if (is_rr (insn, op_basr, &r1, &r2) 1559 && r2 == 0) 1560 pv_set_to_constant (&data->gpr[r1], next_pc); 1561 1562 /* BRAS r1, i2 --- branch relative and save */ 1563 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)) 1564 { 1565 pv_set_to_constant (&data->gpr[r1], next_pc); 1566 next_pc = pc + i2 * 2; 1567 1568 /* We'd better not interpret any backward branches. We'll 1569 never terminate. */ 1570 if (next_pc <= pc) 1571 break; 1572 } 1573 1574 /* Terminate search when hitting any other branch instruction. */ 1575 else if (is_rr (insn, op_basr, &r1, &r2) 1576 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2) 1577 || is_rr (insn, op_bcr, &r1, &r2) 1578 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) 1579 || is_ri (insn, op1_brc, op2_brc, &r1, &i2) 1580 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) 1581 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2)) 1582 break; 1583 1584 else 1585 /* An instruction we don't know how to simulate. The only 1586 safe thing to do would be to set every value we're tracking 1587 to 'unknown'. Instead, we'll be optimistic: we assume that 1588 we *can* interpret every instruction that the compiler uses 1589 to manipulate any of the data we're interested in here -- 1590 then we can just ignore anything else. */ 1591 ; 1592 1593 /* Record the address after the last instruction that changed 1594 the FP, SP, or backlink. Ignore instructions that changed 1595 them back to their original values --- those are probably 1596 restore instructions. (The back chain is never restored, 1597 just popped.) */ 1598 { 1599 struct prologue_value *sp = &data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; 1600 struct prologue_value *fp = &data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; 1601 1602 if ((! pv_is_identical (&pre_insn_sp, sp) 1603 && ! pv_is_register (sp, S390_SP_REGNUM, 0)) 1604 || (! pv_is_identical (&pre_insn_fp, fp) 1605 && ! pv_is_register (fp, S390_FRAME_REGNUM, 0)) 1606 || pre_insn_back_chain_saved_p != data->back_chain_saved_p) 1607 result = next_pc; 1608 } 1609 } 1610 1611 return result; 1612} 1613 1614/* Advance PC across any function entry prologue instructions to reach 1615 some "real" code. */ 1616static CORE_ADDR 1617s390_skip_prologue (CORE_ADDR pc) 1618{ 1619 struct s390_prologue_data data; 1620 CORE_ADDR skip_pc; 1621 skip_pc = s390_analyze_prologue (current_gdbarch, pc, (CORE_ADDR)-1, &data); 1622 return skip_pc ? skip_pc : pc; 1623} 1624 1625/* Return true if we are in the functin's epilogue, i.e. after the 1626 instruction that destroyed the function's stack frame. */ 1627static int 1628s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) 1629{ 1630 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 1631 1632 /* In frameless functions, there's not frame to destroy and thus 1633 we don't care about the epilogue. 1634 1635 In functions with frame, the epilogue sequence is a pair of 1636 a LM-type instruction that restores (amongst others) the 1637 return register %r14 and the stack pointer %r15, followed 1638 by a branch 'br %r14' --or equivalent-- that effects the 1639 actual return. 1640 1641 In that situation, this function needs to return 'true' in 1642 exactly one case: when pc points to that branch instruction. 1643 1644 Thus we try to disassemble the one instructions immediately 1645 preceeding pc and check whether it is an LM-type instruction 1646 modifying the stack pointer. 1647 1648 Note that disassembling backwards is not reliable, so there 1649 is a slight chance of false positives here ... */ 1650 1651 bfd_byte insn[6]; 1652 unsigned int r1, r3, b2; 1653 int d2; 1654 1655 if (word_size == 4 1656 && !deprecated_read_memory_nobpt (pc - 4, insn, 4) 1657 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2) 1658 && r3 == S390_SP_REGNUM - S390_R0_REGNUM) 1659 return 1; 1660 1661 if (word_size == 4 1662 && !deprecated_read_memory_nobpt (pc - 6, insn, 6) 1663 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2) 1664 && r3 == S390_SP_REGNUM - S390_R0_REGNUM) 1665 return 1; 1666 1667 if (word_size == 8 1668 && !deprecated_read_memory_nobpt (pc - 6, insn, 6) 1669 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2) 1670 && r3 == S390_SP_REGNUM - S390_R0_REGNUM) 1671 return 1; 1672 1673 return 0; 1674} 1675 1676 1677/* Normal stack frames. */ 1678 1679struct s390_unwind_cache { 1680 1681 CORE_ADDR func; 1682 CORE_ADDR frame_base; 1683 CORE_ADDR local_base; 1684 1685 struct trad_frame_saved_reg *saved_regs; 1686}; 1687 1688static int 1689s390_prologue_frame_unwind_cache (struct frame_info *next_frame, 1690 struct s390_unwind_cache *info) 1691{ 1692 struct gdbarch *gdbarch = get_frame_arch (next_frame); 1693 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 1694 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 1695 struct s390_prologue_data data; 1696 struct prologue_value *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; 1697 struct prologue_value *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; 1698 int i; 1699 CORE_ADDR cfa; 1700 CORE_ADDR func; 1701 CORE_ADDR result; 1702 ULONGEST reg; 1703 CORE_ADDR prev_sp; 1704 int frame_pointer; 1705 int size; 1706 1707 /* Try to find the function start address. If we can't find it, we don't 1708 bother searching for it -- with modern compilers this would be mostly 1709 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data 1710 or else a valid backchain ... */ 1711 func = frame_func_unwind (next_frame); 1712 if (!func) 1713 return 0; 1714 1715 /* Try to analyze the prologue. */ 1716 result = s390_analyze_prologue (gdbarch, func, 1717 frame_pc_unwind (next_frame), &data); 1718 if (!result) 1719 return 0; 1720 1721 /* If this was successful, we should have found the instruction that 1722 sets the stack pointer register to the previous value of the stack 1723 pointer minus the frame size. */ 1724 if (sp->kind != pv_register || sp->reg != S390_SP_REGNUM) 1725 return 0; 1726 1727 /* A frame size of zero at this point can mean either a real 1728 frameless function, or else a failure to find the prologue. 1729 Perform some sanity checks to verify we really have a 1730 frameless function. */ 1731 if (sp->k == 0) 1732 { 1733 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame 1734 size zero. This is only possible if the next frame is a sentinel 1735 frame, a dummy frame, or a signal trampoline frame. */ 1736 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be 1737 needed, instead the code should simpliy rely on its 1738 analysis. */ 1739 if (get_frame_type (next_frame) == NORMAL_FRAME) 1740 return 0; 1741 1742 /* If we really have a frameless function, %r14 must be valid 1743 -- in particular, it must point to a different function. */ 1744 reg = frame_unwind_register_unsigned (next_frame, S390_RETADDR_REGNUM); 1745 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1; 1746 if (get_pc_function_start (reg) == func) 1747 { 1748 /* However, there is one case where it *is* valid for %r14 1749 to point to the same function -- if this is a recursive 1750 call, and we have stopped in the prologue *before* the 1751 stack frame was allocated. 1752 1753 Recognize this case by looking ahead a bit ... */ 1754 1755 struct s390_prologue_data data2; 1756 struct prologue_value *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; 1757 1758 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2) 1759 && sp->kind == pv_register 1760 && sp->reg == S390_SP_REGNUM 1761 && sp->k != 0)) 1762 return 0; 1763 } 1764 } 1765 1766 1767 /* OK, we've found valid prologue data. */ 1768 size = -sp->k; 1769 1770 /* If the frame pointer originally also holds the same value 1771 as the stack pointer, we're probably using it. If it holds 1772 some other value -- even a constant offset -- it is most 1773 likely used as temp register. */ 1774 if (pv_is_identical (sp, fp)) 1775 frame_pointer = S390_FRAME_REGNUM; 1776 else 1777 frame_pointer = S390_SP_REGNUM; 1778 1779 /* If we've detected a function with stack frame, we'll still have to 1780 treat it as frameless if we're currently within the function epilog 1781 code at a point where the frame pointer has already been restored. 1782 This can only happen in an innermost frame. */ 1783 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed, 1784 instead the code should simpliy rely on its analysis. */ 1785 if (size > 0 && get_frame_type (next_frame) != NORMAL_FRAME) 1786 { 1787 /* See the comment in s390_in_function_epilogue_p on why this is 1788 not completely reliable ... */ 1789 if (s390_in_function_epilogue_p (gdbarch, frame_pc_unwind (next_frame))) 1790 { 1791 memset (&data, 0, sizeof (data)); 1792 size = 0; 1793 frame_pointer = S390_SP_REGNUM; 1794 } 1795 } 1796 1797 /* Once we know the frame register and the frame size, we can unwind 1798 the current value of the frame register from the next frame, and 1799 add back the frame size to arrive that the previous frame's 1800 stack pointer value. */ 1801 prev_sp = frame_unwind_register_unsigned (next_frame, frame_pointer) + size; 1802 cfa = prev_sp + 16*word_size + 32; 1803 1804 /* Record the addresses of all register spill slots the prologue parser 1805 has recognized. Consider only registers defined as call-saved by the 1806 ABI; for call-clobbered registers the parser may have recognized 1807 spurious stores. */ 1808 1809 for (i = 6; i <= 15; i++) 1810 if (data.gpr_slot[i] != 0) 1811 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i]; 1812 1813 switch (tdep->abi) 1814 { 1815 case ABI_LINUX_S390: 1816 if (data.fpr_slot[4] != 0) 1817 info->saved_regs[S390_F4_REGNUM].addr = cfa - data.fpr_slot[4]; 1818 if (data.fpr_slot[6] != 0) 1819 info->saved_regs[S390_F6_REGNUM].addr = cfa - data.fpr_slot[6]; 1820 break; 1821 1822 case ABI_LINUX_ZSERIES: 1823 for (i = 8; i <= 15; i++) 1824 if (data.fpr_slot[i] != 0) 1825 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i]; 1826 break; 1827 } 1828 1829 /* Function return will set PC to %r14. */ 1830 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM]; 1831 1832 /* In frameless functions, we unwind simply by moving the return 1833 address to the PC. However, if we actually stored to the 1834 save area, use that -- we might only think the function frameless 1835 because we're in the middle of the prologue ... */ 1836 if (size == 0 1837 && !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM)) 1838 { 1839 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM; 1840 } 1841 1842 /* Another sanity check: unless this is a frameless function, 1843 we should have found spill slots for SP and PC. 1844 If not, we cannot unwind further -- this happens e.g. in 1845 libc's thread_start routine. */ 1846 if (size > 0) 1847 { 1848 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM) 1849 || !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM)) 1850 prev_sp = -1; 1851 } 1852 1853 /* We use the current value of the frame register as local_base, 1854 and the top of the register save area as frame_base. */ 1855 if (prev_sp != -1) 1856 { 1857 info->frame_base = prev_sp + 16*word_size + 32; 1858 info->local_base = prev_sp - size; 1859 } 1860 1861 info->func = func; 1862 return 1; 1863} 1864 1865static void 1866s390_backchain_frame_unwind_cache (struct frame_info *next_frame, 1867 struct s390_unwind_cache *info) 1868{ 1869 struct gdbarch *gdbarch = get_frame_arch (next_frame); 1870 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 1871 CORE_ADDR backchain; 1872 ULONGEST reg; 1873 LONGEST sp; 1874 1875 /* Get the backchain. */ 1876 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); 1877 backchain = read_memory_unsigned_integer (reg, word_size); 1878 1879 /* A zero backchain terminates the frame chain. As additional 1880 sanity check, let's verify that the spill slot for SP in the 1881 save area pointed to by the backchain in fact links back to 1882 the save area. */ 1883 if (backchain != 0 1884 && safe_read_memory_integer (backchain + 15*word_size, word_size, &sp) 1885 && (CORE_ADDR)sp == backchain) 1886 { 1887 /* We don't know which registers were saved, but it will have 1888 to be at least %r14 and %r15. This will allow us to continue 1889 unwinding, but other prev-frame registers may be incorrect ... */ 1890 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size; 1891 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size; 1892 1893 /* Function return will set PC to %r14. */ 1894 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM]; 1895 1896 /* We use the current value of the frame register as local_base, 1897 and the top of the register save area as frame_base. */ 1898 info->frame_base = backchain + 16*word_size + 32; 1899 info->local_base = reg; 1900 } 1901 1902 info->func = frame_pc_unwind (next_frame); 1903} 1904 1905static struct s390_unwind_cache * 1906s390_frame_unwind_cache (struct frame_info *next_frame, 1907 void **this_prologue_cache) 1908{ 1909 struct s390_unwind_cache *info; 1910 if (*this_prologue_cache) 1911 return *this_prologue_cache; 1912 1913 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache); 1914 *this_prologue_cache = info; 1915 info->saved_regs = trad_frame_alloc_saved_regs (next_frame); 1916 info->func = -1; 1917 info->frame_base = -1; 1918 info->local_base = -1; 1919 1920 /* Try to use prologue analysis to fill the unwind cache. 1921 If this fails, fall back to reading the stack backchain. */ 1922 if (!s390_prologue_frame_unwind_cache (next_frame, info)) 1923 s390_backchain_frame_unwind_cache (next_frame, info); 1924 1925 return info; 1926} 1927 1928static void 1929s390_frame_this_id (struct frame_info *next_frame, 1930 void **this_prologue_cache, 1931 struct frame_id *this_id) 1932{ 1933 struct s390_unwind_cache *info 1934 = s390_frame_unwind_cache (next_frame, this_prologue_cache); 1935 1936 if (info->frame_base == -1) 1937 return; 1938 1939 *this_id = frame_id_build (info->frame_base, info->func); 1940} 1941 1942static void 1943s390_frame_prev_register (struct frame_info *next_frame, 1944 void **this_prologue_cache, 1945 int regnum, int *optimizedp, 1946 enum lval_type *lvalp, CORE_ADDR *addrp, 1947 int *realnump, void *bufferp) 1948{ 1949 struct s390_unwind_cache *info 1950 = s390_frame_unwind_cache (next_frame, this_prologue_cache); 1951 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum, 1952 optimizedp, lvalp, addrp, realnump, bufferp); 1953} 1954 1955static const struct frame_unwind s390_frame_unwind = { 1956 NORMAL_FRAME, 1957 s390_frame_this_id, 1958 s390_frame_prev_register 1959}; 1960 1961static const struct frame_unwind * 1962s390_frame_sniffer (struct frame_info *next_frame) 1963{ 1964 return &s390_frame_unwind; 1965} 1966 1967 1968/* Code stubs and their stack frames. For things like PLTs and NULL 1969 function calls (where there is no true frame and the return address 1970 is in the RETADDR register). */ 1971 1972struct s390_stub_unwind_cache 1973{ 1974 CORE_ADDR frame_base; 1975 struct trad_frame_saved_reg *saved_regs; 1976}; 1977 1978static struct s390_stub_unwind_cache * 1979s390_stub_frame_unwind_cache (struct frame_info *next_frame, 1980 void **this_prologue_cache) 1981{ 1982 struct gdbarch *gdbarch = get_frame_arch (next_frame); 1983 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 1984 struct s390_stub_unwind_cache *info; 1985 ULONGEST reg; 1986 1987 if (*this_prologue_cache) 1988 return *this_prologue_cache; 1989 1990 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache); 1991 *this_prologue_cache = info; 1992 info->saved_regs = trad_frame_alloc_saved_regs (next_frame); 1993 1994 /* The return address is in register %r14. */ 1995 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM; 1996 1997 /* Retrieve stack pointer and determine our frame base. */ 1998 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); 1999 info->frame_base = reg + 16*word_size + 32; 2000 2001 return info; 2002} 2003 2004static void 2005s390_stub_frame_this_id (struct frame_info *next_frame, 2006 void **this_prologue_cache, 2007 struct frame_id *this_id) 2008{ 2009 struct s390_stub_unwind_cache *info 2010 = s390_stub_frame_unwind_cache (next_frame, this_prologue_cache); 2011 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame)); 2012} 2013 2014static void 2015s390_stub_frame_prev_register (struct frame_info *next_frame, 2016 void **this_prologue_cache, 2017 int regnum, int *optimizedp, 2018 enum lval_type *lvalp, CORE_ADDR *addrp, 2019 int *realnump, void *bufferp) 2020{ 2021 struct s390_stub_unwind_cache *info 2022 = s390_stub_frame_unwind_cache (next_frame, this_prologue_cache); 2023 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum, 2024 optimizedp, lvalp, addrp, realnump, bufferp); 2025} 2026 2027static const struct frame_unwind s390_stub_frame_unwind = { 2028 NORMAL_FRAME, 2029 s390_stub_frame_this_id, 2030 s390_stub_frame_prev_register 2031}; 2032 2033static const struct frame_unwind * 2034s390_stub_frame_sniffer (struct frame_info *next_frame) 2035{ 2036 CORE_ADDR pc = frame_pc_unwind (next_frame); 2037 bfd_byte insn[S390_MAX_INSTR_SIZE]; 2038 2039 /* If the current PC points to non-readable memory, we assume we 2040 have trapped due to an invalid function pointer call. We handle 2041 the non-existing current function like a PLT stub. */ 2042 if (in_plt_section (pc, NULL) 2043 || s390_readinstruction (insn, pc) < 0) 2044 return &s390_stub_frame_unwind; 2045 return NULL; 2046} 2047 2048 2049/* Signal trampoline stack frames. */ 2050 2051struct s390_sigtramp_unwind_cache { 2052 CORE_ADDR frame_base; 2053 struct trad_frame_saved_reg *saved_regs; 2054}; 2055 2056static struct s390_sigtramp_unwind_cache * 2057s390_sigtramp_frame_unwind_cache (struct frame_info *next_frame, 2058 void **this_prologue_cache) 2059{ 2060 struct gdbarch *gdbarch = get_frame_arch (next_frame); 2061 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 2062 struct s390_sigtramp_unwind_cache *info; 2063 ULONGEST this_sp, prev_sp; 2064 CORE_ADDR next_ra, next_cfa, sigreg_ptr; 2065 int i; 2066 2067 if (*this_prologue_cache) 2068 return *this_prologue_cache; 2069 2070 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache); 2071 *this_prologue_cache = info; 2072 info->saved_regs = trad_frame_alloc_saved_regs (next_frame); 2073 2074 this_sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); 2075 next_ra = frame_pc_unwind (next_frame); 2076 next_cfa = this_sp + 16*word_size + 32; 2077 2078 /* New-style RT frame: 2079 retcode + alignment (8 bytes) 2080 siginfo (128 bytes) 2081 ucontext (contains sigregs at offset 5 words) */ 2082 if (next_ra == next_cfa) 2083 { 2084 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8); 2085 } 2086 2087 /* Old-style RT frame and all non-RT frames: 2088 old signal mask (8 bytes) 2089 pointer to sigregs */ 2090 else 2091 { 2092 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, word_size); 2093 } 2094 2095 /* The sigregs structure looks like this: 2096 long psw_mask; 2097 long psw_addr; 2098 long gprs[16]; 2099 int acrs[16]; 2100 int fpc; 2101 int __pad; 2102 double fprs[16]; */ 2103 2104 /* Let's ignore the PSW mask, it will not be restored anyway. */ 2105 sigreg_ptr += word_size; 2106 2107 /* Next comes the PSW address. */ 2108 info->saved_regs[S390_PC_REGNUM].addr = sigreg_ptr; 2109 sigreg_ptr += word_size; 2110 2111 /* Then the GPRs. */ 2112 for (i = 0; i < 16; i++) 2113 { 2114 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr; 2115 sigreg_ptr += word_size; 2116 } 2117 2118 /* Then the ACRs. */ 2119 for (i = 0; i < 16; i++) 2120 { 2121 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr; 2122 sigreg_ptr += 4; 2123 } 2124 2125 /* The floating-point control word. */ 2126 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr; 2127 sigreg_ptr += 8; 2128 2129 /* And finally the FPRs. */ 2130 for (i = 0; i < 16; i++) 2131 { 2132 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr; 2133 sigreg_ptr += 8; 2134 } 2135 2136 /* Restore the previous frame's SP. */ 2137 prev_sp = read_memory_unsigned_integer ( 2138 info->saved_regs[S390_SP_REGNUM].addr, 2139 word_size); 2140 2141 /* Determine our frame base. */ 2142 info->frame_base = prev_sp + 16*word_size + 32; 2143 2144 return info; 2145} 2146 2147static void 2148s390_sigtramp_frame_this_id (struct frame_info *next_frame, 2149 void **this_prologue_cache, 2150 struct frame_id *this_id) 2151{ 2152 struct s390_sigtramp_unwind_cache *info 2153 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); 2154 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame)); 2155} 2156 2157static void 2158s390_sigtramp_frame_prev_register (struct frame_info *next_frame, 2159 void **this_prologue_cache, 2160 int regnum, int *optimizedp, 2161 enum lval_type *lvalp, CORE_ADDR *addrp, 2162 int *realnump, void *bufferp) 2163{ 2164 struct s390_sigtramp_unwind_cache *info 2165 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); 2166 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum, 2167 optimizedp, lvalp, addrp, realnump, bufferp); 2168} 2169 2170static const struct frame_unwind s390_sigtramp_frame_unwind = { 2171 SIGTRAMP_FRAME, 2172 s390_sigtramp_frame_this_id, 2173 s390_sigtramp_frame_prev_register 2174}; 2175 2176static const struct frame_unwind * 2177s390_sigtramp_frame_sniffer (struct frame_info *next_frame) 2178{ 2179 CORE_ADDR pc = frame_pc_unwind (next_frame); 2180 bfd_byte sigreturn[2]; 2181 2182 if (deprecated_read_memory_nobpt (pc, sigreturn, 2)) 2183 return NULL; 2184 2185 if (sigreturn[0] != 0x0a /* svc */) 2186 return NULL; 2187 2188 if (sigreturn[1] != 119 /* sigreturn */ 2189 && sigreturn[1] != 173 /* rt_sigreturn */) 2190 return NULL; 2191 2192 return &s390_sigtramp_frame_unwind; 2193} 2194 2195 2196/* Frame base handling. */ 2197 2198static CORE_ADDR 2199s390_frame_base_address (struct frame_info *next_frame, void **this_cache) 2200{ 2201 struct s390_unwind_cache *info 2202 = s390_frame_unwind_cache (next_frame, this_cache); 2203 return info->frame_base; 2204} 2205 2206static CORE_ADDR 2207s390_local_base_address (struct frame_info *next_frame, void **this_cache) 2208{ 2209 struct s390_unwind_cache *info 2210 = s390_frame_unwind_cache (next_frame, this_cache); 2211 return info->local_base; 2212} 2213 2214static const struct frame_base s390_frame_base = { 2215 &s390_frame_unwind, 2216 s390_frame_base_address, 2217 s390_local_base_address, 2218 s390_local_base_address 2219}; 2220 2221static CORE_ADDR 2222s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 2223{ 2224 ULONGEST pc; 2225 pc = frame_unwind_register_unsigned (next_frame, S390_PC_REGNUM); 2226 return gdbarch_addr_bits_remove (gdbarch, pc); 2227} 2228 2229static CORE_ADDR 2230s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) 2231{ 2232 ULONGEST sp; 2233 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); 2234 return gdbarch_addr_bits_remove (gdbarch, sp); 2235} 2236 2237 2238/* DWARF-2 frame support. */ 2239 2240static void 2241s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, 2242 struct dwarf2_frame_state_reg *reg) 2243{ 2244 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 2245 2246 switch (tdep->abi) 2247 { 2248 case ABI_LINUX_S390: 2249 /* Call-saved registers. */ 2250 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) 2251 || regnum == S390_F4_REGNUM 2252 || regnum == S390_F6_REGNUM) 2253 reg->how = DWARF2_FRAME_REG_SAME_VALUE; 2254 2255 /* Call-clobbered registers. */ 2256 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM) 2257 || (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM 2258 && regnum != S390_F4_REGNUM && regnum != S390_F6_REGNUM)) 2259 reg->how = DWARF2_FRAME_REG_UNDEFINED; 2260 2261 /* The return address column. */ 2262 else if (regnum == S390_PC_REGNUM) 2263 reg->how = DWARF2_FRAME_REG_RA; 2264 break; 2265 2266 case ABI_LINUX_ZSERIES: 2267 /* Call-saved registers. */ 2268 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) 2269 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)) 2270 reg->how = DWARF2_FRAME_REG_SAME_VALUE; 2271 2272 /* Call-clobbered registers. */ 2273 else if ((regnum >= S390_R0_REGNUM && regnum <= S390_R5_REGNUM) 2274 || (regnum >= S390_F0_REGNUM && regnum <= S390_F7_REGNUM)) 2275 reg->how = DWARF2_FRAME_REG_UNDEFINED; 2276 2277 /* The return address column. */ 2278 else if (regnum == S390_PC_REGNUM) 2279 reg->how = DWARF2_FRAME_REG_RA; 2280 break; 2281 } 2282} 2283 2284 2285/* Dummy function calls. */ 2286 2287/* Return non-zero if TYPE is an integer-like type, zero otherwise. 2288 "Integer-like" types are those that should be passed the way 2289 integers are: integers, enums, ranges, characters, and booleans. */ 2290static int 2291is_integer_like (struct type *type) 2292{ 2293 enum type_code code = TYPE_CODE (type); 2294 2295 return (code == TYPE_CODE_INT 2296 || code == TYPE_CODE_ENUM 2297 || code == TYPE_CODE_RANGE 2298 || code == TYPE_CODE_CHAR 2299 || code == TYPE_CODE_BOOL); 2300} 2301 2302/* Return non-zero if TYPE is a pointer-like type, zero otherwise. 2303 "Pointer-like" types are those that should be passed the way 2304 pointers are: pointers and references. */ 2305static int 2306is_pointer_like (struct type *type) 2307{ 2308 enum type_code code = TYPE_CODE (type); 2309 2310 return (code == TYPE_CODE_PTR 2311 || code == TYPE_CODE_REF); 2312} 2313 2314 2315/* Return non-zero if TYPE is a `float singleton' or `double 2316 singleton', zero otherwise. 2317 2318 A `T singleton' is a struct type with one member, whose type is 2319 either T or a `T singleton'. So, the following are all float 2320 singletons: 2321 2322 struct { float x }; 2323 struct { struct { float x; } x; }; 2324 struct { struct { struct { float x; } x; } x; }; 2325 2326 ... and so on. 2327 2328 All such structures are passed as if they were floats or doubles, 2329 as the (revised) ABI says. */ 2330static int 2331is_float_singleton (struct type *type) 2332{ 2333 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) 2334 { 2335 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0); 2336 CHECK_TYPEDEF (singleton_type); 2337 2338 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT 2339 || is_float_singleton (singleton_type)); 2340 } 2341 2342 return 0; 2343} 2344 2345 2346/* Return non-zero if TYPE is a struct-like type, zero otherwise. 2347 "Struct-like" types are those that should be passed as structs are: 2348 structs and unions. 2349 2350 As an odd quirk, not mentioned in the ABI, GCC passes float and 2351 double singletons as if they were a plain float, double, etc. (The 2352 corresponding union types are handled normally.) So we exclude 2353 those types here. *shrug* */ 2354static int 2355is_struct_like (struct type *type) 2356{ 2357 enum type_code code = TYPE_CODE (type); 2358 2359 return (code == TYPE_CODE_UNION 2360 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type))); 2361} 2362 2363 2364/* Return non-zero if TYPE is a float-like type, zero otherwise. 2365 "Float-like" types are those that should be passed as 2366 floating-point values are. 2367 2368 You'd think this would just be floats, doubles, long doubles, etc. 2369 But as an odd quirk, not mentioned in the ABI, GCC passes float and 2370 double singletons as if they were a plain float, double, etc. (The 2371 corresponding union types are handled normally.) So we include 2372 those types here. *shrug* */ 2373static int 2374is_float_like (struct type *type) 2375{ 2376 return (TYPE_CODE (type) == TYPE_CODE_FLT 2377 || is_float_singleton (type)); 2378} 2379 2380 2381static int 2382is_power_of_two (unsigned int n) 2383{ 2384 return ((n & (n - 1)) == 0); 2385} 2386 2387/* Return non-zero if TYPE should be passed as a pointer to a copy, 2388 zero otherwise. */ 2389static int 2390s390_function_arg_pass_by_reference (struct type *type) 2391{ 2392 unsigned length = TYPE_LENGTH (type); 2393 if (length > 8) 2394 return 1; 2395 2396 /* FIXME: All complex and vector types are also returned by reference. */ 2397 return is_struct_like (type) && !is_power_of_two (length); 2398} 2399 2400/* Return non-zero if TYPE should be passed in a float register 2401 if possible. */ 2402static int 2403s390_function_arg_float (struct type *type) 2404{ 2405 unsigned length = TYPE_LENGTH (type); 2406 if (length > 8) 2407 return 0; 2408 2409 return is_float_like (type); 2410} 2411 2412/* Return non-zero if TYPE should be passed in an integer register 2413 (or a pair of integer registers) if possible. */ 2414static int 2415s390_function_arg_integer (struct type *type) 2416{ 2417 unsigned length = TYPE_LENGTH (type); 2418 if (length > 8) 2419 return 0; 2420 2421 return is_integer_like (type) 2422 || is_pointer_like (type) 2423 || (is_struct_like (type) && is_power_of_two (length)); 2424} 2425 2426/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full 2427 word as required for the ABI. */ 2428static LONGEST 2429extend_simple_arg (struct value *arg) 2430{ 2431 struct type *type = VALUE_TYPE (arg); 2432 2433 /* Even structs get passed in the least significant bits of the 2434 register / memory word. It's not really right to extract them as 2435 an integer, but it does take care of the extension. */ 2436 if (TYPE_UNSIGNED (type)) 2437 return extract_unsigned_integer (VALUE_CONTENTS (arg), 2438 TYPE_LENGTH (type)); 2439 else 2440 return extract_signed_integer (VALUE_CONTENTS (arg), 2441 TYPE_LENGTH (type)); 2442} 2443 2444 2445/* Return the alignment required by TYPE. */ 2446static int 2447alignment_of (struct type *type) 2448{ 2449 int alignment; 2450 2451 if (is_integer_like (type) 2452 || is_pointer_like (type) 2453 || TYPE_CODE (type) == TYPE_CODE_FLT) 2454 alignment = TYPE_LENGTH (type); 2455 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT 2456 || TYPE_CODE (type) == TYPE_CODE_UNION) 2457 { 2458 int i; 2459 2460 alignment = 1; 2461 for (i = 0; i < TYPE_NFIELDS (type); i++) 2462 { 2463 int field_alignment = alignment_of (TYPE_FIELD_TYPE (type, i)); 2464 2465 if (field_alignment > alignment) 2466 alignment = field_alignment; 2467 } 2468 } 2469 else 2470 alignment = 1; 2471 2472 /* Check that everything we ever return is a power of two. Lots of 2473 code doesn't want to deal with aligning things to arbitrary 2474 boundaries. */ 2475 gdb_assert ((alignment & (alignment - 1)) == 0); 2476 2477 return alignment; 2478} 2479 2480 2481/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in 2482 place to be passed to a function, as specified by the "GNU/Linux 2483 for S/390 ELF Application Binary Interface Supplement". 2484 2485 SP is the current stack pointer. We must put arguments, links, 2486 padding, etc. whereever they belong, and return the new stack 2487 pointer value. 2488 2489 If STRUCT_RETURN is non-zero, then the function we're calling is 2490 going to return a structure by value; STRUCT_ADDR is the address of 2491 a block we've allocated for it on the stack. 2492 2493 Our caller has taken care of any type promotions needed to satisfy 2494 prototypes or the old K&R argument-passing rules. */ 2495static CORE_ADDR 2496s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 2497 struct regcache *regcache, CORE_ADDR bp_addr, 2498 int nargs, struct value **args, CORE_ADDR sp, 2499 int struct_return, CORE_ADDR struct_addr) 2500{ 2501 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 2502 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 2503 ULONGEST orig_sp; 2504 int i; 2505 2506 /* If the i'th argument is passed as a reference to a copy, then 2507 copy_addr[i] is the address of the copy we made. */ 2508 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR)); 2509 2510 /* Build the reference-to-copy area. */ 2511 for (i = 0; i < nargs; i++) 2512 { 2513 struct value *arg = args[i]; 2514 struct type *type = VALUE_TYPE (arg); 2515 unsigned length = TYPE_LENGTH (type); 2516 2517 if (s390_function_arg_pass_by_reference (type)) 2518 { 2519 sp -= length; 2520 sp = align_down (sp, alignment_of (type)); 2521 write_memory (sp, VALUE_CONTENTS (arg), length); 2522 copy_addr[i] = sp; 2523 } 2524 } 2525 2526 /* Reserve space for the parameter area. As a conservative 2527 simplification, we assume that everything will be passed on the 2528 stack. Since every argument larger than 8 bytes will be 2529 passed by reference, we use this simple upper bound. */ 2530 sp -= nargs * 8; 2531 2532 /* After all that, make sure it's still aligned on an eight-byte 2533 boundary. */ 2534 sp = align_down (sp, 8); 2535 2536 /* Finally, place the actual parameters, working from SP towards 2537 higher addresses. The code above is supposed to reserve enough 2538 space for this. */ 2539 { 2540 int fr = 0; 2541 int gr = 2; 2542 CORE_ADDR starg = sp; 2543 2544 /* A struct is returned using general register 2. */ 2545 if (struct_return) 2546 { 2547 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, 2548 struct_addr); 2549 gr++; 2550 } 2551 2552 for (i = 0; i < nargs; i++) 2553 { 2554 struct value *arg = args[i]; 2555 struct type *type = VALUE_TYPE (arg); 2556 unsigned length = TYPE_LENGTH (type); 2557 2558 if (s390_function_arg_pass_by_reference (type)) 2559 { 2560 if (gr <= 6) 2561 { 2562 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, 2563 copy_addr[i]); 2564 gr++; 2565 } 2566 else 2567 { 2568 write_memory_unsigned_integer (starg, word_size, copy_addr[i]); 2569 starg += word_size; 2570 } 2571 } 2572 else if (s390_function_arg_float (type)) 2573 { 2574 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments, 2575 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */ 2576 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6)) 2577 { 2578 /* When we store a single-precision value in an FP register, 2579 it occupies the leftmost bits. */ 2580 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr, 2581 0, length, VALUE_CONTENTS (arg)); 2582 fr += 2; 2583 } 2584 else 2585 { 2586 /* When we store a single-precision value in a stack slot, 2587 it occupies the rightmost bits. */ 2588 starg = align_up (starg + length, word_size); 2589 write_memory (starg - length, VALUE_CONTENTS (arg), length); 2590 } 2591 } 2592 else if (s390_function_arg_integer (type) && length <= word_size) 2593 { 2594 if (gr <= 6) 2595 { 2596 /* Integer arguments are always extended to word size. */ 2597 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr, 2598 extend_simple_arg (arg)); 2599 gr++; 2600 } 2601 else 2602 { 2603 /* Integer arguments are always extended to word size. */ 2604 write_memory_signed_integer (starg, word_size, 2605 extend_simple_arg (arg)); 2606 starg += word_size; 2607 } 2608 } 2609 else if (s390_function_arg_integer (type) && length == 2*word_size) 2610 { 2611 if (gr <= 5) 2612 { 2613 regcache_cooked_write (regcache, S390_R0_REGNUM + gr, 2614 VALUE_CONTENTS (arg)); 2615 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1, 2616 VALUE_CONTENTS (arg) + word_size); 2617 gr += 2; 2618 } 2619 else 2620 { 2621 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG 2622 in it, then don't go back and use it again later. */ 2623 gr = 7; 2624 2625 write_memory (starg, VALUE_CONTENTS (arg), length); 2626 starg += length; 2627 } 2628 } 2629 else 2630 internal_error (__FILE__, __LINE__, "unknown argument type"); 2631 } 2632 } 2633 2634 /* Allocate the standard frame areas: the register save area, the 2635 word reserved for the compiler (which seems kind of meaningless), 2636 and the back chain pointer. */ 2637 sp -= 16*word_size + 32; 2638 2639 /* Store return address. */ 2640 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr); 2641 2642 /* Store updated stack pointer. */ 2643 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp); 2644 2645 /* We need to return the 'stack part' of the frame ID, 2646 which is actually the top of the register save area. */ 2647 return sp + 16*word_size + 32; 2648} 2649 2650/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that 2651 dummy frame. The frame ID's base needs to match the TOS value 2652 returned by push_dummy_call, and the PC match the dummy frame's 2653 breakpoint. */ 2654static struct frame_id 2655s390_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) 2656{ 2657 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 2658 CORE_ADDR sp = s390_unwind_sp (gdbarch, next_frame); 2659 2660 return frame_id_build (sp + 16*word_size + 32, 2661 frame_pc_unwind (next_frame)); 2662} 2663 2664static CORE_ADDR 2665s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) 2666{ 2667 /* Both the 32- and 64-bit ABI's say that the stack pointer should 2668 always be aligned on an eight-byte boundary. */ 2669 return (addr & -8); 2670} 2671 2672 2673/* Function return value access. */ 2674 2675static enum return_value_convention 2676s390_return_value_convention (struct gdbarch *gdbarch, struct type *type) 2677{ 2678 int length = TYPE_LENGTH (type); 2679 if (length > 8) 2680 return RETURN_VALUE_STRUCT_CONVENTION; 2681 2682 switch (TYPE_CODE (type)) 2683 { 2684 case TYPE_CODE_STRUCT: 2685 case TYPE_CODE_UNION: 2686 case TYPE_CODE_ARRAY: 2687 return RETURN_VALUE_STRUCT_CONVENTION; 2688 2689 default: 2690 return RETURN_VALUE_REGISTER_CONVENTION; 2691 } 2692} 2693 2694static enum return_value_convention 2695s390_return_value (struct gdbarch *gdbarch, struct type *type, 2696 struct regcache *regcache, void *out, const void *in) 2697{ 2698 int word_size = gdbarch_ptr_bit (gdbarch) / 8; 2699 int length = TYPE_LENGTH (type); 2700 enum return_value_convention rvc = 2701 s390_return_value_convention (gdbarch, type); 2702 if (in) 2703 { 2704 switch (rvc) 2705 { 2706 case RETURN_VALUE_REGISTER_CONVENTION: 2707 if (TYPE_CODE (type) == TYPE_CODE_FLT) 2708 { 2709 /* When we store a single-precision value in an FP register, 2710 it occupies the leftmost bits. */ 2711 regcache_cooked_write_part (regcache, S390_F0_REGNUM, 2712 0, length, in); 2713 } 2714 else if (length <= word_size) 2715 { 2716 /* Integer arguments are always extended to word size. */ 2717 if (TYPE_UNSIGNED (type)) 2718 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, 2719 extract_unsigned_integer (in, length)); 2720 else 2721 regcache_cooked_write_signed (regcache, S390_R2_REGNUM, 2722 extract_signed_integer (in, length)); 2723 } 2724 else if (length == 2*word_size) 2725 { 2726 regcache_cooked_write (regcache, S390_R2_REGNUM, in); 2727 regcache_cooked_write (regcache, S390_R3_REGNUM, 2728 (const char *)in + word_size); 2729 } 2730 else 2731 internal_error (__FILE__, __LINE__, "invalid return type"); 2732 break; 2733 2734 case RETURN_VALUE_STRUCT_CONVENTION: 2735 error ("Cannot set function return value."); 2736 break; 2737 } 2738 } 2739 else if (out) 2740 { 2741 switch (rvc) 2742 { 2743 case RETURN_VALUE_REGISTER_CONVENTION: 2744 if (TYPE_CODE (type) == TYPE_CODE_FLT) 2745 { 2746 /* When we store a single-precision value in an FP register, 2747 it occupies the leftmost bits. */ 2748 regcache_cooked_read_part (regcache, S390_F0_REGNUM, 2749 0, length, out); 2750 } 2751 else if (length <= word_size) 2752 { 2753 /* Integer arguments occupy the rightmost bits. */ 2754 regcache_cooked_read_part (regcache, S390_R2_REGNUM, 2755 word_size - length, length, out); 2756 } 2757 else if (length == 2*word_size) 2758 { 2759 regcache_cooked_read (regcache, S390_R2_REGNUM, out); 2760 regcache_cooked_read (regcache, S390_R3_REGNUM, 2761 (char *)out + word_size); 2762 } 2763 else 2764 internal_error (__FILE__, __LINE__, "invalid return type"); 2765 break; 2766 2767 case RETURN_VALUE_STRUCT_CONVENTION: 2768 error ("Function return value unknown."); 2769 break; 2770 } 2771 } 2772 2773 return rvc; 2774} 2775 2776 2777/* Breakpoints. */ 2778 2779static const unsigned char * 2780s390_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) 2781{ 2782 static unsigned char breakpoint[] = { 0x0, 0x1 }; 2783 2784 *lenptr = sizeof (breakpoint); 2785 return breakpoint; 2786} 2787 2788 2789/* Address handling. */ 2790 2791static CORE_ADDR 2792s390_addr_bits_remove (CORE_ADDR addr) 2793{ 2794 return addr & 0x7fffffff; 2795} 2796 2797static int 2798s390_address_class_type_flags (int byte_size, int dwarf2_addr_class) 2799{ 2800 if (byte_size == 4) 2801 return TYPE_FLAG_ADDRESS_CLASS_1; 2802 else 2803 return 0; 2804} 2805 2806static const char * 2807s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags) 2808{ 2809 if (type_flags & TYPE_FLAG_ADDRESS_CLASS_1) 2810 return "mode32"; 2811 else 2812 return NULL; 2813} 2814 2815static int 2816s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, const char *name, 2817 int *type_flags_ptr) 2818{ 2819 if (strcmp (name, "mode32") == 0) 2820 { 2821 *type_flags_ptr = TYPE_FLAG_ADDRESS_CLASS_1; 2822 return 1; 2823 } 2824 else 2825 return 0; 2826} 2827 2828 2829/* Link map offsets. */ 2830 2831static struct link_map_offsets * 2832s390_svr4_fetch_link_map_offsets (void) 2833{ 2834 static struct link_map_offsets lmo; 2835 static struct link_map_offsets *lmp = NULL; 2836 2837 if (lmp == NULL) 2838 { 2839 lmp = &lmo; 2840 2841 lmo.r_debug_size = 8; 2842 2843 lmo.r_map_offset = 4; 2844 lmo.r_map_size = 4; 2845 2846 lmo.link_map_size = 20; 2847 2848 lmo.l_addr_offset = 0; 2849 lmo.l_addr_size = 4; 2850 2851 lmo.l_name_offset = 4; 2852 lmo.l_name_size = 4; 2853 2854 lmo.l_next_offset = 12; 2855 lmo.l_next_size = 4; 2856 2857 lmo.l_prev_offset = 16; 2858 lmo.l_prev_size = 4; 2859 } 2860 2861 return lmp; 2862} 2863 2864static struct link_map_offsets * 2865s390x_svr4_fetch_link_map_offsets (void) 2866{ 2867 static struct link_map_offsets lmo; 2868 static struct link_map_offsets *lmp = NULL; 2869 2870 if (lmp == NULL) 2871 { 2872 lmp = &lmo; 2873 2874 lmo.r_debug_size = 16; /* All we need. */ 2875 2876 lmo.r_map_offset = 8; 2877 lmo.r_map_size = 8; 2878 2879 lmo.link_map_size = 40; /* All we need. */ 2880 2881 lmo.l_addr_offset = 0; 2882 lmo.l_addr_size = 8; 2883 2884 lmo.l_name_offset = 8; 2885 lmo.l_name_size = 8; 2886 2887 lmo.l_next_offset = 24; 2888 lmo.l_next_size = 8; 2889 2890 lmo.l_prev_offset = 32; 2891 lmo.l_prev_size = 8; 2892 } 2893 2894 return lmp; 2895} 2896 2897 2898/* Set up gdbarch struct. */ 2899 2900static struct gdbarch * 2901s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 2902{ 2903 struct gdbarch *gdbarch; 2904 struct gdbarch_tdep *tdep; 2905 2906 /* First see if there is already a gdbarch that can satisfy the request. */ 2907 arches = gdbarch_list_lookup_by_info (arches, &info); 2908 if (arches != NULL) 2909 return arches->gdbarch; 2910 2911 /* None found: is the request for a s390 architecture? */ 2912 if (info.bfd_arch_info->arch != bfd_arch_s390) 2913 return NULL; /* No; then it's not for us. */ 2914 2915 /* Yes: create a new gdbarch for the specified machine type. */ 2916 tdep = XCALLOC (1, struct gdbarch_tdep); 2917 gdbarch = gdbarch_alloc (&info, tdep); 2918 2919 set_gdbarch_believe_pcc_promotion (gdbarch, 0); 2920 set_gdbarch_char_signed (gdbarch, 0); 2921 2922 /* Amount PC must be decremented by after a breakpoint. This is 2923 often the number of bytes returned by BREAKPOINT_FROM_PC but not 2924 always. */ 2925 set_gdbarch_decr_pc_after_break (gdbarch, 2); 2926 /* Stack grows downward. */ 2927 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 2928 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc); 2929 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue); 2930 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p); 2931 2932 set_gdbarch_pc_regnum (gdbarch, S390_PC_REGNUM); 2933 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM); 2934 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM); 2935 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS); 2936 set_gdbarch_num_pseudo_regs (gdbarch, S390_NUM_PSEUDO_REGS); 2937 set_gdbarch_register_name (gdbarch, s390_register_name); 2938 set_gdbarch_register_type (gdbarch, s390_register_type); 2939 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); 2940 set_gdbarch_dwarf_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); 2941 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); 2942 set_gdbarch_convert_register_p (gdbarch, s390_convert_register_p); 2943 set_gdbarch_register_to_value (gdbarch, s390_register_to_value); 2944 set_gdbarch_value_to_register (gdbarch, s390_value_to_register); 2945 set_gdbarch_register_reggroup_p (gdbarch, s390_register_reggroup_p); 2946 set_gdbarch_regset_from_core_section (gdbarch, 2947 s390_regset_from_core_section); 2948 2949 /* Inferior function calls. */ 2950 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call); 2951 set_gdbarch_unwind_dummy_id (gdbarch, s390_unwind_dummy_id); 2952 set_gdbarch_frame_align (gdbarch, s390_frame_align); 2953 set_gdbarch_return_value (gdbarch, s390_return_value); 2954 2955 /* Frame handling. */ 2956 set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section); 2957 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg); 2958 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); 2959 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); 2960 frame_unwind_append_sniffer (gdbarch, s390_stub_frame_sniffer); 2961 frame_unwind_append_sniffer (gdbarch, s390_sigtramp_frame_sniffer); 2962 frame_unwind_append_sniffer (gdbarch, s390_frame_sniffer); 2963 frame_base_set_default (gdbarch, &s390_frame_base); 2964 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc); 2965 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp); 2966 2967 switch (info.bfd_arch_info->mach) 2968 { 2969 case bfd_mach_s390_31: 2970 tdep->abi = ABI_LINUX_S390; 2971 2972 tdep->gregset = &s390_gregset; 2973 tdep->sizeof_gregset = s390_sizeof_gregset; 2974 tdep->fpregset = &s390_fpregset; 2975 tdep->sizeof_fpregset = s390_sizeof_fpregset; 2976 2977 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove); 2978 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read); 2979 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write); 2980 set_solib_svr4_fetch_link_map_offsets (gdbarch, 2981 s390_svr4_fetch_link_map_offsets); 2982 2983 break; 2984 case bfd_mach_s390_64: 2985 tdep->abi = ABI_LINUX_ZSERIES; 2986 2987 tdep->gregset = &s390x_gregset; 2988 tdep->sizeof_gregset = s390x_sizeof_gregset; 2989 tdep->fpregset = &s390_fpregset; 2990 tdep->sizeof_fpregset = s390_sizeof_fpregset; 2991 2992 set_gdbarch_long_bit (gdbarch, 64); 2993 set_gdbarch_long_long_bit (gdbarch, 64); 2994 set_gdbarch_ptr_bit (gdbarch, 64); 2995 set_gdbarch_pseudo_register_read (gdbarch, s390x_pseudo_register_read); 2996 set_gdbarch_pseudo_register_write (gdbarch, s390x_pseudo_register_write); 2997 set_solib_svr4_fetch_link_map_offsets (gdbarch, 2998 s390x_svr4_fetch_link_map_offsets); 2999 set_gdbarch_address_class_type_flags (gdbarch, 3000 s390_address_class_type_flags); 3001 set_gdbarch_address_class_type_flags_to_name (gdbarch, 3002 s390_address_class_type_flags_to_name); 3003 set_gdbarch_address_class_name_to_type_flags (gdbarch, 3004 s390_address_class_name_to_type_flags); 3005 break; 3006 } 3007 3008 set_gdbarch_print_insn (gdbarch, print_insn_s390); 3009 3010 return gdbarch; 3011} 3012 3013 3014 3015extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */ 3016 3017void 3018_initialize_s390_tdep (void) 3019{ 3020 3021 /* Hook us into the gdbarch mechanism. */ 3022 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init); 3023} 3024