1//===-- X86AsmPrinter.cpp - Convert X86 LLVM code to AT&T assembly --------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains a printer that converts from our internal representation
10// of machine-dependent LLVM code to X86 machine code.
11//
12//===----------------------------------------------------------------------===//
13
14#include "X86AsmPrinter.h"
15#include "MCTargetDesc/X86ATTInstPrinter.h"
16#include "MCTargetDesc/X86BaseInfo.h"
17#include "MCTargetDesc/X86TargetStreamer.h"
18#include "TargetInfo/X86TargetInfo.h"
19#include "X86InstrInfo.h"
20#include "X86MachineFunctionInfo.h"
21#include "X86Subtarget.h"
22#include "llvm/BinaryFormat/COFF.h"
23#include "llvm/BinaryFormat/ELF.h"
24#include "llvm/CodeGen/MachineConstantPool.h"
25#include "llvm/CodeGen/MachineModuleInfoImpls.h"
26#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
27#include "llvm/IR/DerivedTypes.h"
28#include "llvm/IR/InlineAsm.h"
29#include "llvm/IR/Mangler.h"
30#include "llvm/IR/Module.h"
31#include "llvm/IR/Type.h"
32#include "llvm/MC/MCAsmInfo.h"
33#include "llvm/MC/MCCodeEmitter.h"
34#include "llvm/MC/MCContext.h"
35#include "llvm/MC/MCExpr.h"
36#include "llvm/MC/MCInstBuilder.h"
37#include "llvm/MC/MCSectionCOFF.h"
38#include "llvm/MC/MCSectionELF.h"
39#include "llvm/MC/MCSectionMachO.h"
40#include "llvm/MC/MCStreamer.h"
41#include "llvm/MC/MCSymbol.h"
42#include "llvm/MC/TargetRegistry.h"
43#include "llvm/Support/Debug.h"
44#include "llvm/Support/ErrorHandling.h"
45#include "llvm/Support/MachineValueType.h"
46#include "llvm/Target/TargetMachine.h"
47
48using namespace llvm;
49
50X86AsmPrinter::X86AsmPrinter(TargetMachine &TM,
51                             std::unique_ptr<MCStreamer> Streamer)
52    : AsmPrinter(TM, std::move(Streamer)), FM(*this) {}
53
54//===----------------------------------------------------------------------===//
55// Primitive Helper Functions.
56//===----------------------------------------------------------------------===//
57
58/// runOnMachineFunction - Emit the function body.
59///
60bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
61  Subtarget = &MF.getSubtarget<X86Subtarget>();
62
63  SMShadowTracker.startFunction(MF);
64  CodeEmitter.reset(TM.getTarget().createMCCodeEmitter(
65      *Subtarget->getInstrInfo(), MF.getContext()));
66
67  EmitFPOData =
68      Subtarget->isTargetWin32() && MF.getMMI().getModule()->getCodeViewFlag();
69
70  IndCSPrefix =
71      MF.getMMI().getModule()->getModuleFlag("indirect_branch_cs_prefix");
72
73  SetupMachineFunction(MF);
74
75  if (Subtarget->isTargetCOFF()) {
76    bool Local = MF.getFunction().hasLocalLinkage();
77    OutStreamer->beginCOFFSymbolDef(CurrentFnSym);
78    OutStreamer->emitCOFFSymbolStorageClass(
79        Local ? COFF::IMAGE_SYM_CLASS_STATIC : COFF::IMAGE_SYM_CLASS_EXTERNAL);
80    OutStreamer->emitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_FUNCTION
81                                    << COFF::SCT_COMPLEX_TYPE_SHIFT);
82    OutStreamer->endCOFFSymbolDef();
83  }
84
85  // Emit the rest of the function body.
86  emitFunctionBody();
87
88  // Emit the XRay table for this function.
89  emitXRayTable();
90
91  EmitFPOData = false;
92
93  IndCSPrefix = false;
94
95  // We didn't modify anything.
96  return false;
97}
98
99void X86AsmPrinter::emitFunctionBodyStart() {
100  if (EmitFPOData) {
101    auto *XTS =
102        static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
103    XTS->emitFPOProc(
104        CurrentFnSym,
105        MF->getInfo<X86MachineFunctionInfo>()->getArgumentStackSize());
106  }
107}
108
109void X86AsmPrinter::emitFunctionBodyEnd() {
110  if (EmitFPOData) {
111    auto *XTS =
112        static_cast<X86TargetStreamer *>(OutStreamer->getTargetStreamer());
113    XTS->emitFPOEndProc();
114  }
115}
116
117uint32_t X86AsmPrinter::MaskKCFIType(uint32_t Value) {
118  // If the type hash matches an invalid pattern, mask the value.
119  const uint32_t InvalidValues[] = {
120      0xFA1E0FF3, /* ENDBR64 */
121      0xFB1E0FF3, /* ENDBR32 */
122  };
123  for (uint32_t N : InvalidValues) {
124    // LowerKCFI_CHECK emits -Value for indirect call checks, so we must also
125    // mask that. Note that -(Value + 1) == ~Value.
126    if (N == Value || -N == Value)
127      return Value + 1;
128  }
129  return Value;
130}
131
132void X86AsmPrinter::EmitKCFITypePadding(const MachineFunction &MF,
133                                        bool HasType) {
134  // Keep the function entry aligned, taking patchable-function-prefix into
135  // account if set.
136  int64_t PrefixBytes = 0;
137  (void)MF.getFunction()
138      .getFnAttribute("patchable-function-prefix")
139      .getValueAsString()
140      .getAsInteger(10, PrefixBytes);
141
142  // Also take the type identifier into account if we're emitting
143  // one. Otherwise, just pad with nops. The X86::MOV32ri instruction emitted
144  // in X86AsmPrinter::emitKCFITypeId is 5 bytes long.
145  if (HasType)
146    PrefixBytes += 5;
147
148  emitNops(offsetToAlignment(PrefixBytes, MF.getAlignment()));
149}
150
151/// emitKCFITypeId - Emit the KCFI type information in architecture specific
152/// format.
153void X86AsmPrinter::emitKCFITypeId(const MachineFunction &MF) {
154  const Function &F = MF.getFunction();
155  if (!F.getParent()->getModuleFlag("kcfi"))
156    return;
157
158  ConstantInt *Type = nullptr;
159  if (const MDNode *MD = F.getMetadata(LLVMContext::MD_kcfi_type))
160    Type = mdconst::extract<ConstantInt>(MD->getOperand(0));
161
162  // If we don't have a type to emit, just emit padding if needed to maintain
163  // the same alignment for all functions.
164  if (!Type) {
165    EmitKCFITypePadding(MF, /*HasType=*/false);
166    return;
167  }
168
169  // Emit a function symbol for the type data to avoid unreachable instruction
170  // warnings from binary validation tools, and use the same linkage as the
171  // parent function. Note that using local linkage would result in duplicate
172  // symbols for weak parent functions.
173  MCSymbol *FnSym = OutContext.getOrCreateSymbol("__cfi_" + MF.getName());
174  emitLinkage(&MF.getFunction(), FnSym);
175  if (MAI->hasDotTypeDotSizeDirective())
176    OutStreamer->emitSymbolAttribute(FnSym, MCSA_ELF_TypeFunction);
177  OutStreamer->emitLabel(FnSym);
178
179  // Embed the type hash in the X86::MOV32ri instruction to avoid special
180  // casing object file parsers.
181  EmitKCFITypePadding(MF);
182  EmitAndCountInstruction(MCInstBuilder(X86::MOV32ri)
183                              .addReg(X86::EAX)
184                              .addImm(MaskKCFIType(Type->getZExtValue())));
185
186  if (MAI->hasDotTypeDotSizeDirective()) {
187    MCSymbol *EndSym = OutContext.createTempSymbol("cfi_func_end");
188    OutStreamer->emitLabel(EndSym);
189
190    const MCExpr *SizeExp = MCBinaryExpr::createSub(
191        MCSymbolRefExpr::create(EndSym, OutContext),
192        MCSymbolRefExpr::create(FnSym, OutContext), OutContext);
193    OutStreamer->emitELFSize(FnSym, SizeExp);
194  }
195}
196
197/// PrintSymbolOperand - Print a raw symbol reference operand.  This handles
198/// jump tables, constant pools, global address and external symbols, all of
199/// which print to a label with various suffixes for relocation types etc.
200void X86AsmPrinter::PrintSymbolOperand(const MachineOperand &MO,
201                                       raw_ostream &O) {
202  switch (MO.getType()) {
203  default: llvm_unreachable("unknown symbol type!");
204  case MachineOperand::MO_ConstantPoolIndex:
205    GetCPISymbol(MO.getIndex())->print(O, MAI);
206    printOffset(MO.getOffset(), O);
207    break;
208  case MachineOperand::MO_GlobalAddress: {
209    const GlobalValue *GV = MO.getGlobal();
210
211    MCSymbol *GVSym;
212    if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
213        MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE)
214      GVSym = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
215    else
216      GVSym = getSymbolPreferLocal(*GV);
217
218    // Handle dllimport linkage.
219    if (MO.getTargetFlags() == X86II::MO_DLLIMPORT)
220      GVSym = OutContext.getOrCreateSymbol(Twine("__imp_") + GVSym->getName());
221    else if (MO.getTargetFlags() == X86II::MO_COFFSTUB)
222      GVSym =
223          OutContext.getOrCreateSymbol(Twine(".refptr.") + GVSym->getName());
224
225    if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
226        MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) {
227      MCSymbol *Sym = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
228      MachineModuleInfoImpl::StubValueTy &StubSym =
229          MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(Sym);
230      if (!StubSym.getPointer())
231        StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV),
232                                                     !GV->hasInternalLinkage());
233    }
234
235    // If the name begins with a dollar-sign, enclose it in parens.  We do this
236    // to avoid having it look like an integer immediate to the assembler.
237    if (GVSym->getName()[0] != '$')
238      GVSym->print(O, MAI);
239    else {
240      O << '(';
241      GVSym->print(O, MAI);
242      O << ')';
243    }
244    printOffset(MO.getOffset(), O);
245    break;
246  }
247  }
248
249  switch (MO.getTargetFlags()) {
250  default:
251    llvm_unreachable("Unknown target flag on GV operand");
252  case X86II::MO_NO_FLAG:    // No flag.
253    break;
254  case X86II::MO_DARWIN_NONLAZY:
255  case X86II::MO_DLLIMPORT:
256  case X86II::MO_COFFSTUB:
257    // These affect the name of the symbol, not any suffix.
258    break;
259  case X86II::MO_GOT_ABSOLUTE_ADDRESS:
260    O << " + [.-";
261    MF->getPICBaseSymbol()->print(O, MAI);
262    O << ']';
263    break;
264  case X86II::MO_PIC_BASE_OFFSET:
265  case X86II::MO_DARWIN_NONLAZY_PIC_BASE:
266    O << '-';
267    MF->getPICBaseSymbol()->print(O, MAI);
268    break;
269  case X86II::MO_TLSGD:     O << "@TLSGD";     break;
270  case X86II::MO_TLSLD:     O << "@TLSLD";     break;
271  case X86II::MO_TLSLDM:    O << "@TLSLDM";    break;
272  case X86II::MO_GOTTPOFF:  O << "@GOTTPOFF";  break;
273  case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break;
274  case X86II::MO_TPOFF:     O << "@TPOFF";     break;
275  case X86II::MO_DTPOFF:    O << "@DTPOFF";    break;
276  case X86II::MO_NTPOFF:    O << "@NTPOFF";    break;
277  case X86II::MO_GOTNTPOFF: O << "@GOTNTPOFF"; break;
278  case X86II::MO_GOTPCREL:  O << "@GOTPCREL";  break;
279  case X86II::MO_GOTPCREL_NORELAX: O << "@GOTPCREL_NORELAX"; break;
280  case X86II::MO_GOT:       O << "@GOT";       break;
281  case X86II::MO_GOTOFF:    O << "@GOTOFF";    break;
282  case X86II::MO_PLT:       O << "@PLT";       break;
283  case X86II::MO_TLVP:      O << "@TLVP";      break;
284  case X86II::MO_TLVP_PIC_BASE:
285    O << "@TLVP" << '-';
286    MF->getPICBaseSymbol()->print(O, MAI);
287    break;
288  case X86II::MO_SECREL:    O << "@SECREL32";  break;
289  }
290}
291
292void X86AsmPrinter::PrintOperand(const MachineInstr *MI, unsigned OpNo,
293                                 raw_ostream &O) {
294  const MachineOperand &MO = MI->getOperand(OpNo);
295  const bool IsATT = MI->getInlineAsmDialect() == InlineAsm::AD_ATT;
296  switch (MO.getType()) {
297  default: llvm_unreachable("unknown operand type!");
298  case MachineOperand::MO_Register: {
299    if (IsATT)
300      O << '%';
301    O << X86ATTInstPrinter::getRegisterName(MO.getReg());
302    return;
303  }
304
305  case MachineOperand::MO_Immediate:
306    if (IsATT)
307      O << '$';
308    O << MO.getImm();
309    return;
310
311  case MachineOperand::MO_ConstantPoolIndex:
312  case MachineOperand::MO_GlobalAddress: {
313    switch (MI->getInlineAsmDialect()) {
314    case InlineAsm::AD_ATT:
315      O << '$';
316      break;
317    case InlineAsm::AD_Intel:
318      O << "offset ";
319      break;
320    }
321    PrintSymbolOperand(MO, O);
322    break;
323  }
324  case MachineOperand::MO_BlockAddress: {
325    MCSymbol *Sym = GetBlockAddressSymbol(MO.getBlockAddress());
326    Sym->print(O, MAI);
327    break;
328  }
329  }
330}
331
332/// PrintModifiedOperand - Print subregisters based on supplied modifier,
333/// deferring to PrintOperand() if no modifier was supplied or if operand is not
334/// a register.
335void X86AsmPrinter::PrintModifiedOperand(const MachineInstr *MI, unsigned OpNo,
336                                         raw_ostream &O, const char *Modifier) {
337  const MachineOperand &MO = MI->getOperand(OpNo);
338  if (!Modifier || !MO.isReg())
339    return PrintOperand(MI, OpNo, O);
340  if (MI->getInlineAsmDialect() == InlineAsm::AD_ATT)
341    O << '%';
342  Register Reg = MO.getReg();
343  if (strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
344    unsigned Size = (strcmp(Modifier+6,"64") == 0) ? 64 :
345        (strcmp(Modifier+6,"32") == 0) ? 32 :
346        (strcmp(Modifier+6,"16") == 0) ? 16 : 8;
347    Reg = getX86SubSuperRegister(Reg, Size);
348  }
349  O << X86ATTInstPrinter::getRegisterName(Reg);
350}
351
352/// PrintPCRelImm - This is used to print an immediate value that ends up
353/// being encoded as a pc-relative value.  These print slightly differently, for
354/// example, a $ is not emitted.
355void X86AsmPrinter::PrintPCRelImm(const MachineInstr *MI, unsigned OpNo,
356                                  raw_ostream &O) {
357  const MachineOperand &MO = MI->getOperand(OpNo);
358  switch (MO.getType()) {
359  default: llvm_unreachable("Unknown pcrel immediate operand");
360  case MachineOperand::MO_Register:
361    // pc-relativeness was handled when computing the value in the reg.
362    PrintOperand(MI, OpNo, O);
363    return;
364  case MachineOperand::MO_Immediate:
365    O << MO.getImm();
366    return;
367  case MachineOperand::MO_GlobalAddress:
368    PrintSymbolOperand(MO, O);
369    return;
370  }
371}
372
373void X86AsmPrinter::PrintLeaMemReference(const MachineInstr *MI, unsigned OpNo,
374                                         raw_ostream &O, const char *Modifier) {
375  const MachineOperand &BaseReg = MI->getOperand(OpNo + X86::AddrBaseReg);
376  const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg);
377  const MachineOperand &DispSpec = MI->getOperand(OpNo + X86::AddrDisp);
378
379  // If we really don't want to print out (rip), don't.
380  bool HasBaseReg = BaseReg.getReg() != 0;
381  if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") &&
382      BaseReg.getReg() == X86::RIP)
383    HasBaseReg = false;
384
385  // HasParenPart - True if we will print out the () part of the mem ref.
386  bool HasParenPart = IndexReg.getReg() || HasBaseReg;
387
388  switch (DispSpec.getType()) {
389  default:
390    llvm_unreachable("unknown operand type!");
391  case MachineOperand::MO_Immediate: {
392    int DispVal = DispSpec.getImm();
393    if (DispVal || !HasParenPart)
394      O << DispVal;
395    break;
396  }
397  case MachineOperand::MO_GlobalAddress:
398  case MachineOperand::MO_ConstantPoolIndex:
399    PrintSymbolOperand(DispSpec, O);
400    break;
401  }
402
403  if (Modifier && strcmp(Modifier, "H") == 0)
404    O << "+8";
405
406  if (HasParenPart) {
407    assert(IndexReg.getReg() != X86::ESP &&
408           "X86 doesn't allow scaling by ESP");
409
410    O << '(';
411    if (HasBaseReg)
412      PrintModifiedOperand(MI, OpNo + X86::AddrBaseReg, O, Modifier);
413
414    if (IndexReg.getReg()) {
415      O << ',';
416      PrintModifiedOperand(MI, OpNo + X86::AddrIndexReg, O, Modifier);
417      unsigned ScaleVal = MI->getOperand(OpNo + X86::AddrScaleAmt).getImm();
418      if (ScaleVal != 1)
419        O << ',' << ScaleVal;
420    }
421    O << ')';
422  }
423}
424
425static bool isSimpleReturn(const MachineInstr &MI) {
426  // We exclude all tail calls here which set both isReturn and isCall.
427  return MI.getDesc().isReturn() && !MI.getDesc().isCall();
428}
429
430static bool isIndirectBranchOrTailCall(const MachineInstr &MI) {
431  unsigned Opc = MI.getOpcode();
432  return MI.getDesc().isIndirectBranch() /*Make below code in a good shape*/ ||
433         Opc == X86::TAILJMPr || Opc == X86::TAILJMPm ||
434         Opc == X86::TAILJMPr64 || Opc == X86::TAILJMPm64 ||
435         Opc == X86::TCRETURNri || Opc == X86::TCRETURNmi ||
436         Opc == X86::TCRETURNri64 || Opc == X86::TCRETURNmi64 ||
437         Opc == X86::TAILJMPr64_REX || Opc == X86::TAILJMPm64_REX;
438}
439
440void X86AsmPrinter::emitBasicBlockEnd(const MachineBasicBlock &MBB) {
441  if (Subtarget->hardenSlsRet() || Subtarget->hardenSlsIJmp()) {
442    auto I = MBB.getLastNonDebugInstr();
443    if (I != MBB.end()) {
444      if ((Subtarget->hardenSlsRet() && isSimpleReturn(*I)) ||
445          (Subtarget->hardenSlsIJmp() && isIndirectBranchOrTailCall(*I))) {
446        MCInst TmpInst;
447        TmpInst.setOpcode(X86::INT3);
448        EmitToStreamer(*OutStreamer, TmpInst);
449      }
450    }
451  }
452  AsmPrinter::emitBasicBlockEnd(MBB);
453  SMShadowTracker.emitShadowPadding(*OutStreamer, getSubtargetInfo());
454}
455
456void X86AsmPrinter::PrintMemReference(const MachineInstr *MI, unsigned OpNo,
457                                      raw_ostream &O, const char *Modifier) {
458  assert(isMem(*MI, OpNo) && "Invalid memory reference!");
459  const MachineOperand &Segment = MI->getOperand(OpNo + X86::AddrSegmentReg);
460  if (Segment.getReg()) {
461    PrintModifiedOperand(MI, OpNo + X86::AddrSegmentReg, O, Modifier);
462    O << ':';
463  }
464  PrintLeaMemReference(MI, OpNo, O, Modifier);
465}
466
467
468void X86AsmPrinter::PrintIntelMemReference(const MachineInstr *MI,
469                                           unsigned OpNo, raw_ostream &O,
470                                           const char *Modifier) {
471  const MachineOperand &BaseReg = MI->getOperand(OpNo + X86::AddrBaseReg);
472  unsigned ScaleVal = MI->getOperand(OpNo + X86::AddrScaleAmt).getImm();
473  const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg);
474  const MachineOperand &DispSpec = MI->getOperand(OpNo + X86::AddrDisp);
475  const MachineOperand &SegReg = MI->getOperand(OpNo + X86::AddrSegmentReg);
476
477  // If we really don't want to print out (rip), don't.
478  bool HasBaseReg = BaseReg.getReg() != 0;
479  if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") &&
480      BaseReg.getReg() == X86::RIP)
481    HasBaseReg = false;
482
483  // If we really just want to print out displacement.
484  if (Modifier && (DispSpec.isGlobal() || DispSpec.isSymbol()) &&
485      !strcmp(Modifier, "disp-only")) {
486    HasBaseReg = false;
487  }
488
489  // If this has a segment register, print it.
490  if (SegReg.getReg()) {
491    PrintOperand(MI, OpNo + X86::AddrSegmentReg, O);
492    O << ':';
493  }
494
495  O << '[';
496
497  bool NeedPlus = false;
498  if (HasBaseReg) {
499    PrintOperand(MI, OpNo + X86::AddrBaseReg, O);
500    NeedPlus = true;
501  }
502
503  if (IndexReg.getReg()) {
504    if (NeedPlus) O << " + ";
505    if (ScaleVal != 1)
506      O << ScaleVal << '*';
507    PrintOperand(MI, OpNo + X86::AddrIndexReg, O);
508    NeedPlus = true;
509  }
510
511  if (!DispSpec.isImm()) {
512    if (NeedPlus) O << " + ";
513    PrintOperand(MI, OpNo + X86::AddrDisp, O);
514  } else {
515    int64_t DispVal = DispSpec.getImm();
516    if (DispVal || (!IndexReg.getReg() && !HasBaseReg)) {
517      if (NeedPlus) {
518        if (DispVal > 0)
519          O << " + ";
520        else {
521          O << " - ";
522          DispVal = -DispVal;
523        }
524      }
525      O << DispVal;
526    }
527  }
528  O << ']';
529}
530
531static bool printAsmMRegister(const X86AsmPrinter &P, const MachineOperand &MO,
532                              char Mode, raw_ostream &O) {
533  Register Reg = MO.getReg();
534  bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
535
536  if (!X86::GR8RegClass.contains(Reg) &&
537      !X86::GR16RegClass.contains(Reg) &&
538      !X86::GR32RegClass.contains(Reg) &&
539      !X86::GR64RegClass.contains(Reg))
540    return true;
541
542  switch (Mode) {
543  default: return true;  // Unknown mode.
544  case 'b': // Print QImode register
545    Reg = getX86SubSuperRegister(Reg, 8);
546    break;
547  case 'h': // Print QImode high register
548    Reg = getX86SubSuperRegister(Reg, 8, true);
549    break;
550  case 'w': // Print HImode register
551    Reg = getX86SubSuperRegister(Reg, 16);
552    break;
553  case 'k': // Print SImode register
554    Reg = getX86SubSuperRegister(Reg, 32);
555    break;
556  case 'V':
557    EmitPercent = false;
558    [[fallthrough]];
559  case 'q':
560    // Print 64-bit register names if 64-bit integer registers are available.
561    // Otherwise, print 32-bit register names.
562    Reg = getX86SubSuperRegister(Reg, P.getSubtarget().is64Bit() ? 64 : 32);
563    break;
564  }
565
566  if (EmitPercent)
567    O << '%';
568
569  O << X86ATTInstPrinter::getRegisterName(Reg);
570  return false;
571}
572
573static bool printAsmVRegister(const MachineOperand &MO, char Mode,
574                              raw_ostream &O) {
575  Register Reg = MO.getReg();
576  bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
577
578  unsigned Index;
579  if (X86::VR128XRegClass.contains(Reg))
580    Index = Reg - X86::XMM0;
581  else if (X86::VR256XRegClass.contains(Reg))
582    Index = Reg - X86::YMM0;
583  else if (X86::VR512RegClass.contains(Reg))
584    Index = Reg - X86::ZMM0;
585  else
586    return true;
587
588  switch (Mode) {
589  default: // Unknown mode.
590    return true;
591  case 'x': // Print V4SFmode register
592    Reg = X86::XMM0 + Index;
593    break;
594  case 't': // Print V8SFmode register
595    Reg = X86::YMM0 + Index;
596    break;
597  case 'g': // Print V16SFmode register
598    Reg = X86::ZMM0 + Index;
599    break;
600  }
601
602  if (EmitPercent)
603    O << '%';
604
605  O << X86ATTInstPrinter::getRegisterName(Reg);
606  return false;
607}
608
609/// PrintAsmOperand - Print out an operand for an inline asm expression.
610///
611bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
612                                    const char *ExtraCode, raw_ostream &O) {
613  // Does this asm operand have a single letter operand modifier?
614  if (ExtraCode && ExtraCode[0]) {
615    if (ExtraCode[1] != 0) return true; // Unknown modifier.
616
617    const MachineOperand &MO = MI->getOperand(OpNo);
618
619    switch (ExtraCode[0]) {
620    default:
621      // See if this is a generic print operand
622      return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O);
623    case 'a': // This is an address.  Currently only 'i' and 'r' are expected.
624      switch (MO.getType()) {
625      default:
626        return true;
627      case MachineOperand::MO_Immediate:
628        O << MO.getImm();
629        return false;
630      case MachineOperand::MO_ConstantPoolIndex:
631      case MachineOperand::MO_JumpTableIndex:
632      case MachineOperand::MO_ExternalSymbol:
633        llvm_unreachable("unexpected operand type!");
634      case MachineOperand::MO_GlobalAddress:
635        PrintSymbolOperand(MO, O);
636        if (Subtarget->isPICStyleRIPRel())
637          O << "(%rip)";
638        return false;
639      case MachineOperand::MO_Register:
640        O << '(';
641        PrintOperand(MI, OpNo, O);
642        O << ')';
643        return false;
644      }
645
646    case 'c': // Don't print "$" before a global var name or constant.
647      switch (MO.getType()) {
648      default:
649        PrintOperand(MI, OpNo, O);
650        break;
651      case MachineOperand::MO_Immediate:
652        O << MO.getImm();
653        break;
654      case MachineOperand::MO_ConstantPoolIndex:
655      case MachineOperand::MO_JumpTableIndex:
656      case MachineOperand::MO_ExternalSymbol:
657        llvm_unreachable("unexpected operand type!");
658      case MachineOperand::MO_GlobalAddress:
659        PrintSymbolOperand(MO, O);
660        break;
661      }
662      return false;
663
664    case 'A': // Print '*' before a register (it must be a register)
665      if (MO.isReg()) {
666        O << '*';
667        PrintOperand(MI, OpNo, O);
668        return false;
669      }
670      return true;
671
672    case 'b': // Print QImode register
673    case 'h': // Print QImode high register
674    case 'w': // Print HImode register
675    case 'k': // Print SImode register
676    case 'q': // Print DImode register
677    case 'V': // Print native register without '%'
678      if (MO.isReg())
679        return printAsmMRegister(*this, MO, ExtraCode[0], O);
680      PrintOperand(MI, OpNo, O);
681      return false;
682
683    case 'x': // Print V4SFmode register
684    case 't': // Print V8SFmode register
685    case 'g': // Print V16SFmode register
686      if (MO.isReg())
687        return printAsmVRegister(MO, ExtraCode[0], O);
688      PrintOperand(MI, OpNo, O);
689      return false;
690
691    case 'P': // This is the operand of a call, treat specially.
692      PrintPCRelImm(MI, OpNo, O);
693      return false;
694
695    case 'n': // Negate the immediate or print a '-' before the operand.
696      // Note: this is a temporary solution. It should be handled target
697      // independently as part of the 'MC' work.
698      if (MO.isImm()) {
699        O << -MO.getImm();
700        return false;
701      }
702      O << '-';
703    }
704  }
705
706  PrintOperand(MI, OpNo, O);
707  return false;
708}
709
710bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
711                                          const char *ExtraCode,
712                                          raw_ostream &O) {
713  if (ExtraCode && ExtraCode[0]) {
714    if (ExtraCode[1] != 0) return true; // Unknown modifier.
715
716    switch (ExtraCode[0]) {
717    default: return true;  // Unknown modifier.
718    case 'b': // Print QImode register
719    case 'h': // Print QImode high register
720    case 'w': // Print HImode register
721    case 'k': // Print SImode register
722    case 'q': // Print SImode register
723      // These only apply to registers, ignore on mem.
724      break;
725    case 'H':
726      if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
727        return true;  // Unsupported modifier in Intel inline assembly.
728      } else {
729        PrintMemReference(MI, OpNo, O, "H");
730      }
731      return false;
732   // Print memory only with displacement. The Modifer 'P' is used in inline
733   // asm to present a call symbol or a global symbol which can not use base
734   // reg or index reg.
735    case 'P':
736      if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
737        PrintIntelMemReference(MI, OpNo, O, "disp-only");
738      } else {
739        PrintMemReference(MI, OpNo, O, "disp-only");
740      }
741      return false;
742    }
743  }
744  if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
745    PrintIntelMemReference(MI, OpNo, O, nullptr);
746  } else {
747    PrintMemReference(MI, OpNo, O, nullptr);
748  }
749  return false;
750}
751
752void X86AsmPrinter::emitStartOfAsmFile(Module &M) {
753  const Triple &TT = TM.getTargetTriple();
754
755  if (TT.isOSBinFormatELF()) {
756    // Assemble feature flags that may require creation of a note section.
757    unsigned FeatureFlagsAnd = 0;
758    if (M.getModuleFlag("cf-protection-branch"))
759      FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_IBT;
760    if (M.getModuleFlag("cf-protection-return"))
761      FeatureFlagsAnd |= ELF::GNU_PROPERTY_X86_FEATURE_1_SHSTK;
762
763    if (FeatureFlagsAnd) {
764      // Emit a .note.gnu.property section with the flags.
765      if (!TT.isArch32Bit() && !TT.isArch64Bit())
766        llvm_unreachable("CFProtection used on invalid architecture!");
767      MCSection *Cur = OutStreamer->getCurrentSectionOnly();
768      MCSection *Nt = MMI->getContext().getELFSection(
769          ".note.gnu.property", ELF::SHT_NOTE, ELF::SHF_ALLOC);
770      OutStreamer->switchSection(Nt);
771
772      // Emitting note header.
773      const int WordSize = TT.isArch64Bit() && !TT.isX32() ? 8 : 4;
774      emitAlignment(WordSize == 4 ? Align(4) : Align(8));
775      OutStreamer->emitIntValue(4, 4 /*size*/); // data size for "GNU\0"
776      OutStreamer->emitIntValue(8 + WordSize, 4 /*size*/); // Elf_Prop size
777      OutStreamer->emitIntValue(ELF::NT_GNU_PROPERTY_TYPE_0, 4 /*size*/);
778      OutStreamer->emitBytes(StringRef("GNU", 4)); // note name
779
780      // Emitting an Elf_Prop for the CET properties.
781      OutStreamer->emitInt32(ELF::GNU_PROPERTY_X86_FEATURE_1_AND);
782      OutStreamer->emitInt32(4);                          // data size
783      OutStreamer->emitInt32(FeatureFlagsAnd);            // data
784      emitAlignment(WordSize == 4 ? Align(4) : Align(8)); // padding
785
786      OutStreamer->endSection(Nt);
787      OutStreamer->switchSection(Cur);
788    }
789  }
790
791  if (TT.isOSBinFormatMachO())
792    OutStreamer->switchSection(getObjFileLowering().getTextSection());
793
794  if (TT.isOSBinFormatCOFF()) {
795    // Emit an absolute @feat.00 symbol.
796    MCSymbol *S = MMI->getContext().getOrCreateSymbol(StringRef("@feat.00"));
797    OutStreamer->beginCOFFSymbolDef(S);
798    OutStreamer->emitCOFFSymbolStorageClass(COFF::IMAGE_SYM_CLASS_STATIC);
799    OutStreamer->emitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_NULL);
800    OutStreamer->endCOFFSymbolDef();
801    int64_t Feat00Value = 0;
802
803    if (TT.getArch() == Triple::x86) {
804      // According to the PE-COFF spec, the LSB of this value marks the object
805      // for "registered SEH".  This means that all SEH handler entry points
806      // must be registered in .sxdata.  Use of any unregistered handlers will
807      // cause the process to terminate immediately.  LLVM does not know how to
808      // register any SEH handlers, so its object files should be safe.
809      Feat00Value |= COFF::Feat00Flags::SafeSEH;
810    }
811
812    if (M.getModuleFlag("cfguard")) {
813      // Object is CFG-aware.
814      Feat00Value |= COFF::Feat00Flags::GuardCF;
815    }
816
817    if (M.getModuleFlag("ehcontguard")) {
818      // Object also has EHCont.
819      Feat00Value |= COFF::Feat00Flags::GuardEHCont;
820    }
821
822    if (M.getModuleFlag("ms-kernel")) {
823      // Object is compiled with /kernel.
824      Feat00Value |= COFF::Feat00Flags::Kernel;
825    }
826
827    OutStreamer->emitSymbolAttribute(S, MCSA_Global);
828    OutStreamer->emitAssignment(
829        S, MCConstantExpr::create(Feat00Value, MMI->getContext()));
830  }
831  OutStreamer->emitSyntaxDirective();
832
833  // If this is not inline asm and we're in 16-bit
834  // mode prefix assembly with .code16.
835  bool is16 = TT.getEnvironment() == Triple::CODE16;
836  if (M.getModuleInlineAsm().empty() && is16)
837    OutStreamer->emitAssemblerFlag(MCAF_Code16);
838}
839
840static void
841emitNonLazySymbolPointer(MCStreamer &OutStreamer, MCSymbol *StubLabel,
842                         MachineModuleInfoImpl::StubValueTy &MCSym) {
843  // L_foo$stub:
844  OutStreamer.emitLabel(StubLabel);
845  //   .indirect_symbol _foo
846  OutStreamer.emitSymbolAttribute(MCSym.getPointer(), MCSA_IndirectSymbol);
847
848  if (MCSym.getInt())
849    // External to current translation unit.
850    OutStreamer.emitIntValue(0, 4/*size*/);
851  else
852    // Internal to current translation unit.
853    //
854    // When we place the LSDA into the TEXT section, the type info
855    // pointers need to be indirect and pc-rel. We accomplish this by
856    // using NLPs; however, sometimes the types are local to the file.
857    // We need to fill in the value for the NLP in those cases.
858    OutStreamer.emitValue(
859        MCSymbolRefExpr::create(MCSym.getPointer(), OutStreamer.getContext()),
860        4 /*size*/);
861}
862
863static void emitNonLazyStubs(MachineModuleInfo *MMI, MCStreamer &OutStreamer) {
864
865  MachineModuleInfoMachO &MMIMacho =
866      MMI->getObjFileInfo<MachineModuleInfoMachO>();
867
868  // Output stubs for dynamically-linked functions.
869  MachineModuleInfoMachO::SymbolListTy Stubs;
870
871  // Output stubs for external and common global variables.
872  Stubs = MMIMacho.GetGVStubList();
873  if (!Stubs.empty()) {
874    OutStreamer.switchSection(MMI->getContext().getMachOSection(
875        "__IMPORT", "__pointers", MachO::S_NON_LAZY_SYMBOL_POINTERS,
876        SectionKind::getMetadata()));
877
878    for (auto &Stub : Stubs)
879      emitNonLazySymbolPointer(OutStreamer, Stub.first, Stub.second);
880
881    Stubs.clear();
882    OutStreamer.addBlankLine();
883  }
884}
885
886void X86AsmPrinter::emitEndOfAsmFile(Module &M) {
887  const Triple &TT = TM.getTargetTriple();
888
889  if (TT.isOSBinFormatMachO()) {
890    // Mach-O uses non-lazy symbol stubs to encode per-TU information into
891    // global table for symbol lookup.
892    emitNonLazyStubs(MMI, *OutStreamer);
893
894    // Emit fault map information.
895    FM.serializeToFaultMapSection();
896
897    // This flag tells the linker that no global symbols contain code that fall
898    // through to other global symbols (e.g. an implementation of multiple entry
899    // points). If this doesn't occur, the linker can safely perform dead code
900    // stripping. Since LLVM never generates code that does this, it is always
901    // safe to set.
902    OutStreamer->emitAssemblerFlag(MCAF_SubsectionsViaSymbols);
903  } else if (TT.isOSBinFormatCOFF()) {
904    if (MMI->usesMSVCFloatingPoint()) {
905      // In Windows' libcmt.lib, there is a file which is linked in only if the
906      // symbol _fltused is referenced. Linking this in causes some
907      // side-effects:
908      //
909      // 1. For x86-32, it will set the x87 rounding mode to 53-bit instead of
910      // 64-bit mantissas at program start.
911      //
912      // 2. It links in support routines for floating-point in scanf and printf.
913      //
914      // MSVC emits an undefined reference to _fltused when there are any
915      // floating point operations in the program (including calls). A program
916      // that only has: `scanf("%f", &global_float);` may fail to trigger this,
917      // but oh well...that's a documented issue.
918      StringRef SymbolName =
919          (TT.getArch() == Triple::x86) ? "__fltused" : "_fltused";
920      MCSymbol *S = MMI->getContext().getOrCreateSymbol(SymbolName);
921      OutStreamer->emitSymbolAttribute(S, MCSA_Global);
922      return;
923    }
924  } else if (TT.isOSBinFormatELF()) {
925    FM.serializeToFaultMapSection();
926  }
927
928  // Emit __morestack address if needed for indirect calls.
929  if (TT.getArch() == Triple::x86_64 && TM.getCodeModel() == CodeModel::Large) {
930    if (MCSymbol *AddrSymbol = OutContext.lookupSymbol("__morestack_addr")) {
931      Align Alignment(1);
932      MCSection *ReadOnlySection = getObjFileLowering().getSectionForConstant(
933          getDataLayout(), SectionKind::getReadOnly(),
934          /*C=*/nullptr, Alignment);
935      OutStreamer->switchSection(ReadOnlySection);
936      OutStreamer->emitLabel(AddrSymbol);
937
938      unsigned PtrSize = MAI->getCodePointerSize();
939      OutStreamer->emitSymbolValue(GetExternalSymbolSymbol("__morestack"),
940                                   PtrSize);
941    }
942  }
943}
944
945//===----------------------------------------------------------------------===//
946// Target Registry Stuff
947//===----------------------------------------------------------------------===//
948
949// Force static initialization.
950extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86AsmPrinter() {
951  RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target());
952  RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target());
953}
954