1//===- Thunks.cpp --------------------------------------------------------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===---------------------------------------------------------------------===// 8// 9// This file contains Thunk subclasses. 10// 11// A thunk is a small piece of code written after an input section 12// which is used to jump between "incompatible" functions 13// such as MIPS PIC and non-PIC or ARM non-Thumb and Thumb functions. 14// 15// If a jump target is too far and its address doesn't fit to a 16// short jump instruction, we need to create a thunk too, but we 17// haven't supported it yet. 18// 19// i386 and x86-64 don't need thunks. 20// 21//===---------------------------------------------------------------------===// 22 23#include "Thunks.h" 24#include "Config.h" 25#include "InputFiles.h" 26#include "InputSection.h" 27#include "OutputSections.h" 28#include "Symbols.h" 29#include "SyntheticSections.h" 30#include "Target.h" 31#include "lld/Common/CommonLinkerContext.h" 32#include "llvm/BinaryFormat/ELF.h" 33#include "llvm/Support/Casting.h" 34#include "llvm/Support/ErrorHandling.h" 35#include "llvm/Support/MathExtras.h" 36#include <cstdint> 37#include <cstring> 38 39using namespace llvm; 40using namespace llvm::object; 41using namespace llvm::ELF; 42using namespace lld; 43using namespace lld::elf; 44 45namespace { 46 47// AArch64 long range Thunks 48class AArch64ABSLongThunk final : public Thunk { 49public: 50 AArch64ABSLongThunk(Symbol &dest, int64_t addend) : Thunk(dest, addend) {} 51 uint32_t size() override { return 16; } 52 void writeTo(uint8_t *buf) override; 53 void addSymbols(ThunkSection &isec) override; 54}; 55 56class AArch64ADRPThunk final : public Thunk { 57public: 58 AArch64ADRPThunk(Symbol &dest, int64_t addend) : Thunk(dest, addend) {} 59 uint32_t size() override { return 12; } 60 void writeTo(uint8_t *buf) override; 61 void addSymbols(ThunkSection &isec) override; 62}; 63 64// Base class for ARM thunks. 65// 66// An ARM thunk may be either short or long. A short thunk is simply a branch 67// (B) instruction, and it may be used to call ARM functions when the distance 68// from the thunk to the target is less than 32MB. Long thunks can branch to any 69// virtual address and can switch between ARM and Thumb, and they are 70// implemented in the derived classes. This class tries to create a short thunk 71// if the target is in range, otherwise it creates a long thunk. 72class ARMThunk : public Thunk { 73public: 74 ARMThunk(Symbol &dest, int64_t addend) : Thunk(dest, addend) {} 75 76 bool getMayUseShortThunk(); 77 uint32_t size() override { return getMayUseShortThunk() ? 4 : sizeLong(); } 78 void writeTo(uint8_t *buf) override; 79 bool isCompatibleWith(const InputSection &isec, 80 const Relocation &rel) const override; 81 82 // Returns the size of a long thunk. 83 virtual uint32_t sizeLong() = 0; 84 85 // Writes a long thunk to Buf. 86 virtual void writeLong(uint8_t *buf) = 0; 87 88private: 89 // This field tracks whether all previously considered layouts would allow 90 // this thunk to be short. If we have ever needed a long thunk, we always 91 // create a long thunk, even if the thunk may be short given the current 92 // distance to the target. We do this because transitioning from long to short 93 // can create layout oscillations in certain corner cases which would prevent 94 // the layout from converging. 95 bool mayUseShortThunk = true; 96}; 97 98// Base class for Thumb-2 thunks. 99// 100// This class is similar to ARMThunk, but it uses the Thumb-2 B.W instruction 101// which has a range of 16MB. 102class ThumbThunk : public Thunk { 103public: 104 ThumbThunk(Symbol &dest, int64_t addend) : Thunk(dest, addend) { 105 alignment = 2; 106 } 107 108 bool getMayUseShortThunk(); 109 uint32_t size() override { return getMayUseShortThunk() ? 4 : sizeLong(); } 110 void writeTo(uint8_t *buf) override; 111 bool isCompatibleWith(const InputSection &isec, 112 const Relocation &rel) const override; 113 114 // Returns the size of a long thunk. 115 virtual uint32_t sizeLong() = 0; 116 117 // Writes a long thunk to Buf. 118 virtual void writeLong(uint8_t *buf) = 0; 119 120private: 121 // See comment in ARMThunk above. 122 bool mayUseShortThunk = true; 123}; 124 125// Specific ARM Thunk implementations. The naming convention is: 126// Source State, TargetState, Target Requirement, ABS or PI, Range 127class ARMV7ABSLongThunk final : public ARMThunk { 128public: 129 ARMV7ABSLongThunk(Symbol &dest, int64_t addend) : ARMThunk(dest, addend) {} 130 131 uint32_t sizeLong() override { return 12; } 132 void writeLong(uint8_t *buf) override; 133 void addSymbols(ThunkSection &isec) override; 134}; 135 136class ARMV7PILongThunk final : public ARMThunk { 137public: 138 ARMV7PILongThunk(Symbol &dest, int64_t addend) : ARMThunk(dest, addend) {} 139 140 uint32_t sizeLong() override { return 16; } 141 void writeLong(uint8_t *buf) override; 142 void addSymbols(ThunkSection &isec) override; 143}; 144 145class ThumbV7ABSLongThunk final : public ThumbThunk { 146public: 147 ThumbV7ABSLongThunk(Symbol &dest, int64_t addend) 148 : ThumbThunk(dest, addend) {} 149 150 uint32_t sizeLong() override { return 10; } 151 void writeLong(uint8_t *buf) override; 152 void addSymbols(ThunkSection &isec) override; 153}; 154 155class ThumbV7PILongThunk final : public ThumbThunk { 156public: 157 ThumbV7PILongThunk(Symbol &dest, int64_t addend) : ThumbThunk(dest, addend) {} 158 159 uint32_t sizeLong() override { return 12; } 160 void writeLong(uint8_t *buf) override; 161 void addSymbols(ThunkSection &isec) override; 162}; 163 164// Implementations of Thunks for Arm v6-M. Only Thumb instructions are permitted 165class ThumbV6MABSLongThunk final : public ThumbThunk { 166public: 167 ThumbV6MABSLongThunk(Symbol &dest, int64_t addend) 168 : ThumbThunk(dest, addend) {} 169 170 uint32_t sizeLong() override { return 12; } 171 void writeLong(uint8_t *buf) override; 172 void addSymbols(ThunkSection &isec) override; 173}; 174 175class ThumbV6MPILongThunk final : public ThumbThunk { 176public: 177 ThumbV6MPILongThunk(Symbol &dest, int64_t addend) 178 : ThumbThunk(dest, addend) {} 179 180 uint32_t sizeLong() override { return 16; } 181 void writeLong(uint8_t *buf) override; 182 void addSymbols(ThunkSection &isec) override; 183}; 184 185// Architectures v4, v5 and v6 do not support the movt/movw instructions. v5 and 186// v6 support BLX to which BL instructions can be rewritten inline. There are no 187// Thumb entrypoints for v5 and v6 as there is no Thumb branch instruction on 188// these architecture that can result in a thunk. 189 190// LDR on v5 and v6 can switch processor state, so for v5 and v6, 191// ARMV5LongLdrPcThunk can be used for both Arm->Arm and Arm->Thumb calls. v4 192// can also use this thunk, but only for Arm->Arm calls. 193class ARMV5LongLdrPcThunk final : public ARMThunk { 194public: 195 ARMV5LongLdrPcThunk(Symbol &dest, int64_t addend) : ARMThunk(dest, addend) {} 196 197 uint32_t sizeLong() override { return 8; } 198 void writeLong(uint8_t *buf) override; 199 void addSymbols(ThunkSection &isec) override; 200}; 201 202// Implementations of Thunks for v4. BLX is not supported, and loads 203// will not invoke Arm/Thumb state changes. 204class ARMV4PILongBXThunk final : public ARMThunk { 205public: 206 ARMV4PILongBXThunk(Symbol &dest, int64_t addend) : ARMThunk(dest, addend) {} 207 208 uint32_t sizeLong() override { return 16; } 209 void writeLong(uint8_t *buf) override; 210 void addSymbols(ThunkSection &isec) override; 211}; 212 213class ARMV4PILongThunk final : public ARMThunk { 214public: 215 ARMV4PILongThunk(Symbol &dest, int64_t addend) : ARMThunk(dest, addend) {} 216 217 uint32_t sizeLong() override { return 12; } 218 void writeLong(uint8_t *buf) override; 219 void addSymbols(ThunkSection &isec) override; 220}; 221 222class ThumbV4PILongBXThunk final : public ThumbThunk { 223public: 224 ThumbV4PILongBXThunk(Symbol &dest, int64_t addend) 225 : ThumbThunk(dest, addend) {} 226 227 uint32_t sizeLong() override { return 16; } 228 void writeLong(uint8_t *buf) override; 229 void addSymbols(ThunkSection &isec) override; 230}; 231 232class ThumbV4PILongThunk final : public ThumbThunk { 233public: 234 ThumbV4PILongThunk(Symbol &dest, int64_t addend) 235 : ThumbThunk(dest, addend) {} 236 237 uint32_t sizeLong() override { return 20; } 238 void writeLong(uint8_t *buf) override; 239 void addSymbols(ThunkSection &isec) override; 240}; 241 242class ARMV4ABSLongBXThunk final : public ARMThunk { 243public: 244 ARMV4ABSLongBXThunk(Symbol &dest, int64_t addend) : ARMThunk(dest, addend) {} 245 246 uint32_t sizeLong() override { return 12; } 247 void writeLong(uint8_t *buf) override; 248 void addSymbols(ThunkSection &isec) override; 249}; 250 251class ThumbV4ABSLongBXThunk final : public ThumbThunk { 252public: 253 ThumbV4ABSLongBXThunk(Symbol &dest, int64_t addend) 254 : ThumbThunk(dest, addend) {} 255 256 uint32_t sizeLong() override { return 12; } 257 void writeLong(uint8_t *buf) override; 258 void addSymbols(ThunkSection &isec) override; 259}; 260 261class ThumbV4ABSLongThunk final : public ThumbThunk { 262public: 263 ThumbV4ABSLongThunk(Symbol &dest, int64_t addend) 264 : ThumbThunk(dest, addend) {} 265 266 uint32_t sizeLong() override { return 16; } 267 void writeLong(uint8_t *buf) override; 268 void addSymbols(ThunkSection &isec) override; 269}; 270 271// MIPS LA25 thunk 272class MipsThunk final : public Thunk { 273public: 274 MipsThunk(Symbol &dest) : Thunk(dest, 0) {} 275 276 uint32_t size() override { return 16; } 277 void writeTo(uint8_t *buf) override; 278 void addSymbols(ThunkSection &isec) override; 279 InputSection *getTargetInputSection() const override; 280}; 281 282// microMIPS R2-R5 LA25 thunk 283class MicroMipsThunk final : public Thunk { 284public: 285 MicroMipsThunk(Symbol &dest) : Thunk(dest, 0) {} 286 287 uint32_t size() override { return 14; } 288 void writeTo(uint8_t *buf) override; 289 void addSymbols(ThunkSection &isec) override; 290 InputSection *getTargetInputSection() const override; 291}; 292 293// microMIPS R6 LA25 thunk 294class MicroMipsR6Thunk final : public Thunk { 295public: 296 MicroMipsR6Thunk(Symbol &dest) : Thunk(dest, 0) {} 297 298 uint32_t size() override { return 12; } 299 void writeTo(uint8_t *buf) override; 300 void addSymbols(ThunkSection &isec) override; 301 InputSection *getTargetInputSection() const override; 302}; 303 304class PPC32PltCallStub final : public Thunk { 305public: 306 // For R_PPC_PLTREL24, Thunk::addend records the addend which will be used to 307 // decide the offsets in the call stub. 308 PPC32PltCallStub(const InputSection &isec, const Relocation &rel, 309 Symbol &dest) 310 : Thunk(dest, rel.addend), file(isec.file) {} 311 uint32_t size() override { return 16; } 312 void writeTo(uint8_t *buf) override; 313 void addSymbols(ThunkSection &isec) override; 314 bool isCompatibleWith(const InputSection &isec, const Relocation &rel) const override; 315 316private: 317 // Records the call site of the call stub. 318 const InputFile *file; 319}; 320 321class PPC32LongThunk final : public Thunk { 322public: 323 PPC32LongThunk(Symbol &dest, int64_t addend) : Thunk(dest, addend) {} 324 uint32_t size() override { return config->isPic ? 32 : 16; } 325 void writeTo(uint8_t *buf) override; 326 void addSymbols(ThunkSection &isec) override; 327}; 328 329// PPC64 Plt call stubs. 330// Any call site that needs to call through a plt entry needs a call stub in 331// the .text section. The call stub is responsible for: 332// 1) Saving the toc-pointer to the stack. 333// 2) Loading the target functions address from the procedure linkage table into 334// r12 for use by the target functions global entry point, and into the count 335// register. 336// 3) Transferring control to the target function through an indirect branch. 337class PPC64PltCallStub final : public Thunk { 338public: 339 PPC64PltCallStub(Symbol &dest) : Thunk(dest, 0) {} 340 uint32_t size() override { return 20; } 341 void writeTo(uint8_t *buf) override; 342 void addSymbols(ThunkSection &isec) override; 343 bool isCompatibleWith(const InputSection &isec, 344 const Relocation &rel) const override; 345}; 346 347// PPC64 R2 Save Stub 348// When the caller requires a valid R2 TOC pointer but the callee does not 349// require a TOC pointer and the callee cannot guarantee that it doesn't 350// clobber R2 then we need to save R2. This stub: 351// 1) Saves the TOC pointer to the stack. 352// 2) Tail calls the callee. 353class PPC64R2SaveStub final : public Thunk { 354public: 355 PPC64R2SaveStub(Symbol &dest, int64_t addend) : Thunk(dest, addend) { 356 alignment = 16; 357 } 358 359 // To prevent oscillations in layout when moving from short to long thunks 360 // we make sure that once a thunk has been set to long it cannot go back. 361 bool getMayUseShortThunk() { 362 if (!mayUseShortThunk) 363 return false; 364 if (!isInt<26>(computeOffset())) { 365 mayUseShortThunk = false; 366 return false; 367 } 368 return true; 369 } 370 uint32_t size() override { return getMayUseShortThunk() ? 8 : 32; } 371 void writeTo(uint8_t *buf) override; 372 void addSymbols(ThunkSection &isec) override; 373 bool isCompatibleWith(const InputSection &isec, 374 const Relocation &rel) const override; 375 376private: 377 // Transitioning from long to short can create layout oscillations in 378 // certain corner cases which would prevent the layout from converging. 379 // This is similar to the handling for ARMThunk. 380 bool mayUseShortThunk = true; 381 int64_t computeOffset() const { 382 return destination.getVA() - (getThunkTargetSym()->getVA() + 4); 383 } 384}; 385 386// PPC64 R12 Setup Stub 387// When a caller that does not maintain a toc-pointer performs a local call to 388// a callee which requires a toc-pointer then we need this stub to place the 389// callee's global entry point into r12 without a save of R2. 390class PPC64R12SetupStub final : public Thunk { 391public: 392 PPC64R12SetupStub(Symbol &dest) : Thunk(dest, 0) { alignment = 16; } 393 uint32_t size() override { return 32; } 394 void writeTo(uint8_t *buf) override; 395 void addSymbols(ThunkSection &isec) override; 396 bool isCompatibleWith(const InputSection &isec, 397 const Relocation &rel) const override; 398}; 399 400// PPC64 PC-relative PLT Stub 401// When a caller that does not maintain a toc-pointer performs an extern call 402// then this stub is needed for: 403// 1) Loading the target functions address from the procedure linkage table into 404// r12 for use by the target functions global entry point, and into the count 405// register with pc-relative instructions. 406// 2) Transferring control to the target function through an indirect branch. 407class PPC64PCRelPLTStub final : public Thunk { 408public: 409 PPC64PCRelPLTStub(Symbol &dest) : Thunk(dest, 0) { alignment = 16; } 410 uint32_t size() override { return 32; } 411 void writeTo(uint8_t *buf) override; 412 void addSymbols(ThunkSection &isec) override; 413 bool isCompatibleWith(const InputSection &isec, 414 const Relocation &rel) const override; 415}; 416 417// A bl instruction uses a signed 24 bit offset, with an implicit 4 byte 418// alignment. This gives a possible 26 bits of 'reach'. If the call offset is 419// larger than that we need to emit a long-branch thunk. The target address 420// of the callee is stored in a table to be accessed TOC-relative. Since the 421// call must be local (a non-local call will have a PltCallStub instead) the 422// table stores the address of the callee's local entry point. For 423// position-independent code a corresponding relative dynamic relocation is 424// used. 425class PPC64LongBranchThunk : public Thunk { 426public: 427 uint32_t size() override { return 32; } 428 void writeTo(uint8_t *buf) override; 429 void addSymbols(ThunkSection &isec) override; 430 bool isCompatibleWith(const InputSection &isec, 431 const Relocation &rel) const override; 432 433protected: 434 PPC64LongBranchThunk(Symbol &dest, int64_t addend) : Thunk(dest, addend) {} 435}; 436 437class PPC64PILongBranchThunk final : public PPC64LongBranchThunk { 438public: 439 PPC64PILongBranchThunk(Symbol &dest, int64_t addend) 440 : PPC64LongBranchThunk(dest, addend) { 441 assert(!dest.isPreemptible); 442 if (std::optional<uint32_t> index = 443 in.ppc64LongBranchTarget->addEntry(&dest, addend)) { 444 mainPart->relaDyn->addRelativeReloc( 445 target->relativeRel, *in.ppc64LongBranchTarget, *index * UINT64_C(8), 446 dest, addend + getPPC64GlobalEntryToLocalEntryOffset(dest.stOther), 447 target->symbolicRel, R_ABS); 448 } 449 } 450}; 451 452class PPC64PDLongBranchThunk final : public PPC64LongBranchThunk { 453public: 454 PPC64PDLongBranchThunk(Symbol &dest, int64_t addend) 455 : PPC64LongBranchThunk(dest, addend) { 456 in.ppc64LongBranchTarget->addEntry(&dest, addend); 457 } 458}; 459 460} // end anonymous namespace 461 462Defined *Thunk::addSymbol(StringRef name, uint8_t type, uint64_t value, 463 InputSectionBase §ion) { 464 Defined *d = addSyntheticLocal(name, type, value, /*size=*/0, section); 465 syms.push_back(d); 466 return d; 467} 468 469void Thunk::setOffset(uint64_t newOffset) { 470 for (Defined *d : syms) 471 d->value = d->value - offset + newOffset; 472 offset = newOffset; 473} 474 475// AArch64 long range Thunks 476 477static uint64_t getAArch64ThunkDestVA(const Symbol &s, int64_t a) { 478 uint64_t v = s.isInPlt() ? s.getPltVA() : s.getVA(a); 479 return v; 480} 481 482void AArch64ABSLongThunk::writeTo(uint8_t *buf) { 483 const uint8_t data[] = { 484 0x50, 0x00, 0x00, 0x58, // ldr x16, L0 485 0x00, 0x02, 0x1f, 0xd6, // br x16 486 0x00, 0x00, 0x00, 0x00, // L0: .xword S 487 0x00, 0x00, 0x00, 0x00, 488 }; 489 uint64_t s = getAArch64ThunkDestVA(destination, addend); 490 memcpy(buf, data, sizeof(data)); 491 target->relocateNoSym(buf + 8, R_AARCH64_ABS64, s); 492} 493 494void AArch64ABSLongThunk::addSymbols(ThunkSection &isec) { 495 addSymbol(saver().save("__AArch64AbsLongThunk_" + destination.getName()), 496 STT_FUNC, 0, isec); 497 addSymbol("$x", STT_NOTYPE, 0, isec); 498 addSymbol("$d", STT_NOTYPE, 8, isec); 499} 500 501// This Thunk has a maximum range of 4Gb, this is sufficient for all programs 502// using the small code model, including pc-relative ones. At time of writing 503// clang and gcc do not support the large code model for position independent 504// code so it is safe to use this for position independent thunks without 505// worrying about the destination being more than 4Gb away. 506void AArch64ADRPThunk::writeTo(uint8_t *buf) { 507 const uint8_t data[] = { 508 0x10, 0x00, 0x00, 0x90, // adrp x16, Dest R_AARCH64_ADR_PREL_PG_HI21(Dest) 509 0x10, 0x02, 0x00, 0x91, // add x16, x16, R_AARCH64_ADD_ABS_LO12_NC(Dest) 510 0x00, 0x02, 0x1f, 0xd6, // br x16 511 }; 512 uint64_t s = getAArch64ThunkDestVA(destination, addend); 513 uint64_t p = getThunkTargetSym()->getVA(); 514 memcpy(buf, data, sizeof(data)); 515 target->relocateNoSym(buf, R_AARCH64_ADR_PREL_PG_HI21, 516 getAArch64Page(s) - getAArch64Page(p)); 517 target->relocateNoSym(buf + 4, R_AARCH64_ADD_ABS_LO12_NC, s); 518} 519 520void AArch64ADRPThunk::addSymbols(ThunkSection &isec) { 521 addSymbol(saver().save("__AArch64ADRPThunk_" + destination.getName()), 522 STT_FUNC, 0, isec); 523 addSymbol("$x", STT_NOTYPE, 0, isec); 524} 525 526// ARM Target Thunks 527static uint64_t getARMThunkDestVA(const Symbol &s) { 528 uint64_t v = s.isInPlt() ? s.getPltVA() : s.getVA(); 529 return SignExtend64<32>(v); 530} 531 532// This function returns true if the target is not Thumb and is within 2^26, and 533// it has not previously returned false (see comment for mayUseShortThunk). 534bool ARMThunk::getMayUseShortThunk() { 535 if (!mayUseShortThunk) 536 return false; 537 uint64_t s = getARMThunkDestVA(destination); 538 if (s & 1) { 539 mayUseShortThunk = false; 540 return false; 541 } 542 uint64_t p = getThunkTargetSym()->getVA(); 543 int64_t offset = s - p - 8; 544 mayUseShortThunk = llvm::isInt<26>(offset); 545 return mayUseShortThunk; 546} 547 548void ARMThunk::writeTo(uint8_t *buf) { 549 if (!getMayUseShortThunk()) { 550 writeLong(buf); 551 return; 552 } 553 554 uint64_t s = getARMThunkDestVA(destination); 555 uint64_t p = getThunkTargetSym()->getVA(); 556 int64_t offset = s - p - 8; 557 const uint8_t data[] = { 558 0x00, 0x00, 0x00, 0xea, // b S 559 }; 560 memcpy(buf, data, sizeof(data)); 561 target->relocateNoSym(buf, R_ARM_JUMP24, offset); 562} 563 564bool ARMThunk::isCompatibleWith(const InputSection &isec, 565 const Relocation &rel) const { 566 // v4T does not have BLX, so also deny R_ARM_THM_CALL 567 if (!config->armHasBlx && rel.type == R_ARM_THM_CALL) 568 return false; 569 570 // Thumb branch relocations can't use BLX 571 return rel.type != R_ARM_THM_JUMP19 && rel.type != R_ARM_THM_JUMP24; 572} 573 574// This function returns true if: 575// the target is Thumb 576// && is within branch range 577// && this function has not previously returned false 578// (see comment for mayUseShortThunk) 579// && the arch supports Thumb branch range extension. 580bool ThumbThunk::getMayUseShortThunk() { 581 if (!mayUseShortThunk || !config->armJ1J2BranchEncoding) 582 return false; 583 uint64_t s = getARMThunkDestVA(destination); 584 if ((s & 1) == 0) { 585 mayUseShortThunk = false; 586 return false; 587 } 588 uint64_t p = getThunkTargetSym()->getVA() & ~1; 589 int64_t offset = s - p - 4; 590 mayUseShortThunk = llvm::isInt<25>(offset); 591 return mayUseShortThunk; 592} 593 594void ThumbThunk::writeTo(uint8_t *buf) { 595 if (!getMayUseShortThunk()) { 596 writeLong(buf); 597 return; 598 } 599 600 uint64_t s = getARMThunkDestVA(destination); 601 uint64_t p = getThunkTargetSym()->getVA(); 602 int64_t offset = s - p - 4; 603 const uint8_t data[] = { 604 0x00, 0xf0, 0x00, 0xb0, // b.w S 605 }; 606 memcpy(buf, data, sizeof(data)); 607 target->relocateNoSym(buf, R_ARM_THM_JUMP24, offset); 608} 609 610bool ThumbThunk::isCompatibleWith(const InputSection &isec, 611 const Relocation &rel) const { 612 // v4T does not have BLX, so also deny R_ARM_CALL 613 if (!config->armHasBlx && rel.type == R_ARM_CALL) 614 return false; 615 616 // ARM branch relocations can't use BLX 617 return rel.type != R_ARM_JUMP24 && rel.type != R_ARM_PC24 && rel.type != R_ARM_PLT32; 618} 619 620void ARMV7ABSLongThunk::writeLong(uint8_t *buf) { 621 const uint8_t data[] = { 622 0x00, 0xc0, 0x00, 0xe3, // movw ip,:lower16:S 623 0x00, 0xc0, 0x40, 0xe3, // movt ip,:upper16:S 624 0x1c, 0xff, 0x2f, 0xe1, // bx ip 625 }; 626 uint64_t s = getARMThunkDestVA(destination); 627 memcpy(buf, data, sizeof(data)); 628 target->relocateNoSym(buf, R_ARM_MOVW_ABS_NC, s); 629 target->relocateNoSym(buf + 4, R_ARM_MOVT_ABS, s); 630} 631 632void ARMV7ABSLongThunk::addSymbols(ThunkSection &isec) { 633 addSymbol(saver().save("__ARMv7ABSLongThunk_" + destination.getName()), 634 STT_FUNC, 0, isec); 635 addSymbol("$a", STT_NOTYPE, 0, isec); 636} 637 638void ThumbV7ABSLongThunk::writeLong(uint8_t *buf) { 639 const uint8_t data[] = { 640 0x40, 0xf2, 0x00, 0x0c, // movw ip, :lower16:S 641 0xc0, 0xf2, 0x00, 0x0c, // movt ip, :upper16:S 642 0x60, 0x47, // bx ip 643 }; 644 uint64_t s = getARMThunkDestVA(destination); 645 memcpy(buf, data, sizeof(data)); 646 target->relocateNoSym(buf, R_ARM_THM_MOVW_ABS_NC, s); 647 target->relocateNoSym(buf + 4, R_ARM_THM_MOVT_ABS, s); 648} 649 650void ThumbV7ABSLongThunk::addSymbols(ThunkSection &isec) { 651 addSymbol(saver().save("__Thumbv7ABSLongThunk_" + destination.getName()), 652 STT_FUNC, 1, isec); 653 addSymbol("$t", STT_NOTYPE, 0, isec); 654} 655 656void ARMV7PILongThunk::writeLong(uint8_t *buf) { 657 const uint8_t data[] = { 658 0xf0, 0xcf, 0x0f, 0xe3, // P: movw ip,:lower16:S - (P + (L1-P) + 8) 659 0x00, 0xc0, 0x40, 0xe3, // movt ip,:upper16:S - (P + (L1-P) + 8) 660 0x0f, 0xc0, 0x8c, 0xe0, // L1: add ip, ip, pc 661 0x1c, 0xff, 0x2f, 0xe1, // bx ip 662 }; 663 uint64_t s = getARMThunkDestVA(destination); 664 uint64_t p = getThunkTargetSym()->getVA(); 665 int64_t offset = s - p - 16; 666 memcpy(buf, data, sizeof(data)); 667 target->relocateNoSym(buf, R_ARM_MOVW_PREL_NC, offset); 668 target->relocateNoSym(buf + 4, R_ARM_MOVT_PREL, offset); 669} 670 671void ARMV7PILongThunk::addSymbols(ThunkSection &isec) { 672 addSymbol(saver().save("__ARMV7PILongThunk_" + destination.getName()), 673 STT_FUNC, 0, isec); 674 addSymbol("$a", STT_NOTYPE, 0, isec); 675} 676 677void ThumbV7PILongThunk::writeLong(uint8_t *buf) { 678 const uint8_t data[] = { 679 0x4f, 0xf6, 0xf4, 0x7c, // P: movw ip,:lower16:S - (P + (L1-P) + 4) 680 0xc0, 0xf2, 0x00, 0x0c, // movt ip,:upper16:S - (P + (L1-P) + 4) 681 0xfc, 0x44, // L1: add ip, pc 682 0x60, 0x47, // bx ip 683 }; 684 uint64_t s = getARMThunkDestVA(destination); 685 uint64_t p = getThunkTargetSym()->getVA() & ~0x1; 686 int64_t offset = s - p - 12; 687 memcpy(buf, data, sizeof(data)); 688 target->relocateNoSym(buf, R_ARM_THM_MOVW_PREL_NC, offset); 689 target->relocateNoSym(buf + 4, R_ARM_THM_MOVT_PREL, offset); 690} 691 692void ThumbV7PILongThunk::addSymbols(ThunkSection &isec) { 693 addSymbol(saver().save("__ThumbV7PILongThunk_" + destination.getName()), 694 STT_FUNC, 1, isec); 695 addSymbol("$t", STT_NOTYPE, 0, isec); 696} 697 698void ThumbV6MABSLongThunk::writeLong(uint8_t *buf) { 699 // Most Thumb instructions cannot access the high registers r8 - r15. As the 700 // only register we can corrupt is r12 we must instead spill a low register 701 // to the stack to use as a scratch register. We push r1 even though we 702 // don't need to get some space to use for the return address. 703 const uint8_t data[] = { 704 0x03, 0xb4, // push {r0, r1} ; Obtain scratch registers 705 0x01, 0x48, // ldr r0, [pc, #4] ; L1 706 0x01, 0x90, // str r0, [sp, #4] ; SP + 4 = S 707 0x01, 0xbd, // pop {r0, pc} ; restore r0 and branch to dest 708 0x00, 0x00, 0x00, 0x00 // L1: .word S 709 }; 710 uint64_t s = getARMThunkDestVA(destination); 711 memcpy(buf, data, sizeof(data)); 712 target->relocateNoSym(buf + 8, R_ARM_ABS32, s); 713} 714 715void ThumbV6MABSLongThunk::addSymbols(ThunkSection &isec) { 716 addSymbol(saver().save("__Thumbv6MABSLongThunk_" + destination.getName()), 717 STT_FUNC, 1, isec); 718 addSymbol("$t", STT_NOTYPE, 0, isec); 719 addSymbol("$d", STT_NOTYPE, 8, isec); 720} 721 722void ThumbV6MPILongThunk::writeLong(uint8_t *buf) { 723 // Most Thumb instructions cannot access the high registers r8 - r15. As the 724 // only register we can corrupt is ip (r12) we must instead spill a low 725 // register to the stack to use as a scratch register. 726 const uint8_t data[] = { 727 0x01, 0xb4, // P: push {r0} ; Obtain scratch register 728 0x02, 0x48, // ldr r0, [pc, #8] ; L2 729 0x84, 0x46, // mov ip, r0 ; high to low register 730 0x01, 0xbc, // pop {r0} ; restore scratch register 731 0xe7, 0x44, // L1: add pc, ip ; transfer control 732 0xc0, 0x46, // nop ; pad to 4-byte boundary 733 0x00, 0x00, 0x00, 0x00, // L2: .word S - (P + (L1 - P) + 4) 734 }; 735 uint64_t s = getARMThunkDestVA(destination); 736 uint64_t p = getThunkTargetSym()->getVA() & ~0x1; 737 memcpy(buf, data, sizeof(data)); 738 target->relocateNoSym(buf + 12, R_ARM_REL32, s - p - 12); 739} 740 741void ThumbV6MPILongThunk::addSymbols(ThunkSection &isec) { 742 addSymbol(saver().save("__Thumbv6MPILongThunk_" + destination.getName()), 743 STT_FUNC, 1, isec); 744 addSymbol("$t", STT_NOTYPE, 0, isec); 745 addSymbol("$d", STT_NOTYPE, 12, isec); 746} 747 748void ARMV5LongLdrPcThunk::writeLong(uint8_t *buf) { 749 const uint8_t data[] = { 750 0x04, 0xf0, 0x1f, 0xe5, // ldr pc, [pc,#-4] ; L1 751 0x00, 0x00, 0x00, 0x00, // L1: .word S 752 }; 753 memcpy(buf, data, sizeof(data)); 754 target->relocateNoSym(buf + 4, R_ARM_ABS32, getARMThunkDestVA(destination)); 755} 756 757void ARMV5LongLdrPcThunk::addSymbols(ThunkSection &isec) { 758 addSymbol(saver().save("__ARMv5LongLdrPcThunk_" + destination.getName()), 759 STT_FUNC, 0, isec); 760 addSymbol("$a", STT_NOTYPE, 0, isec); 761 addSymbol("$d", STT_NOTYPE, 4, isec); 762} 763 764void ARMV4ABSLongBXThunk::writeLong(uint8_t *buf) { 765 const uint8_t data[] = { 766 0x00, 0xc0, 0x9f, 0xe5, // ldr r12, [pc] ; L1 767 0x1c, 0xff, 0x2f, 0xe1, // bx r12 768 0x00, 0x00, 0x00, 0x00, // L1: .word S 769 }; 770 memcpy(buf, data, sizeof(data)); 771 target->relocateNoSym(buf + 8, R_ARM_ABS32, getARMThunkDestVA(destination)); 772} 773 774void ARMV4ABSLongBXThunk::addSymbols(ThunkSection &isec) { 775 addSymbol(saver().save("__ARMv4ABSLongBXThunk_" + destination.getName()), 776 STT_FUNC, 0, isec); 777 addSymbol("$a", STT_NOTYPE, 0, isec); 778 addSymbol("$d", STT_NOTYPE, 8, isec); 779} 780 781void ThumbV4ABSLongBXThunk::writeLong(uint8_t *buf) { 782 const uint8_t data[] = { 783 0x78, 0x47, // bx pc 784 0xfd, 0xe7, // b #-6 ; Arm recommended sequence to follow bx pc 785 0x04, 0xf0, 0x1f, 0xe5, // ldr pc, [pc, #-4] ; L1 786 0x00, 0x00, 0x00, 0x00, // L1: .word S 787 }; 788 memcpy(buf, data, sizeof(data)); 789 target->relocateNoSym(buf + 8, R_ARM_ABS32, getARMThunkDestVA(destination)); 790} 791 792void ThumbV4ABSLongBXThunk::addSymbols(ThunkSection &isec) { 793 addSymbol(saver().save("__Thumbv4ABSLongBXThunk_" + destination.getName()), 794 STT_FUNC, 1, isec); 795 addSymbol("$t", STT_NOTYPE, 0, isec); 796 addSymbol("$a", STT_NOTYPE, 4, isec); 797 addSymbol("$d", STT_NOTYPE, 8, isec); 798} 799 800void ThumbV4ABSLongThunk::writeLong(uint8_t *buf) { 801 const uint8_t data[] = { 802 0x78, 0x47, // bx pc 803 0xfd, 0xe7, // b #-6 ; Arm recommended sequence to follow bx pc 804 0x00, 0xc0, 0x9f, 0xe5, // ldr r12, [pc] ; L1 805 0x1c, 0xff, 0x2f, 0xe1, // bx r12 806 0x00, 0x00, 0x00, 0x00, // L1: .word S 807 }; 808 memcpy(buf, data, sizeof(data)); 809 target->relocateNoSym(buf + 12, R_ARM_ABS32, getARMThunkDestVA(destination)); 810} 811 812void ThumbV4ABSLongThunk::addSymbols(ThunkSection &isec) { 813 addSymbol(saver().save("__Thumbv4ABSLongThunk_" + destination.getName()), 814 STT_FUNC, 1, isec); 815 addSymbol("$t", STT_NOTYPE, 0, isec); 816 addSymbol("$a", STT_NOTYPE, 4, isec); 817 addSymbol("$d", STT_NOTYPE, 12, isec); 818} 819 820void ARMV4PILongBXThunk::writeLong(uint8_t *buf) { 821 const uint8_t data[] = { 822 0x04, 0xc0, 0x9f, 0xe5, // P: ldr ip, [pc,#4] ; L2 823 0x0c, 0xc0, 0x8f, 0xe0, // L1: add ip, pc, ip 824 0x1c, 0xff, 0x2f, 0xe1, // bx ip 825 0x00, 0x00, 0x00, 0x00, // L2: .word S - (P + (L1 - P) + 8) 826 }; 827 uint64_t s = getARMThunkDestVA(destination); 828 uint64_t p = getThunkTargetSym()->getVA() & ~0x1; 829 memcpy(buf, data, sizeof(data)); 830 target->relocateNoSym(buf + 12, R_ARM_REL32, s - p - 12); 831} 832 833void ARMV4PILongBXThunk::addSymbols(ThunkSection &isec) { 834 addSymbol(saver().save("__ARMv4PILongBXThunk_" + destination.getName()), 835 STT_FUNC, 0, isec); 836 addSymbol("$a", STT_NOTYPE, 0, isec); 837 addSymbol("$d", STT_NOTYPE, 12, isec); 838} 839 840void ARMV4PILongThunk::writeLong(uint8_t *buf) { 841 const uint8_t data[] = { 842 0x00, 0xc0, 0x9f, 0xe5, // P: ldr ip, [pc] ; L2 843 0x0c, 0xf0, 0x8f, 0xe0, // L1: add pc, pc, r12 844 0x00, 0x00, 0x00, 0x00, // L2: .word S - (P + (L1 - P) + 8) 845 }; 846 uint64_t s = getARMThunkDestVA(destination); 847 uint64_t p = getThunkTargetSym()->getVA() & ~0x1; 848 memcpy(buf, data, sizeof(data)); 849 target->relocateNoSym(buf + 8, R_ARM_REL32, s - p - 12); 850} 851 852void ARMV4PILongThunk::addSymbols(ThunkSection &isec) { 853 addSymbol(saver().save("__ARMv4PILongThunk_" + destination.getName()), 854 STT_FUNC, 0, isec); 855 addSymbol("$a", STT_NOTYPE, 0, isec); 856 addSymbol("$d", STT_NOTYPE, 8, isec); 857} 858 859void ThumbV4PILongBXThunk::writeLong(uint8_t *buf) { 860 const uint8_t data[] = { 861 0x78, 0x47, // P: bx pc 862 0xfd, 0xe7, // b #-6 ; Arm recommended sequence to follow bx pc 863 0x00, 0xc0, 0x9f, 0xe5, // ldr r12, [pc] ; L2 864 0x0f, 0xf0, 0x8c, 0xe0, // L1: add pc, r12, pc 865 0x00, 0x00, 0x00, 0x00, // L2: .word S - (P + (L1 - P) + 8) 866 }; 867 uint64_t s = getARMThunkDestVA(destination); 868 uint64_t p = getThunkTargetSym()->getVA() & ~0x1; 869 memcpy(buf, data, sizeof(data)); 870 target->relocateNoSym(buf + 12, R_ARM_REL32, s - p - 16); 871} 872 873void ThumbV4PILongBXThunk::addSymbols(ThunkSection &isec) { 874 addSymbol(saver().save("__Thumbv4PILongBXThunk_" + destination.getName()), 875 STT_FUNC, 1, isec); 876 addSymbol("$t", STT_NOTYPE, 0, isec); 877 addSymbol("$a", STT_NOTYPE, 4, isec); 878 addSymbol("$d", STT_NOTYPE, 12, isec); 879} 880 881void ThumbV4PILongThunk::writeLong(uint8_t *buf) { 882 const uint8_t data[] = { 883 0x78, 0x47, // P: bx pc 884 0xfd, 0xe7, // b #-6 ; Arm recommended sequence to follow bx pc 885 0x04, 0xc0, 0x9f, 0xe5, // ldr ip, [pc,#4] ; L2 886 0x0c, 0xc0, 0x8f, 0xe0, // L1: add ip, pc, ip 887 0x1c, 0xff, 0x2f, 0xe1, // bx ip 888 0x00, 0x00, 0x00, 0x00, // L2: .word S - (P + (L1 - P) + 8) 889 }; 890 uint64_t s = getARMThunkDestVA(destination); 891 uint64_t p = getThunkTargetSym()->getVA() & ~0x1; 892 memcpy(buf, data, sizeof(data)); 893 target->relocateNoSym(buf + 16, R_ARM_REL32, s - p - 16); 894} 895 896void ThumbV4PILongThunk::addSymbols(ThunkSection &isec) { 897 addSymbol(saver().save("__Thumbv4PILongThunk_" + destination.getName()), 898 STT_FUNC, 1, isec); 899 addSymbol("$t", STT_NOTYPE, 0, isec); 900 addSymbol("$a", STT_NOTYPE, 4, isec); 901 addSymbol("$d", STT_NOTYPE, 16, isec); 902} 903 904// Write MIPS LA25 thunk code to call PIC function from the non-PIC one. 905void MipsThunk::writeTo(uint8_t *buf) { 906 uint64_t s = destination.getVA(); 907 write32(buf, 0x3c190000); // lui $25, %hi(func) 908 write32(buf + 4, 0x08000000 | (s >> 2)); // j func 909 write32(buf + 8, 0x27390000); // addiu $25, $25, %lo(func) 910 write32(buf + 12, 0x00000000); // nop 911 target->relocateNoSym(buf, R_MIPS_HI16, s); 912 target->relocateNoSym(buf + 8, R_MIPS_LO16, s); 913} 914 915void MipsThunk::addSymbols(ThunkSection &isec) { 916 addSymbol(saver().save("__LA25Thunk_" + destination.getName()), STT_FUNC, 0, 917 isec); 918} 919 920InputSection *MipsThunk::getTargetInputSection() const { 921 auto &dr = cast<Defined>(destination); 922 return dyn_cast<InputSection>(dr.section); 923} 924 925// Write microMIPS R2-R5 LA25 thunk code 926// to call PIC function from the non-PIC one. 927void MicroMipsThunk::writeTo(uint8_t *buf) { 928 uint64_t s = destination.getVA(); 929 write16(buf, 0x41b9); // lui $25, %hi(func) 930 write16(buf + 4, 0xd400); // j func 931 write16(buf + 8, 0x3339); // addiu $25, $25, %lo(func) 932 write16(buf + 12, 0x0c00); // nop 933 target->relocateNoSym(buf, R_MICROMIPS_HI16, s); 934 target->relocateNoSym(buf + 4, R_MICROMIPS_26_S1, s); 935 target->relocateNoSym(buf + 8, R_MICROMIPS_LO16, s); 936} 937 938void MicroMipsThunk::addSymbols(ThunkSection &isec) { 939 Defined *d = 940 addSymbol(saver().save("__microLA25Thunk_" + destination.getName()), 941 STT_FUNC, 0, isec); 942 d->stOther |= STO_MIPS_MICROMIPS; 943} 944 945InputSection *MicroMipsThunk::getTargetInputSection() const { 946 auto &dr = cast<Defined>(destination); 947 return dyn_cast<InputSection>(dr.section); 948} 949 950// Write microMIPS R6 LA25 thunk code 951// to call PIC function from the non-PIC one. 952void MicroMipsR6Thunk::writeTo(uint8_t *buf) { 953 uint64_t s = destination.getVA(); 954 uint64_t p = getThunkTargetSym()->getVA(); 955 write16(buf, 0x1320); // lui $25, %hi(func) 956 write16(buf + 4, 0x3339); // addiu $25, $25, %lo(func) 957 write16(buf + 8, 0x9400); // bc func 958 target->relocateNoSym(buf, R_MICROMIPS_HI16, s); 959 target->relocateNoSym(buf + 4, R_MICROMIPS_LO16, s); 960 target->relocateNoSym(buf + 8, R_MICROMIPS_PC26_S1, s - p - 12); 961} 962 963void MicroMipsR6Thunk::addSymbols(ThunkSection &isec) { 964 Defined *d = 965 addSymbol(saver().save("__microLA25Thunk_" + destination.getName()), 966 STT_FUNC, 0, isec); 967 d->stOther |= STO_MIPS_MICROMIPS; 968} 969 970InputSection *MicroMipsR6Thunk::getTargetInputSection() const { 971 auto &dr = cast<Defined>(destination); 972 return dyn_cast<InputSection>(dr.section); 973} 974 975void elf::writePPC32PltCallStub(uint8_t *buf, uint64_t gotPltVA, 976 const InputFile *file, int64_t addend) { 977 if (!config->isPic) { 978 write32(buf + 0, 0x3d600000 | (gotPltVA + 0x8000) >> 16); // lis r11,ha 979 write32(buf + 4, 0x816b0000 | (uint16_t)gotPltVA); // lwz r11,l(r11) 980 write32(buf + 8, 0x7d6903a6); // mtctr r11 981 write32(buf + 12, 0x4e800420); // bctr 982 return; 983 } 984 uint32_t offset; 985 if (addend >= 0x8000) { 986 // The stub loads an address relative to r30 (.got2+Addend). Addend is 987 // almost always 0x8000. The address of .got2 is different in another object 988 // file, so a stub cannot be shared. 989 offset = gotPltVA - 990 (in.ppc32Got2->getParent()->getVA() + 991 (file->ppc32Got2 ? file->ppc32Got2->outSecOff : 0) + addend); 992 } else { 993 // The stub loads an address relative to _GLOBAL_OFFSET_TABLE_ (which is 994 // currently the address of .got). 995 offset = gotPltVA - in.got->getVA(); 996 } 997 uint16_t ha = (offset + 0x8000) >> 16, l = (uint16_t)offset; 998 if (ha == 0) { 999 write32(buf + 0, 0x817e0000 | l); // lwz r11,l(r30) 1000 write32(buf + 4, 0x7d6903a6); // mtctr r11 1001 write32(buf + 8, 0x4e800420); // bctr 1002 write32(buf + 12, 0x60000000); // nop 1003 } else { 1004 write32(buf + 0, 0x3d7e0000 | ha); // addis r11,r30,ha 1005 write32(buf + 4, 0x816b0000 | l); // lwz r11,l(r11) 1006 write32(buf + 8, 0x7d6903a6); // mtctr r11 1007 write32(buf + 12, 0x4e800420); // bctr 1008 } 1009} 1010 1011void PPC32PltCallStub::writeTo(uint8_t *buf) { 1012 writePPC32PltCallStub(buf, destination.getGotPltVA(), file, addend); 1013} 1014 1015void PPC32PltCallStub::addSymbols(ThunkSection &isec) { 1016 std::string buf; 1017 raw_string_ostream os(buf); 1018 os << format_hex_no_prefix(addend, 8); 1019 if (!config->isPic) 1020 os << ".plt_call32."; 1021 else if (addend >= 0x8000) 1022 os << ".got2.plt_pic32."; 1023 else 1024 os << ".plt_pic32."; 1025 os << destination.getName(); 1026 addSymbol(saver().save(os.str()), STT_FUNC, 0, isec); 1027} 1028 1029bool PPC32PltCallStub::isCompatibleWith(const InputSection &isec, 1030 const Relocation &rel) const { 1031 return !config->isPic || (isec.file == file && rel.addend == addend); 1032} 1033 1034void PPC32LongThunk::addSymbols(ThunkSection &isec) { 1035 addSymbol(saver().save("__LongThunk_" + destination.getName()), STT_FUNC, 0, 1036 isec); 1037} 1038 1039void PPC32LongThunk::writeTo(uint8_t *buf) { 1040 auto ha = [](uint32_t v) -> uint16_t { return (v + 0x8000) >> 16; }; 1041 auto lo = [](uint32_t v) -> uint16_t { return v; }; 1042 uint32_t d = destination.getVA(addend); 1043 if (config->isPic) { 1044 uint32_t off = d - (getThunkTargetSym()->getVA() + 8); 1045 write32(buf + 0, 0x7c0802a6); // mflr r12,0 1046 write32(buf + 4, 0x429f0005); // bcl r20,r31,.+4 1047 write32(buf + 8, 0x7d8802a6); // mtctr r12 1048 write32(buf + 12, 0x3d8c0000 | ha(off)); // addis r12,r12,off@ha 1049 write32(buf + 16, 0x398c0000 | lo(off)); // addi r12,r12,off@l 1050 write32(buf + 20, 0x7c0803a6); // mtlr r0 1051 buf += 24; 1052 } else { 1053 write32(buf + 0, 0x3d800000 | ha(d)); // lis r12,d@ha 1054 write32(buf + 4, 0x398c0000 | lo(d)); // addi r12,r12,d@l 1055 buf += 8; 1056 } 1057 write32(buf + 0, 0x7d8903a6); // mtctr r12 1058 write32(buf + 4, 0x4e800420); // bctr 1059} 1060 1061void elf::writePPC64LoadAndBranch(uint8_t *buf, int64_t offset) { 1062 uint16_t offHa = (offset + 0x8000) >> 16; 1063 uint16_t offLo = offset & 0xffff; 1064 1065 write32(buf + 0, 0x3d820000 | offHa); // addis r12, r2, OffHa 1066 write32(buf + 4, 0xe98c0000 | offLo); // ld r12, OffLo(r12) 1067 write32(buf + 8, 0x7d8903a6); // mtctr r12 1068 write32(buf + 12, 0x4e800420); // bctr 1069} 1070 1071void PPC64PltCallStub::writeTo(uint8_t *buf) { 1072 int64_t offset = destination.getGotPltVA() - getPPC64TocBase(); 1073 // Save the TOC pointer to the save-slot reserved in the call frame. 1074 write32(buf + 0, 0xf8410018); // std r2,24(r1) 1075 writePPC64LoadAndBranch(buf + 4, offset); 1076} 1077 1078void PPC64PltCallStub::addSymbols(ThunkSection &isec) { 1079 Defined *s = addSymbol(saver().save("__plt_" + destination.getName()), 1080 STT_FUNC, 0, isec); 1081 s->needsTocRestore = true; 1082 s->file = destination.file; 1083} 1084 1085bool PPC64PltCallStub::isCompatibleWith(const InputSection &isec, 1086 const Relocation &rel) const { 1087 return rel.type == R_PPC64_REL24 || rel.type == R_PPC64_REL14; 1088} 1089 1090void PPC64R2SaveStub::writeTo(uint8_t *buf) { 1091 const int64_t offset = computeOffset(); 1092 write32(buf + 0, 0xf8410018); // std r2,24(r1) 1093 // The branch offset needs to fit in 26 bits. 1094 if (getMayUseShortThunk()) { 1095 write32(buf + 4, 0x48000000 | (offset & 0x03fffffc)); // b <offset> 1096 } else if (isInt<34>(offset)) { 1097 int nextInstOffset; 1098 uint64_t tocOffset = destination.getVA() - getPPC64TocBase(); 1099 if (tocOffset >> 16 > 0) { 1100 const uint64_t addi = ADDI_R12_TO_R12_NO_DISP | (tocOffset & 0xffff); 1101 const uint64_t addis = 1102 ADDIS_R12_TO_R2_NO_DISP | ((tocOffset >> 16) & 0xffff); 1103 write32(buf + 4, addis); // addis r12, r2 , top of offset 1104 write32(buf + 8, addi); // addi r12, r12, bottom of offset 1105 nextInstOffset = 12; 1106 } else { 1107 const uint64_t addi = ADDI_R12_TO_R2_NO_DISP | (tocOffset & 0xffff); 1108 write32(buf + 4, addi); // addi r12, r2, offset 1109 nextInstOffset = 8; 1110 } 1111 write32(buf + nextInstOffset, MTCTR_R12); // mtctr r12 1112 write32(buf + nextInstOffset + 4, BCTR); // bctr 1113 } else { 1114 in.ppc64LongBranchTarget->addEntry(&destination, addend); 1115 const int64_t offsetFromTOC = 1116 in.ppc64LongBranchTarget->getEntryVA(&destination, addend) - 1117 getPPC64TocBase(); 1118 writePPC64LoadAndBranch(buf + 4, offsetFromTOC); 1119 } 1120} 1121 1122void PPC64R2SaveStub::addSymbols(ThunkSection &isec) { 1123 Defined *s = addSymbol(saver().save("__toc_save_" + destination.getName()), 1124 STT_FUNC, 0, isec); 1125 s->needsTocRestore = true; 1126} 1127 1128bool PPC64R2SaveStub::isCompatibleWith(const InputSection &isec, 1129 const Relocation &rel) const { 1130 return rel.type == R_PPC64_REL24 || rel.type == R_PPC64_REL14; 1131} 1132 1133void PPC64R12SetupStub::writeTo(uint8_t *buf) { 1134 int64_t offset = destination.getVA() - getThunkTargetSym()->getVA(); 1135 if (!isInt<34>(offset)) 1136 reportRangeError(buf, offset, 34, destination, "R12 setup stub offset"); 1137 1138 int nextInstOffset; 1139 if (!config->power10Stubs) { 1140 uint32_t off = destination.getVA(addend) - getThunkTargetSym()->getVA() - 8; 1141 write32(buf + 0, 0x7c0802a6); // mflr r12 1142 write32(buf + 4, 0x429f0005); // bcl 20,31,.+4 1143 write32(buf + 8, 0x7d6802a6); // mflr r11 1144 write32(buf + 12, 0x7d8803a6); // mtlr r12 1145 write32(buf + 16, 0x3d8b0000 | computeHiBits(off));// addis r12,r11,off@ha 1146 write32(buf + 20, 0x398c0000 | (off & 0xffff)); // addi r12,r12,off@l 1147 nextInstOffset = 24; 1148 } else { 1149 uint64_t paddi = PADDI_R12_NO_DISP | (((offset >> 16) & 0x3ffff) << 32) | 1150 (offset & 0xffff); 1151 writePrefixedInstruction(buf + 0, paddi); // paddi r12, 0, func@pcrel, 1 1152 nextInstOffset = 8; 1153 } 1154 write32(buf + nextInstOffset, MTCTR_R12); // mtctr r12 1155 write32(buf + nextInstOffset + 4, BCTR); // bctr 1156} 1157 1158void PPC64R12SetupStub::addSymbols(ThunkSection &isec) { 1159 addSymbol(saver().save("__gep_setup_" + destination.getName()), STT_FUNC, 0, 1160 isec); 1161} 1162 1163bool PPC64R12SetupStub::isCompatibleWith(const InputSection &isec, 1164 const Relocation &rel) const { 1165 return rel.type == R_PPC64_REL24_NOTOC; 1166} 1167 1168void PPC64PCRelPLTStub::writeTo(uint8_t *buf) { 1169 int nextInstOffset = 0; 1170 int64_t offset = destination.getGotPltVA() - getThunkTargetSym()->getVA(); 1171 1172 if (config->power10Stubs) { 1173 if (!isInt<34>(offset)) 1174 reportRangeError(buf, offset, 34, destination, 1175 "PC-relative PLT stub offset"); 1176 const uint64_t pld = PLD_R12_NO_DISP | (((offset >> 16) & 0x3ffff) << 32) | 1177 (offset & 0xffff); 1178 writePrefixedInstruction(buf + 0, pld); // pld r12, func@plt@pcrel 1179 nextInstOffset = 8; 1180 } else { 1181 uint32_t off = destination.getVA(addend) - getThunkTargetSym()->getVA() - 8; 1182 write32(buf + 0, 0x7c0802a6); // mflr r12 1183 write32(buf + 4, 0x429f0005); // bcl 20,31,.+4 1184 write32(buf + 8, 0x7d6802a6); // mflr r11 1185 write32(buf + 12, 0x7d8803a6); // mtlr r12 1186 write32(buf + 16, 0x3d8b0000 | computeHiBits(off)); // addis r12,r11,off@ha 1187 write32(buf + 20, 0x398c0000 | (off & 0xffff)); // addi r12,r12,off@l 1188 nextInstOffset = 24; 1189 } 1190 write32(buf + nextInstOffset, MTCTR_R12); // mtctr r12 1191 write32(buf + nextInstOffset + 4, BCTR); // bctr 1192} 1193 1194void PPC64PCRelPLTStub::addSymbols(ThunkSection &isec) { 1195 addSymbol(saver().save("__plt_pcrel_" + destination.getName()), STT_FUNC, 0, 1196 isec); 1197} 1198 1199bool PPC64PCRelPLTStub::isCompatibleWith(const InputSection &isec, 1200 const Relocation &rel) const { 1201 return rel.type == R_PPC64_REL24_NOTOC; 1202} 1203 1204void PPC64LongBranchThunk::writeTo(uint8_t *buf) { 1205 int64_t offset = in.ppc64LongBranchTarget->getEntryVA(&destination, addend) - 1206 getPPC64TocBase(); 1207 writePPC64LoadAndBranch(buf, offset); 1208} 1209 1210void PPC64LongBranchThunk::addSymbols(ThunkSection &isec) { 1211 addSymbol(saver().save("__long_branch_" + destination.getName()), STT_FUNC, 0, 1212 isec); 1213} 1214 1215bool PPC64LongBranchThunk::isCompatibleWith(const InputSection &isec, 1216 const Relocation &rel) const { 1217 return rel.type == R_PPC64_REL24 || rel.type == R_PPC64_REL14; 1218} 1219 1220Thunk::Thunk(Symbol &d, int64_t a) : destination(d), addend(a), offset(0) { 1221 destination.thunkAccessed = true; 1222} 1223 1224Thunk::~Thunk() = default; 1225 1226static Thunk *addThunkAArch64(RelType type, Symbol &s, int64_t a) { 1227 if (type != R_AARCH64_CALL26 && type != R_AARCH64_JUMP26 && 1228 type != R_AARCH64_PLT32) 1229 fatal("unrecognized relocation type"); 1230 if (config->picThunk) 1231 return make<AArch64ADRPThunk>(s, a); 1232 return make<AArch64ABSLongThunk>(s, a); 1233} 1234 1235// Creates a thunk for long branches or Thumb-ARM interworking. 1236// Arm Architectures v4t does not support Thumb2 technology, and does not 1237// support BLX or LDR Arm/Thumb state switching. This means that 1238// - MOVT and MOVW instructions cannot be used. 1239// - We can't rewrite BL in place to BLX. We will need thunks. 1240// 1241// TODO: use B for short Thumb->Arm thunks instead of LDR (this doesn't work for 1242// Arm->Thumb, as in Arm state no BX PC trick; it doesn't switch state). 1243static Thunk *addThunkArmv4(RelType reloc, Symbol &s, int64_t a) { 1244 bool thumb_target = s.getVA(a) & 1; 1245 1246 switch (reloc) { 1247 case R_ARM_PC24: 1248 case R_ARM_PLT32: 1249 case R_ARM_JUMP24: 1250 case R_ARM_CALL: 1251 if (config->picThunk) { 1252 if (thumb_target) 1253 return make<ARMV4PILongBXThunk>(s, a); 1254 return make<ARMV4PILongThunk>(s, a); 1255 } 1256 if (thumb_target) 1257 return make<ARMV4ABSLongBXThunk>(s, a); 1258 return make<ARMV5LongLdrPcThunk>(s, a); 1259 case R_ARM_THM_CALL: 1260 if (config->picThunk) { 1261 if (thumb_target) 1262 return make<ThumbV4PILongThunk>(s, a); 1263 return make<ThumbV4PILongBXThunk>(s, a); 1264 } 1265 if (thumb_target) 1266 return make<ThumbV4ABSLongThunk>(s, a); 1267 return make<ThumbV4ABSLongBXThunk>(s, a); 1268 } 1269 fatal("relocation " + toString(reloc) + " to " + toString(s) + 1270 " not supported for Armv4 or Armv4T target"); 1271} 1272 1273// Creates a thunk for Thumb-ARM interworking compatible with Armv5 and Armv6. 1274// Arm Architectures v5 and v6 do not support Thumb2 technology. This means that 1275// - MOVT and MOVW instructions cannot be used 1276// - Only Thumb relocation that can generate a Thunk is a BL, this can always 1277// be transformed into a BLX 1278static Thunk *addThunkArmv5v6(RelType reloc, Symbol &s, int64_t a) { 1279 switch (reloc) { 1280 case R_ARM_PC24: 1281 case R_ARM_PLT32: 1282 case R_ARM_JUMP24: 1283 case R_ARM_CALL: 1284 case R_ARM_THM_CALL: 1285 if (config->picThunk) 1286 return make<ARMV4PILongBXThunk>(s, a); 1287 return make<ARMV5LongLdrPcThunk>(s, a); 1288 } 1289 fatal("relocation " + toString(reloc) + " to " + toString(s) + 1290 " not supported for Armv5 or Armv6 targets"); 1291} 1292 1293// Create a thunk for Thumb long branch on V6-M. 1294// Arm Architecture v6-M only supports Thumb instructions. This means 1295// - MOVT and MOVW instructions cannot be used. 1296// - Only a limited number of instructions can access registers r8 and above 1297// - No interworking support is needed (all Thumb). 1298static Thunk *addThunkV6M(RelType reloc, Symbol &s, int64_t a) { 1299 switch (reloc) { 1300 case R_ARM_THM_JUMP19: 1301 case R_ARM_THM_JUMP24: 1302 case R_ARM_THM_CALL: 1303 if (config->isPic) 1304 return make<ThumbV6MPILongThunk>(s, a); 1305 return make<ThumbV6MABSLongThunk>(s, a); 1306 } 1307 fatal("relocation " + toString(reloc) + " to " + toString(s) + 1308 " not supported for Armv6-M targets"); 1309} 1310 1311// Creates a thunk for Thumb-ARM interworking or branch range extension. 1312static Thunk *addThunkArm(RelType reloc, Symbol &s, int64_t a) { 1313 // Decide which Thunk is needed based on: 1314 // Available instruction set 1315 // - An Arm Thunk can only be used if Arm state is available. 1316 // - A Thumb Thunk can only be used if Thumb state is available. 1317 // - Can only use a Thunk if it uses instructions that the Target supports. 1318 // Relocation is branch or branch and link 1319 // - Branch instructions cannot change state, can only select Thunk that 1320 // starts in the same state as the caller. 1321 // - Branch and link relocations can change state, can select Thunks from 1322 // either Arm or Thumb. 1323 // Position independent Thunks if we require position independent code. 1324 1325 // Handle architectures that have restrictions on the instructions that they 1326 // can use in Thunks. The flags below are set by reading the BuildAttributes 1327 // of the input objects. InputFiles.cpp contains the mapping from ARM 1328 // architecture to flag. 1329 if (!config->armHasMovtMovw) { 1330 if (config->armJ1J2BranchEncoding) 1331 return addThunkV6M(reloc, s, a); 1332 if (config->armHasBlx) 1333 return addThunkArmv5v6(reloc, s, a); 1334 return addThunkArmv4(reloc, s, a); 1335 } 1336 1337 switch (reloc) { 1338 case R_ARM_PC24: 1339 case R_ARM_PLT32: 1340 case R_ARM_JUMP24: 1341 case R_ARM_CALL: 1342 if (config->picThunk) 1343 return make<ARMV7PILongThunk>(s, a); 1344 return make<ARMV7ABSLongThunk>(s, a); 1345 case R_ARM_THM_JUMP19: 1346 case R_ARM_THM_JUMP24: 1347 case R_ARM_THM_CALL: 1348 if (config->picThunk) 1349 return make<ThumbV7PILongThunk>(s, a); 1350 return make<ThumbV7ABSLongThunk>(s, a); 1351 } 1352 fatal("unrecognized relocation type"); 1353} 1354 1355static Thunk *addThunkMips(RelType type, Symbol &s) { 1356 if ((s.stOther & STO_MIPS_MICROMIPS) && isMipsR6()) 1357 return make<MicroMipsR6Thunk>(s); 1358 if (s.stOther & STO_MIPS_MICROMIPS) 1359 return make<MicroMipsThunk>(s); 1360 return make<MipsThunk>(s); 1361} 1362 1363static Thunk *addThunkPPC32(const InputSection &isec, const Relocation &rel, 1364 Symbol &s) { 1365 assert((rel.type == R_PPC_LOCAL24PC || rel.type == R_PPC_REL24 || 1366 rel.type == R_PPC_PLTREL24) && 1367 "unexpected relocation type for thunk"); 1368 if (s.isInPlt()) 1369 return make<PPC32PltCallStub>(isec, rel, s); 1370 return make<PPC32LongThunk>(s, rel.addend); 1371} 1372 1373static Thunk *addThunkPPC64(RelType type, Symbol &s, int64_t a) { 1374 assert((type == R_PPC64_REL14 || type == R_PPC64_REL24 || 1375 type == R_PPC64_REL24_NOTOC) && 1376 "unexpected relocation type for thunk"); 1377 if (s.isInPlt()) 1378 return type == R_PPC64_REL24_NOTOC ? (Thunk *)make<PPC64PCRelPLTStub>(s) 1379 : (Thunk *)make<PPC64PltCallStub>(s); 1380 1381 // This check looks at the st_other bits of the callee. If the value is 1 1382 // then the callee clobbers the TOC and we need an R2 save stub when RelType 1383 // is R_PPC64_REL14 or R_PPC64_REL24. 1384 if ((type == R_PPC64_REL14 || type == R_PPC64_REL24) && (s.stOther >> 5) == 1) 1385 return make<PPC64R2SaveStub>(s, a); 1386 1387 if (type == R_PPC64_REL24_NOTOC) 1388 return make<PPC64R12SetupStub>(s); 1389 1390 if (config->picThunk) 1391 return make<PPC64PILongBranchThunk>(s, a); 1392 1393 return make<PPC64PDLongBranchThunk>(s, a); 1394} 1395 1396Thunk *elf::addThunk(const InputSection &isec, Relocation &rel) { 1397 Symbol &s = *rel.sym; 1398 int64_t a = rel.addend; 1399 1400 if (config->emachine == EM_AARCH64) 1401 return addThunkAArch64(rel.type, s, a); 1402 1403 if (config->emachine == EM_ARM) 1404 return addThunkArm(rel.type, s, a); 1405 1406 if (config->emachine == EM_MIPS) 1407 return addThunkMips(rel.type, s); 1408 1409 if (config->emachine == EM_PPC) 1410 return addThunkPPC32(isec, rel, s); 1411 1412 if (config->emachine == EM_PPC64) 1413 return addThunkPPC64(rel.type, s, a); 1414 1415 llvm_unreachable("add Thunk only supported for ARM, Mips and PowerPC"); 1416} 1417