1/* 2 * wm8955.c -- WM8955 ALSA SoC audio driver 3 * 4 * Copyright 5 * 6 * Author: 7 * 8 * Based on WM8750.c 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15#include <linux/module.h> 16#include <linux/moduleparam.h> 17#include <linux/init.h> 18#include <linux/delay.h> 19#include <linux/pm.h> 20#include <linux/i2c.h> 21#include <linux/platform_device.h> 22#include <sound/driver.h> 23#include <sound/core.h> 24#include <sound/pcm.h> 25#include <sound/pcm_params.h> 26#include <sound/soc.h> 27#include <sound/soc-dapm.h> 28#include <sound/initval.h> 29 30#include "wm8955.h" 31 32#define AUDIO_NAME "WM8955" 33#define WM8955_VERSION "0.12" 34 35/* 36 * Debug 37 */ 38 39#define WM8955_DEBUG 0 40 41#if WM8955_DEBUG 42#define dbg(format, arg...) \ 43 printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg) 44#else 45#define dbg(format, arg...) do {} while (0) 46#endif 47#define err(format, arg...) \ 48 printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg) 49#define info(format, arg...) \ 50 printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg) 51#define warn(format, arg...) \ 52 printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg) 53 54/* codec private data */ 55struct wm8955_priv { 56 unsigned int sysclk; 57}; 58 59/* 60 * wm8955 register cache 61 * We can't read the WM8955 register space when we 62 * are using 2 wire for device control, so we cache them instead. 63 */ 64static const u16 wm8955_reg[] = { 65 0x0000, 0x0000, 0x0079, 0x0079, /* 0 */ 66 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */ 67 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */ 68 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */ 69 0x0000, 0x0000, 0x0000, 0x0000, /* 16 */ 70 0x0000, 0x0000, 0x0000, 0x00c1, /* 20 */ 71 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */ 72 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */ 73 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */ 74 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */ 75 0x0079, 0x0079, 0x0079, 0x0000, /* 40 */ 76 0x0103, 0x0024, 0x01ba, 0x0000, /* 44 */ 77}; 78 79/* 80 * read wm8955 register cache 81 */ 82static inline unsigned int wm8955_read_reg_cache(struct snd_soc_codec *codec, 83 unsigned int reg) 84{ 85 u16 *cache = codec->reg_cache; 86 if (reg > WM8955_CACHE_REGNUM) 87 return -1; 88 return cache[reg]; 89} 90 91/* 92 * write wm8955 register cache 93 */ 94static inline void wm8955_write_reg_cache(struct snd_soc_codec *codec, 95 unsigned int reg, unsigned int value) 96{ 97 u16 *cache = codec->reg_cache; 98 if (reg > WM8955_CACHE_REGNUM) 99 return; 100 cache[reg] = value; 101} 102 103static int wm8955_write(struct snd_soc_codec *codec, unsigned int reg, 104 unsigned int value) 105{ 106 u8 data[2]; 107 108 /* data is 109 * D15..D9 WM8955 register offset 110 * D8...D0 register data 111 */ 112 data[0] = (reg << 1) | ((value >> 8) & 0x0001); 113 data[1] = value & 0x00ff; 114 115 wm8955_write_reg_cache (codec, reg, value); 116 if (codec->hw_write(codec->control_data, data, 2) == 2) 117 return 0; 118 else 119 return -EIO; 120} 121 122#define wm8955_reset(c) wm8955_write(c, WM8955_RESET, 0) 123 124/* 125 * WM8955 Controls 126 */ 127static const char *wm8955_bass[] = {"Linear Control", "Adaptive Boost"}; 128static const char *wm8955_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" }; 129static const char *wm8955_treble[] = {"8kHz", "4kHz"}; 130static const char *wm8955_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA", 131 "Differential"}; 132static const char *wm8955_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut", 133 "ROUT1"}; 134static const char *wm8955_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; 135 136static const struct soc_enum wm8955_enum[] = { 137SOC_ENUM_SINGLE(WM8955_BASS, 7, 2, wm8955_bass), 138SOC_ENUM_SINGLE(WM8955_BASS, 6, 2, wm8955_bass_filter), 139SOC_ENUM_SINGLE(WM8955_TREBLE, 6, 2, wm8955_treble), 140SOC_ENUM_SINGLE(WM8955_LOUTM1, 0, 5, wm8955_line_mux), 141SOC_ENUM_SINGLE(WM8955_ROUTM1, 0, 5, wm8955_line_mux), 142SOC_ENUM_SINGLE(WM8955_ADCTL2, 7, 4, wm8955_out3), 143SOC_ENUM_SINGLE(WM8955_DACCTL, 1, 4, wm8955_deemph), 144}; 145 146static const struct snd_kcontrol_new wm8955_snd_controls[] = { 147 148SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8955_LOUT1V, 149 WM8955_ROUT1V, 7, 1, 0), 150SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8955_LOUT2V, 151 WM8955_ROUT2V, 7, 1, 0), 152 153SOC_ENUM("Playback De-emphasis", wm8955_enum[6]), 154 155SOC_SINGLE("Playback 6dB Attenuate", WM8955_DACCTL, 7, 1, 0), 156 157SOC_DOUBLE_R("PCM Volume", WM8955_LDAC, WM8955_RDAC, 0, 255, 0), 158 159SOC_ENUM("Bass Boost", wm8955_enum[0]), 160SOC_ENUM("Bass Filter", wm8955_enum[1]), 161SOC_SINGLE("Bass Volume", WM8955_BASS, 0, 15, 1), 162 163SOC_SINGLE("Treble Volume", WM8955_TREBLE, 0, 15, 0), 164SOC_ENUM("Treble Cut-off", wm8955_enum[2]), 165 166SOC_SINGLE("ZC Timeout Switch", WM8955_ADCTL1, 0, 1, 0), 167SOC_SINGLE("Playback Invert Switch", WM8955_ADCTL1, 1, 1, 0), 168 169SOC_SINGLE("Right Speaker Playback Invert Switch", WM8955_ADCTL2, 4, 1, 0), 170 171/* Unimplemented */ 172/* ADCTL1 Bit 4,5 - DMONOMIX */ 173/* ADCTL1 Bit 6,7 - VSEL */ 174/* ADCTL2 Bit 3 - HPSWZC */ 175/* ADCTL3 Bit 6 - VROI */ 176 177SOC_DOUBLE_R("Bypass Left Playback Volume", WM8955_LOUTM1, 178 WM8955_LOUTM2, 4, 7, 1), 179SOC_DOUBLE_R("Bypass Right Playback Volume", WM8955_ROUTM1, 180 WM8955_ROUTM2, 4, 7, 1), 181SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8955_MOUTM1, 182 WM8955_MOUTM2, 4, 7, 1), 183 184SOC_SINGLE("Mono Playback ZC Switch", WM8955_MOUTV, 7, 1, 0), 185 186SOC_DOUBLE_R("Headphone Playback Volume", WM8955_LOUT1V, WM8955_ROUT1V, 187 0, 127, 0), 188SOC_DOUBLE_R("Speaker Playback Volume", WM8955_LOUT2V, WM8955_ROUT2V, 189 0, 127, 0), 190 191SOC_SINGLE("Mono Playback Volume", WM8955_MOUTV, 0, 127, 0), 192 193}; 194 195/* add non dapm controls */ 196static int wm8955_add_controls(struct snd_soc_codec *codec) 197{ 198 int err, i; 199 200 for (i = 0; i < ARRAY_SIZE(wm8955_snd_controls); i++) { 201 err = snd_ctl_add(codec->card, 202 snd_soc_cnew(&wm8955_snd_controls[i],codec, NULL)); 203 if (err < 0) 204 return err; 205 } 206 return 0; 207} 208 209/* 210 * DAPM Controls 211 */ 212 213/* Left Mixer */ 214static const struct snd_kcontrol_new wm8955_left_mixer_controls[] = { 215SOC_DAPM_SINGLE("Playback Switch", WM8955_LOUTM1, 8, 1, 0), 216SOC_DAPM_SINGLE("Left Bypass Switch", WM8955_LOUTM1, 7, 1, 0), 217SOC_DAPM_SINGLE("Right Playback Switch", WM8955_LOUTM2, 8, 1, 0), 218SOC_DAPM_SINGLE("Right Bypass Switch", WM8955_LOUTM2, 7, 1, 0), 219}; 220 221/* Right Mixer */ 222static const struct snd_kcontrol_new wm8955_right_mixer_controls[] = { 223SOC_DAPM_SINGLE("Left Playback Switch", WM8955_ROUTM1, 8, 1, 0), 224SOC_DAPM_SINGLE("Left Bypass Switch", WM8955_ROUTM1, 7, 1, 0), 225SOC_DAPM_SINGLE("Playback Switch", WM8955_ROUTM2, 8, 1, 0), 226SOC_DAPM_SINGLE("Right Bypass Switch", WM8955_ROUTM2, 7, 1, 0), 227}; 228 229/* Mono Mixer */ 230static const struct snd_kcontrol_new wm8955_mono_mixer_controls[] = { 231SOC_DAPM_SINGLE("Left Playback Switch", WM8955_MOUTM1, 8, 1, 0), 232SOC_DAPM_SINGLE("Left Bypass Switch", WM8955_MOUTM1, 7, 1, 0), 233SOC_DAPM_SINGLE("Right Playback Switch", WM8955_MOUTM2, 8, 1, 0), 234SOC_DAPM_SINGLE("Right Bypass Switch", WM8955_MOUTM2, 7, 1, 0), 235}; 236 237/* Left Line Mux */ 238static const struct snd_kcontrol_new wm8955_left_line_controls = 239SOC_DAPM_ENUM("Route", wm8955_enum[3]); 240 241/* Right Line Mux */ 242static const struct snd_kcontrol_new wm8955_right_line_controls = 243SOC_DAPM_ENUM("Route", wm8955_enum[4]); 244 245/* Out 3 Mux */ 246static const struct snd_kcontrol_new wm8955_out3_controls = 247SOC_DAPM_ENUM("Route", wm8955_enum[5]); 248 249static const struct snd_soc_dapm_widget wm8955_dapm_widgets[] = { 250 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0, 251 &wm8955_left_mixer_controls[0], 252 ARRAY_SIZE(wm8955_left_mixer_controls)), 253 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0, 254 &wm8955_right_mixer_controls[0], 255 ARRAY_SIZE(wm8955_right_mixer_controls)), 256 SND_SOC_DAPM_MIXER("Mono Mixer", WM8955_PWR2, 2, 0, 257 &wm8955_mono_mixer_controls[0], 258 ARRAY_SIZE(wm8955_mono_mixer_controls)), 259 260 SND_SOC_DAPM_PGA("Right Out 2", WM8955_PWR2, 3, 0, NULL, 0), 261 SND_SOC_DAPM_PGA("Left Out 2", WM8955_PWR2, 4, 0, NULL, 0), 262 SND_SOC_DAPM_PGA("Right Out 1", WM8955_PWR2, 5, 0, NULL, 0), 263 SND_SOC_DAPM_PGA("Left Out 1", WM8955_PWR2, 6, 0, NULL, 0), 264 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8955_PWR2, 7, 0), 265 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8955_PWR2, 8, 0), 266 267 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8955_PWR1, 1, 0), 268 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8955_PWR1, 2, 0), 269 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8955_PWR1, 3, 0), 270 271 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0, 272 &wm8955_left_line_controls), 273 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0, 274 &wm8955_right_line_controls), 275 276 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8955_out3_controls), 277 SND_SOC_DAPM_PGA("Out 3", WM8955_PWR2, 1, 0, NULL, 0), 278 SND_SOC_DAPM_PGA("Mono Out 1", WM8955_PWR2, 2, 0, NULL, 0), 279 280 SND_SOC_DAPM_OUTPUT("LOUT1"), 281 SND_SOC_DAPM_OUTPUT("ROUT1"), 282 SND_SOC_DAPM_OUTPUT("LOUT2"), 283 SND_SOC_DAPM_OUTPUT("ROUT2"), 284 SND_SOC_DAPM_OUTPUT("MONO"), 285 SND_SOC_DAPM_OUTPUT("OUT3"), 286 287 SND_SOC_DAPM_INPUT("LINPUT1"), 288 SND_SOC_DAPM_INPUT("LINPUT2"), 289 SND_SOC_DAPM_INPUT("LINPUT3"), 290 SND_SOC_DAPM_INPUT("RINPUT1"), 291 SND_SOC_DAPM_INPUT("RINPUT2"), 292 SND_SOC_DAPM_INPUT("RINPUT3"), 293}; 294 295static const char *audio_map[][3] = { 296 /* left mixer */ 297 {"Left Mixer", "Playback Switch", "Left DAC"}, 298 {"Left Mixer", "Left Bypass Switch", "Left Line Mux"}, 299 {"Left Mixer", "Right Playback Switch", "Right DAC"}, 300 {"Left Mixer", "Right Bypass Switch", "Right Line Mux"}, 301 302 /* right mixer */ 303 {"Right Mixer", "Left Playback Switch", "Left DAC"}, 304 {"Right Mixer", "Left Bypass Switch", "Left Line Mux"}, 305 {"Right Mixer", "Playback Switch", "Right DAC"}, 306 {"Right Mixer", "Right Bypass Switch", "Right Line Mux"}, 307 308 /* left out 1 */ 309 {"Left Out 1", NULL, "Left Mixer"}, 310 {"LOUT1", NULL, "Left Out 1"}, 311 312 /* left out 2 */ 313 {"Left Out 2", NULL, "Left Mixer"}, 314 {"LOUT2", NULL, "Left Out 2"}, 315 316 /* right out 1 */ 317 {"Right Out 1", NULL, "Right Mixer"}, 318 {"ROUT1", NULL, "Right Out 1"}, 319 320 /* right out 2 */ 321 {"Right Out 2", NULL, "Right Mixer"}, 322 {"ROUT2", NULL, "Right Out 2"}, 323 324 /* mono mixer */ 325 {"Mono Mixer", "Left Playback Switch", "Left DAC"}, 326 {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"}, 327 {"Mono Mixer", "Right Playback Switch", "Right DAC"}, 328 {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"}, 329 330 /* mono out */ 331 {"Mono Out 1", NULL, "Mono Mixer"}, 332 {"MONO1", NULL, "Mono Out 1"}, 333 334 /* out 3 */ 335 {"Out3 Mux", "VREF", "VREF"}, 336 {"Out3 Mux", "ROUT1 + Vol", "ROUT1"}, 337 {"Out3 Mux", "ROUT1", "Right Mixer"}, 338 {"Out3 Mux", "MonoOut", "MONO1"}, 339 {"Out 3", NULL, "Out3 Mux"}, 340 {"OUT3", NULL, "Out 3"}, 341 342 /* Left Line Mux */ 343 {"Left Line Mux", "Line 1", "LINPUT1"}, 344 {"Left Line Mux", "Line 2", "LINPUT2"}, 345 {"Left Line Mux", "Line 3", "LINPUT3"}, 346 {"Left Line Mux", "PGA", "Left PGA Mux"}, 347 {"Left Line Mux", "Differential", "Differential Mux"}, 348 349 /* Right Line Mux */ 350 {"Right Line Mux", "Line 1", "RINPUT1"}, 351 {"Right Line Mux", "Line 2", "RINPUT2"}, 352 {"Right Line Mux", "Line 3", "RINPUT3"}, 353 {"Right Line Mux", "PGA", "Right PGA Mux"}, 354 {"Right Line Mux", "Differential", "Differential Mux"}, 355 356 /* Left PGA Mux */ 357 {"Left PGA Mux", "Line 1", "LINPUT1"}, 358 {"Left PGA Mux", "Line 2", "LINPUT2"}, 359 {"Left PGA Mux", "Line 3", "LINPUT3"}, 360 {"Left PGA Mux", "Differential", "Differential Mux"}, 361 362 /* Right PGA Mux */ 363 {"Right PGA Mux", "Line 1", "RINPUT1"}, 364 {"Right PGA Mux", "Line 2", "RINPUT2"}, 365 {"Right PGA Mux", "Line 3", "RINPUT3"}, 366 {"Right PGA Mux", "Differential", "Differential Mux"}, 367 368 /* Differential Mux */ 369 {"Differential Mux", "Line 1", "LINPUT1"}, 370 {"Differential Mux", "Line 1", "RINPUT1"}, 371 {"Differential Mux", "Line 2", "LINPUT2"}, 372 {"Differential Mux", "Line 2", "RINPUT2"}, 373 374 /* Left ADC Mux */ 375 {"Left ADC Mux", "Stereo", "Left PGA Mux"}, 376 {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"}, 377 {"Left ADC Mux", "Digital Mono", "Left PGA Mux"}, 378 379 /* Right ADC Mux */ 380 {"Right ADC Mux", "Stereo", "Right PGA Mux"}, 381 {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"}, 382 {"Right ADC Mux", "Digital Mono", "Right PGA Mux"}, 383 384 /* ADC */ 385 {"Left ADC", NULL, "Left ADC Mux"}, 386 {"Right ADC", NULL, "Right ADC Mux"}, 387 388 /* terminator */ 389 {NULL, NULL, NULL}, 390}; 391 392static int wm8955_add_widgets(struct snd_soc_codec *codec) 393{ 394 int i; 395 396 for(i = 0; i < ARRAY_SIZE(wm8955_dapm_widgets); i++) { 397 snd_soc_dapm_new_control(codec, &wm8955_dapm_widgets[i]); 398 } 399 400 /* set up audio path audio_mapnects */ 401 for(i = 0; audio_map[i][0] != NULL; i++) { 402 snd_soc_dapm_connect_input(codec, audio_map[i][0], 403 audio_map[i][1], audio_map[i][2]); 404 } 405 406 snd_soc_dapm_new_widgets(codec); 407 return 0; 408} 409 410/* PLL divisors */ 411struct _pll_div { 412 u32 div2:1; 413 u32 n:4; 414 u32 k:24; 415}; 416 417/* The size in bits of the pll divide multiplied by 10 418 * to allow rounding later */ 419#define FIXED_PLL_SIZE ((1 << 22) * 10) 420 421static void pll_factors(struct _pll_div *pll_div, unsigned int target, 422 unsigned int source) 423{ 424 u64 Kpart; 425 unsigned int K, Ndiv, Nmod; 426 427 Ndiv = target / source; 428 if (Ndiv < 6) { 429 source >>= 1; 430 pll_div->div2 = 1; 431 Ndiv = target / source; 432 } else 433 pll_div->div2 = 0; 434 435 if ((Ndiv < 6) || (Ndiv > 12)) 436 printk(KERN_WARNING 437 "WM8955 N value outwith recommended range! N = %d\n",Ndiv); 438 439 pll_div->n = Ndiv; 440 Nmod = target % source; 441 Kpart = FIXED_PLL_SIZE * (long long)Nmod; 442 443 do_div(Kpart, source); 444 445 K = Kpart & 0xFFFFFFFF; 446 447 /* Check if we need to round */ 448 if ((K % 10) >= 5) 449 K += 5; 450 451 /* Move down to proper range now rounding is done */ 452 K /= 10; 453 454 pll_div->k = K; 455} 456 457static int wm8955_set_dai_pll(struct snd_soc_codec_dai *codec_dai, 458 int pll_id, unsigned int freq_in, unsigned int freq_out) 459{ 460 u16 reg, enable = 0x1F8; 461 struct snd_soc_codec *codec = codec_dai->codec; 462 463 /* read and mask off PLLEN bit */ 464 reg = wm8955_read_reg_cache(codec, WM8955_CLOCK) & 0xfff7; 465 466 if (!freq_in || !freq_out) { 467 /* disable PLL */ 468 wm8955_write(codec, WM8955_CLOCK, reg); 469 return 0; 470 } else { 471 u16 value = 0; 472 struct _pll_div pll_div; 473 474 pll_factors(&pll_div, freq_out * 8, freq_in); 475 476 /* set up N and K PLL divisor ratios */ 477 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */ 478 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18); 479 wm8955_write(codec, WM8955_PLLCTL1, value); 480 481 /* bits 8:0 = PLL_K[17:9] */ 482 value = (pll_div.k & 0x03fe00) >> 9; 483 wm8955_write(codec, WM8955_PLLCTL2, value); 484 485 /* bits 8:0 = PLL_K[8:0] */ 486 value = pll_div.k & 0x0001ff; 487 wm8955_write(codec, WM8955_PLLCTL3, value); 488 489 /* use fractional "K" */ 490 wm8955_write(codec, WM8955_PLLCTL4, 0x80); 491 492 /* Enable the PLL */ 493 enable |= (pll_div.div2 << 5); 494 wm8955_write(codec, WM8955_CLOCK, reg | enable); 495 } 496 return 0; 497} 498 499struct _coeff_div { 500 u32 mclk; 501 u32 rate; 502 u16 fs; 503 u8 sr:5; 504 u8 usb:1; 505}; 506 507/* codec hifi mclk clock divider coefficients */ 508static const struct _coeff_div coeff_div[] = { 509 /* 8k */ 510 {12288000, 8000, 1536, 0x2, 0x0}, 511 {11289600, 8000, 1408, 0x12, 0x0}, 512 {18432000, 8000, 2304, 0x3, 0x0}, 513 {16934400, 8000, 2112, 0x13, 0x0}, 514 {12000000, 8000, 1500, 0x2, 0x1}, 515 516 /* 11.025k */ 517 {11289600, 11025, 1024, 0x18, 0x0}, 518 {16934400, 11025, 1536, 0x19, 0x0}, 519 {12000000, 11025, 1088, 0x19, 0x1}, 520 521 /* 16k */ 522 {12288000, 16000, 768, 0xa, 0x0}, 523 {18432000, 16000, 1152, 0xb, 0x0}, 524 {12000000, 16000, 750, 0xa, 0x1}, 525 526 /* 22.05k */ 527 {11289600, 22050, 512, 0x1a, 0x0}, 528 {16934400, 22050, 768, 0x1b, 0x0}, 529 {12000000, 22050, 544, 0x1b, 0x1}, 530 531 /* 32k */ 532 {12288000, 32000, 384, 0xc, 0x0}, 533 {18432000, 32000, 576, 0xd, 0x0}, 534 {12000000, 32000, 375, 0xc, 0x1}, 535 536 /* 44.1k */ 537 {11289600, 44100, 256, 0x10, 0x0}, 538 {16934400, 44100, 384, 0x11, 0x0}, 539 {12000000, 44100, 272, 0x11, 0x1}, 540 541 /* 48k */ 542 {12288000, 48000, 256, 0x0, 0x0}, 543 {18432000, 48000, 384, 0x1, 0x0}, 544 {12000000, 48000, 250, 0x0, 0x1}, 545 546 /* 88.2k */ 547 {11289600, 88200, 128, 0x1e, 0x0}, 548 {16934400, 88200, 192, 0x1f, 0x0}, 549 {12000000, 88200, 136, 0x1f, 0x1}, 550 551 /* 96k */ 552 {12288000, 96000, 128, 0xe, 0x0}, 553 {18432000, 96000, 192, 0xf, 0x0}, 554 {12000000, 96000, 125, 0xe, 0x1}, 555}; 556 557static inline int get_coeff(int mclk, int rate) 558{ 559 int i; 560 561 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 562 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) 563 return i; 564 } 565 566 printk(KERN_ERR "wm8955: could not get coeff for mclk %d @ rate %d\n", 567 mclk, rate); 568 return -EINVAL; 569} 570 571static int wm8955_set_dai_sysclk(struct snd_soc_codec_dai *codec_dai, 572 int clk_id, unsigned int freq, int dir) 573{ 574 struct snd_soc_codec *codec = codec_dai->codec; 575 struct wm8955_priv *wm8955 = codec->private_data; 576 577 switch (freq) { 578 case 11289600: 579 case 12000000: 580 case 12288000: 581 case 16934400: 582 case 18432000: 583 wm8955->sysclk = freq; 584 return 0; 585 } 586 return -EINVAL; 587} 588 589static int wm8955_set_dai_fmt(struct snd_soc_codec_dai *codec_dai, 590 unsigned int fmt) 591{ 592 struct snd_soc_codec *codec = codec_dai->codec; 593 u16 iface = 0; 594 595 /* set master/slave audio interface */ 596 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 597 case SND_SOC_DAIFMT_CBM_CFM: 598 iface = 0x0040; 599 break; 600 case SND_SOC_DAIFMT_CBS_CFS: 601 break; 602 default: 603 return -EINVAL; 604 } 605 606 /* interface format */ 607 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 608 case SND_SOC_DAIFMT_I2S: 609 iface |= 0x0002; 610 break; 611 case SND_SOC_DAIFMT_RIGHT_J: 612 break; 613 case SND_SOC_DAIFMT_LEFT_J: 614 iface |= 0x0001; 615 break; 616 case SND_SOC_DAIFMT_DSP_A: 617 iface |= 0x0003; 618 break; 619 case SND_SOC_DAIFMT_DSP_B: 620 iface |= 0x0013; 621 break; 622 default: 623 return -EINVAL; 624 } 625 626 /* clock inversion */ 627 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 628 case SND_SOC_DAIFMT_NB_NF: 629 break; 630 case SND_SOC_DAIFMT_IB_IF: 631 iface |= 0x0090; 632 break; 633 case SND_SOC_DAIFMT_IB_NF: 634 iface |= 0x0080; 635 break; 636 case SND_SOC_DAIFMT_NB_IF: 637 iface |= 0x0010; 638 break; 639 default: 640 return -EINVAL; 641 } 642 643 wm8955_write(codec, WM8955_IFACE, iface); 644 return 0; 645} 646 647static int wm8955_pcm_hw_params(struct snd_pcm_substream *substream, 648 struct snd_pcm_hw_params *params) 649{ 650 struct snd_soc_pcm_runtime *rtd = substream->private_data; 651 struct snd_soc_device *socdev = rtd->socdev; 652 struct snd_soc_codec *codec = socdev->codec; 653 struct wm8955_priv *wm8955 = codec->private_data; 654 u16 iface = wm8955_read_reg_cache(codec, WM8955_IFACE) & 0x1f3; 655 u16 srate = wm8955_read_reg_cache(codec, WM8955_SRATE) & 0x1c0; 656 int coeff = get_coeff(wm8955->sysclk, params_rate(params)); 657 658 /* bit size */ 659 switch (params_format(params)) { 660 case SNDRV_PCM_FORMAT_S16_LE: 661 break; 662 case SNDRV_PCM_FORMAT_S20_3LE: 663 iface |= 0x0004; 664 break; 665 case SNDRV_PCM_FORMAT_S24_LE: 666 iface |= 0x0008; 667 break; 668 case SNDRV_PCM_FORMAT_S32_LE: 669 iface |= 0x000c; 670 break; 671 } 672 673 /* set iface & srate */ 674 wm8955_write(codec, WM8955_IFACE, iface); 675 if (coeff >= 0) 676 677 wm8955_write(codec, WM8955_SRATE, srate | 678 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb | 0x40); 679 680 return 0; 681} 682 683static int wm8955_mute(struct snd_soc_codec_dai *dai, int mute) 684{ 685 struct snd_soc_codec *codec = dai->codec; 686 u16 mute_reg = wm8955_read_reg_cache(codec, WM8955_DACCTL) & 0xfff7; 687 688 if (mute) 689 wm8955_write(codec, WM8955_DACCTL, mute_reg | 0x8); 690 else 691 wm8955_write(codec, WM8955_DACCTL, mute_reg); 692 return 0; 693} 694 695static int wm8955_dapm_event(struct snd_soc_codec *codec, int event) 696{ 697 u16 pwr_reg = wm8955_read_reg_cache(codec, WM8955_PWR1) & 0xfe3e; 698 699 switch (event) { 700 case SNDRV_CTL_POWER_D0: /* full On */ 701 /* Turn On LDAC/RDAC, LOUT2/ROUT2 */ 702 wm8955_write(codec, WM8955_PWR2, 0x198); 703 /* set vmid to 50k and unmute dac */ 704 wm8955_write(codec, WM8955_PWR1, pwr_reg | 0x00c0); 705 break; 706 case SNDRV_CTL_POWER_D1: /* partial On */ 707 case SNDRV_CTL_POWER_D2: /* partial On */ 708 /* set vmid to 5k for quick power up */ 709 wm8955_write(codec, WM8955_PWR1, pwr_reg | 0x01c1); 710 break; 711 case SNDRV_CTL_POWER_D3hot: /* Off, with power */ 712 /* mute dac and set vmid to 500k, enable VREF */ 713 wm8955_write(codec, WM8955_PWR1, pwr_reg | 0x0141); 714 break; 715 case SNDRV_CTL_POWER_D3cold: /* Off, without power */ 716 wm8955_write(codec, WM8955_PWR1, 0x0001); 717 wm8955_write(codec, WM8955_PWR2, 0x0); 718 break; 719 } 720 codec->dapm_state = event; 721 return 0; 722} 723 724#define WM8955_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 725 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ 726 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) 727 728#define WM8955_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 729 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 730 731struct snd_soc_codec_dai wm8955_dai = { 732 .name = "WM8955", 733 .playback = { 734 .stream_name = "Playback", 735 .channels_min = 1, 736 .channels_max = 2, 737 .rates = WM8955_RATES, 738 .formats = WM8955_FORMATS,}, 739 .capture = { 740 .stream_name = "Capture", 741 .channels_min = 1, 742 .channels_max = 2, 743 .rates = WM8955_RATES, 744 .formats = WM8955_FORMATS,}, 745 .ops = { 746 .hw_params = wm8955_pcm_hw_params, 747 }, 748 .dai_ops = { 749 .digital_mute = wm8955_mute, 750 .set_fmt = wm8955_set_dai_fmt, 751 .set_pll = wm8955_set_dai_pll, 752 .set_sysclk = wm8955_set_dai_sysclk, 753 }, 754}; 755EXPORT_SYMBOL_GPL(wm8955_dai); 756 757static void wm8955_work(struct work_struct *work) 758{ 759 struct snd_soc_codec *codec = 760 container_of(work, struct snd_soc_codec, delayed_work.work); 761 wm8955_dapm_event(codec, codec->dapm_state); 762} 763 764static int wm8955_suspend(struct platform_device *pdev, pm_message_t state) 765{ 766 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 767 struct snd_soc_codec *codec = socdev->codec; 768 769 wm8955_dapm_event(codec, SNDRV_CTL_POWER_D3cold); 770 return 0; 771} 772 773static int wm8955_resume(struct platform_device *pdev) 774{ 775 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 776 struct snd_soc_codec *codec = socdev->codec; 777 int i; 778 u8 data[2]; 779 u16 *cache = codec->reg_cache; 780 781 /* Sync reg_cache with the hardware */ 782 for (i = 0; i < ARRAY_SIZE(wm8955_reg); i++) { 783 if (i == WM8955_RESET) 784 continue; 785 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); 786 data[1] = cache[i] & 0x00ff; 787 codec->hw_write(codec->control_data, data, 2); 788 } 789 790 wm8955_dapm_event(codec, SNDRV_CTL_POWER_D3hot); 791 792 /* charge wm8955 caps */ 793 if (codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) { 794 wm8955_dapm_event(codec, SNDRV_CTL_POWER_D2); 795 codec->dapm_state = SNDRV_CTL_POWER_D0; 796 schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000)); 797 } 798 799 return 0; 800} 801 802/* 803 * initialise the WM8955 driver 804 * register the mixer and dsp interfaces with the kernel 805 */ 806static int wm8955_init(struct snd_soc_device *socdev) 807{ 808 struct snd_soc_codec *codec = socdev->codec; 809 int reg, ret = 0; 810 811 codec->name = "WM8955"; 812 codec->owner = THIS_MODULE; 813 codec->read = wm8955_read_reg_cache; 814 codec->write = wm8955_write; 815 codec->dapm_event = wm8955_dapm_event; 816 codec->dai = &wm8955_dai; 817 codec->num_dai = 1; 818 codec->reg_cache_size = sizeof(wm8955_reg); 819 codec->reg_cache = kmemdup(wm8955_reg, sizeof(wm8955_reg), GFP_KERNEL); 820 if (codec->reg_cache == NULL) 821 return -ENOMEM; 822 823 wm8955_reset(codec); 824 825 /* register pcms */ 826 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); 827 if (ret < 0) { 828 printk(KERN_ERR "wm8955: failed to create pcms\n"); 829 goto pcm_err; 830 } 831 832 /* charge output caps */ 833 wm8955_dapm_event(codec, SNDRV_CTL_POWER_D2); 834 codec->dapm_state = SNDRV_CTL_POWER_D3hot; 835 schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000)); 836 837 /* set the update bits */ 838 reg = wm8955_read_reg_cache(codec, WM8955_LDAC); 839 wm8955_write(codec, WM8955_LDAC, reg | 0x0100); 840 reg = wm8955_read_reg_cache(codec, WM8955_RDAC); 841 wm8955_write(codec, WM8955_RDAC, reg | 0x0100); 842 reg = wm8955_read_reg_cache(codec, WM8955_LOUT1V); 843 wm8955_write(codec, WM8955_LOUT1V, reg | 0x0100); 844 reg = wm8955_read_reg_cache(codec, WM8955_ROUT1V); 845 wm8955_write(codec, WM8955_ROUT1V, reg | 0x0100); 846 /* Read LOUT2V/ROUT2V and strip volume bits */ 847 reg = wm8955_read_reg_cache(codec, WM8955_LOUT2V) & 0x180; 848 wm8955_write(codec, WM8955_LOUT2V, reg | 0x0179); 849 reg = wm8955_read_reg_cache(codec, WM8955_ROUT2V) & 0x180; 850 wm8955_write(codec, WM8955_ROUT2V, reg | 0x0179); 851 852 /* Enable L & R Digital Inputs for the L & R Outputs of the mixer */ 853 reg = wm8955_read_reg_cache(codec, WM8955_LOUTM1); 854 wm8955_write(codec, WM8955_LOUTM1, reg | 0x0100); 855 reg = wm8955_read_reg_cache(codec, WM8955_ROUTM2); 856 wm8955_write(codec, WM8955_ROUTM2, reg | 0x0100); 857 858 wm8955_add_controls(codec); 859 wm8955_add_widgets(codec); 860 ret = snd_soc_register_card(socdev); 861 if (ret < 0) { 862 printk(KERN_ERR "wm8955: failed to register card\n"); 863 goto card_err; 864 } 865 return ret; 866 867card_err: 868 snd_soc_free_pcms(socdev); 869 snd_soc_dapm_free(socdev); 870pcm_err: 871 kfree(codec->reg_cache); 872 return ret; 873} 874 875/* If the i2c layer weren't so broken, we could pass this kind of data 876 around */ 877static struct snd_soc_device *wm8955_socdev; 878 879#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 880 881/* 882 * WM8955 2 wire address is determined by GPIO5 883 * state during powerup. 884 * low = 0x1a 885 * high = 0x1b 886 */ 887static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; 888 889/* Magic definition of all other variables and things */ 890I2C_CLIENT_INSMOD; 891 892static struct i2c_driver wm8955_i2c_driver; 893static struct i2c_client client_template; 894 895static int wm8955_codec_probe(struct i2c_adapter *adap, int addr, int kind) 896{ 897 struct snd_soc_device *socdev = wm8955_socdev; 898 struct wm8955_setup_data *setup = socdev->codec_data; 899 struct snd_soc_codec *codec = socdev->codec; 900 struct i2c_client *i2c; 901 int ret; 902 903 if (addr != setup->i2c_address) 904 return -ENODEV; 905 906 client_template.adapter = adap; 907 client_template.addr = addr; 908 909 i2c = kmemdup(&client_template, sizeof(client_template), GFP_KERNEL); 910 if (i2c == NULL) { 911 kfree(codec); 912 return -ENOMEM; 913 } 914 i2c_set_clientdata(i2c, codec); 915 codec->control_data = i2c; 916 917 ret = i2c_attach_client(i2c); 918 if (ret < 0) { 919 err("failed to attach codec at addr %x\n", addr); 920 goto err; 921 } 922 923 ret = wm8955_init(socdev); 924 if (ret < 0) { 925 err("failed to initialise WM8955\n"); 926 goto err; 927 } 928 return ret; 929 930err: 931 kfree(codec); 932 kfree(i2c); 933 return ret; 934} 935 936static int wm8955_i2c_detach(struct i2c_client *client) 937{ 938 struct snd_soc_codec *codec = i2c_get_clientdata(client); 939 i2c_detach_client(client); 940 kfree(codec->reg_cache); 941 kfree(client); 942 return 0; 943} 944 945static int wm8955_i2c_attach(struct i2c_adapter *adap) 946{ 947 return i2c_probe(adap, &addr_data, wm8955_codec_probe); 948} 949 950/* corgi i2c codec control layer */ 951static struct i2c_driver wm8955_i2c_driver = { 952 .driver = { 953 .name = "WM8955 I2C Codec", 954 .owner = THIS_MODULE, 955 }, 956 .id = I2C_DRIVERID_WM8955, 957 .attach_adapter = wm8955_i2c_attach, 958 .detach_client = wm8955_i2c_detach, 959 .command = NULL, 960}; 961 962static struct i2c_client client_template = { 963 .name = "WM8955", 964 .driver = &wm8955_i2c_driver, 965}; 966#endif 967 968static int wm8955_probe(struct platform_device *pdev) 969{ 970 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 971 struct wm8955_setup_data *setup = socdev->codec_data; 972 struct snd_soc_codec *codec; 973 struct wm8955_priv *wm8955; 974 int ret = 0; 975 976 info("WM8955 Audio Codec %s", WM8955_VERSION); 977 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); 978 if (codec == NULL) 979 return -ENOMEM; 980 981 wm8955 = kzalloc(sizeof(struct wm8955_priv), GFP_KERNEL); 982 if (wm8955 == NULL) { 983 kfree(codec); 984 return -ENOMEM; 985 } 986 987 codec->private_data = wm8955; 988 socdev->codec = codec; 989 mutex_init(&codec->mutex); 990 INIT_LIST_HEAD(&codec->dapm_widgets); 991 INIT_LIST_HEAD(&codec->dapm_paths); 992 wm8955_socdev = socdev; 993 INIT_DELAYED_WORK(&codec->delayed_work, wm8955_work); 994 995#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 996 if (setup->i2c_address) { 997 normal_i2c[0] = setup->i2c_address; 998 codec->hw_write = (hw_write_t)i2c_master_send; 999 ret = i2c_add_driver(&wm8955_i2c_driver); 1000 if (ret != 0) 1001 printk(KERN_ERR "can't add i2c driver"); 1002 } 1003#else 1004 /* Add other interfaces here */ 1005#endif 1006 1007 return ret; 1008} 1009 1010/* 1011 * This function forces any delayed work to be queued and run. 1012 */ 1013static int run_delayed_work(struct delayed_work *dwork) 1014{ 1015 int ret; 1016 1017 /* cancel any work waiting to be queued. */ 1018 ret = cancel_delayed_work(dwork); 1019 1020 /* if there was any work waiting then we run it now and 1021 * wait for it's completion */ 1022 if (ret) { 1023 schedule_delayed_work(dwork, 0); 1024 flush_scheduled_work(); 1025 } 1026 return ret; 1027} 1028 1029/* power down chip */ 1030static int wm8955_remove(struct platform_device *pdev) 1031{ 1032 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 1033 struct snd_soc_codec *codec = socdev->codec; 1034 1035 if (codec->control_data) 1036 wm8955_dapm_event(codec, SNDRV_CTL_POWER_D3cold); 1037 run_delayed_work(&codec->delayed_work); 1038 snd_soc_free_pcms(socdev); 1039 snd_soc_dapm_free(socdev); 1040#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 1041 i2c_del_driver(&wm8955_i2c_driver); 1042#endif 1043 kfree(codec->private_data); 1044 kfree(codec); 1045 1046 return 0; 1047} 1048 1049struct snd_soc_codec_device soc_codec_dev_wm8955 = { 1050 .probe = wm8955_probe, 1051 .remove = wm8955_remove, 1052 .suspend = wm8955_suspend, 1053 .resume = wm8955_resume, 1054}; 1055 1056EXPORT_SYMBOL_GPL(soc_codec_dev_wm8955); 1057 1058MODULE_DESCRIPTION("ASoC WM8955 driver"); 1059MODULE_AUTHOR(""); 1060MODULE_LICENSE("GPL"); 1061