1/* Analog Devices 1889 audio driver 2 * 3 * This is a driver for the AD1889 PCI audio chipset found 4 * on the HP PA-RISC [BCJ]-xxx0 workstations. 5 * 6 * Copyright (C) 2004-2005, Kyle McMartin <kyle@parisc-linux.org> 7 * Copyright (C) 2005, Thibaut Varene <varenet@parisc-linux.org> 8 * Based on the OSS AD1889 driver by Randolph Chung <tausq@debian.org> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License, version 2, as 12 * published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 23 * TODO: 24 * Do we need to take care of CCS register? 25 * Maybe we could use finer grained locking (separate locks for pb/cap)? 26 * Wishlist: 27 * Control Interface (mixer) support 28 * Better AC97 support (VSR...)? 29 * PM support 30 * MIDI support 31 * Game Port support 32 * SG DMA support (this will need *alot* of work) 33 */ 34 35#include <linux/init.h> 36#include <linux/pci.h> 37#include <linux/dma-mapping.h> 38#include <linux/slab.h> 39#include <linux/interrupt.h> 40#include <linux/compiler.h> 41#include <linux/delay.h> 42 43#include <sound/driver.h> 44#include <sound/core.h> 45#include <sound/pcm.h> 46#include <sound/initval.h> 47#include <sound/ac97_codec.h> 48 49#include <asm/io.h> 50 51#include "ad1889.h" 52#include "ac97/ac97_id.h" 53 54#define AD1889_DRVVER "Version: 1.7" 55 56MODULE_AUTHOR("Kyle McMartin <kyle@parisc-linux.org>, Thibaut Varene <t-bone@parisc-linux.org>"); 57MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver"); 58MODULE_LICENSE("GPL"); 59MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}"); 60 61static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; 62module_param_array(index, int, NULL, 0444); 63MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard."); 64 65static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; 66module_param_array(id, charp, NULL, 0444); 67MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard."); 68 69static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 70module_param_array(enable, bool, NULL, 0444); 71MODULE_PARM_DESC(enable, "Enable AD1889 soundcard."); 72 73static char *ac97_quirk[SNDRV_CARDS]; 74module_param_array(ac97_quirk, charp, NULL, 0444); 75MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware."); 76 77#define DEVNAME "ad1889" 78#define PFX DEVNAME ": " 79 80/* let's use the global sound debug interfaces */ 81#define ad1889_debug(fmt, arg...) snd_printd(KERN_DEBUG fmt, ## arg) 82 83/* keep track of some hw registers */ 84struct ad1889_register_state { 85 u16 reg; /* reg setup */ 86 u32 addr; /* dma base address */ 87 unsigned long size; /* DMA buffer size */ 88}; 89 90struct snd_ad1889 { 91 struct snd_card *card; 92 struct pci_dev *pci; 93 94 int irq; 95 unsigned long bar; 96 void __iomem *iobase; 97 98 struct snd_ac97 *ac97; 99 struct snd_ac97_bus *ac97_bus; 100 struct snd_pcm *pcm; 101 struct snd_info_entry *proc; 102 103 struct snd_pcm_substream *psubs; 104 struct snd_pcm_substream *csubs; 105 106 /* playback register state */ 107 struct ad1889_register_state wave; 108 struct ad1889_register_state ramc; 109 110 spinlock_t lock; 111}; 112 113static inline u16 114ad1889_readw(struct snd_ad1889 *chip, unsigned reg) 115{ 116 return readw(chip->iobase + reg); 117} 118 119static inline void 120ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val) 121{ 122 writew(val, chip->iobase + reg); 123} 124 125static inline u32 126ad1889_readl(struct snd_ad1889 *chip, unsigned reg) 127{ 128 return readl(chip->iobase + reg); 129} 130 131static inline void 132ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val) 133{ 134 writel(val, chip->iobase + reg); 135} 136 137static inline void 138ad1889_unmute(struct snd_ad1889 *chip) 139{ 140 u16 st; 141 st = ad1889_readw(chip, AD_DS_WADA) & 142 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM); 143 ad1889_writew(chip, AD_DS_WADA, st); 144 ad1889_readw(chip, AD_DS_WADA); 145} 146 147static inline void 148ad1889_mute(struct snd_ad1889 *chip) 149{ 150 u16 st; 151 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM; 152 ad1889_writew(chip, AD_DS_WADA, st); 153 ad1889_readw(chip, AD_DS_WADA); 154} 155 156static inline void 157ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address) 158{ 159 ad1889_writel(chip, AD_DMA_ADCBA, address); 160 ad1889_writel(chip, AD_DMA_ADCCA, address); 161} 162 163static inline void 164ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count) 165{ 166 ad1889_writel(chip, AD_DMA_ADCBC, count); 167 ad1889_writel(chip, AD_DMA_ADCCC, count); 168} 169 170static inline void 171ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count) 172{ 173 ad1889_writel(chip, AD_DMA_ADCIB, count); 174 ad1889_writel(chip, AD_DMA_ADCIC, count); 175} 176 177static inline void 178ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address) 179{ 180 ad1889_writel(chip, AD_DMA_WAVBA, address); 181 ad1889_writel(chip, AD_DMA_WAVCA, address); 182} 183 184static inline void 185ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count) 186{ 187 ad1889_writel(chip, AD_DMA_WAVBC, count); 188 ad1889_writel(chip, AD_DMA_WAVCC, count); 189} 190 191static inline void 192ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count) 193{ 194 ad1889_writel(chip, AD_DMA_WAVIB, count); 195 ad1889_writel(chip, AD_DMA_WAVIC, count); 196} 197 198static void 199ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel) 200{ 201 u16 reg; 202 203 if (channel & AD_CHAN_WAV) { 204 /* Disable wave channel */ 205 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN; 206 ad1889_writew(chip, AD_DS_WSMC, reg); 207 chip->wave.reg = reg; 208 209 /* disable IRQs */ 210 reg = ad1889_readw(chip, AD_DMA_WAV); 211 reg &= AD_DMA_IM_DIS; 212 reg &= ~AD_DMA_LOOP; 213 ad1889_writew(chip, AD_DMA_WAV, reg); 214 215 /* clear IRQ and address counters and pointers */ 216 ad1889_load_wave_buffer_address(chip, 0x0); 217 ad1889_load_wave_buffer_count(chip, 0x0); 218 ad1889_load_wave_interrupt_count(chip, 0x0); 219 220 /* flush */ 221 ad1889_readw(chip, AD_DMA_WAV); 222 } 223 224 if (channel & AD_CHAN_ADC) { 225 /* Disable ADC channel */ 226 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN; 227 ad1889_writew(chip, AD_DS_RAMC, reg); 228 chip->ramc.reg = reg; 229 230 reg = ad1889_readw(chip, AD_DMA_ADC); 231 reg &= AD_DMA_IM_DIS; 232 reg &= ~AD_DMA_LOOP; 233 ad1889_writew(chip, AD_DMA_ADC, reg); 234 235 ad1889_load_adc_buffer_address(chip, 0x0); 236 ad1889_load_adc_buffer_count(chip, 0x0); 237 ad1889_load_adc_interrupt_count(chip, 0x0); 238 239 /* flush */ 240 ad1889_readw(chip, AD_DMA_ADC); 241 } 242} 243 244static u16 245snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 246{ 247 struct snd_ad1889 *chip = ac97->private_data; 248 return ad1889_readw(chip, AD_AC97_BASE + reg); 249} 250 251static void 252snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) 253{ 254 struct snd_ad1889 *chip = ac97->private_data; 255 ad1889_writew(chip, AD_AC97_BASE + reg, val); 256} 257 258static int 259snd_ad1889_ac97_ready(struct snd_ad1889 *chip) 260{ 261 int retry = 400; /* average needs 352 msec */ 262 263 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY) 264 && --retry) 265 mdelay(1); 266 if (!retry) { 267 snd_printk(KERN_ERR PFX "[%s] Link is not ready.\n", 268 __FUNCTION__); 269 return -EIO; 270 } 271 ad1889_debug("[%s] ready after %d ms\n", __FUNCTION__, 400 - retry); 272 273 return 0; 274} 275 276static int 277snd_ad1889_hw_params(struct snd_pcm_substream *substream, 278 struct snd_pcm_hw_params *hw_params) 279{ 280 return snd_pcm_lib_malloc_pages(substream, 281 params_buffer_bytes(hw_params)); 282} 283 284static int 285snd_ad1889_hw_free(struct snd_pcm_substream *substream) 286{ 287 return snd_pcm_lib_free_pages(substream); 288} 289 290static struct snd_pcm_hardware snd_ad1889_playback_hw = { 291 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 292 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 293 .formats = SNDRV_PCM_FMTBIT_S16_LE, 294 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 295 .rate_min = 8000, /* docs say 7000, but we're lazy */ 296 .rate_max = 48000, 297 .channels_min = 1, 298 .channels_max = 2, 299 .buffer_bytes_max = BUFFER_BYTES_MAX, 300 .period_bytes_min = PERIOD_BYTES_MIN, 301 .period_bytes_max = PERIOD_BYTES_MAX, 302 .periods_min = PERIODS_MIN, 303 .periods_max = PERIODS_MAX, 304 /*.fifo_size = 0,*/ 305}; 306 307static struct snd_pcm_hardware snd_ad1889_capture_hw = { 308 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 309 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER, 310 .formats = SNDRV_PCM_FMTBIT_S16_LE, 311 .rates = SNDRV_PCM_RATE_48000, 312 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */ 313 .rate_max = 48000, 314 .channels_min = 1, 315 .channels_max = 2, 316 .buffer_bytes_max = BUFFER_BYTES_MAX, 317 .period_bytes_min = PERIOD_BYTES_MIN, 318 .period_bytes_max = PERIOD_BYTES_MAX, 319 .periods_min = PERIODS_MIN, 320 .periods_max = PERIODS_MAX, 321 /*.fifo_size = 0,*/ 322}; 323 324static int 325snd_ad1889_playback_open(struct snd_pcm_substream *ss) 326{ 327 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 328 struct snd_pcm_runtime *rt = ss->runtime; 329 330 chip->psubs = ss; 331 rt->hw = snd_ad1889_playback_hw; 332 333 return 0; 334} 335 336static int 337snd_ad1889_capture_open(struct snd_pcm_substream *ss) 338{ 339 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 340 struct snd_pcm_runtime *rt = ss->runtime; 341 342 chip->csubs = ss; 343 rt->hw = snd_ad1889_capture_hw; 344 345 return 0; 346} 347 348static int 349snd_ad1889_playback_close(struct snd_pcm_substream *ss) 350{ 351 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 352 chip->psubs = NULL; 353 return 0; 354} 355 356static int 357snd_ad1889_capture_close(struct snd_pcm_substream *ss) 358{ 359 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 360 chip->csubs = NULL; 361 return 0; 362} 363 364static int 365snd_ad1889_playback_prepare(struct snd_pcm_substream *ss) 366{ 367 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 368 struct snd_pcm_runtime *rt = ss->runtime; 369 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 370 unsigned int count = snd_pcm_lib_period_bytes(ss); 371 u16 reg; 372 373 ad1889_channel_reset(chip, AD_CHAN_WAV); 374 375 reg = ad1889_readw(chip, AD_DS_WSMC); 376 377 /* Mask out 16-bit / Stereo */ 378 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST); 379 380 if (snd_pcm_format_width(rt->format) == 16) 381 reg |= AD_DS_WSMC_WA16; 382 383 if (rt->channels > 1) 384 reg |= AD_DS_WSMC_WAST; 385 386 /* let's make sure we don't clobber ourselves */ 387 spin_lock_irq(&chip->lock); 388 389 chip->wave.size = size; 390 chip->wave.reg = reg; 391 chip->wave.addr = rt->dma_addr; 392 393 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); 394 395 /* Set sample rates on the codec */ 396 ad1889_writew(chip, AD_DS_WAS, rt->rate); 397 398 /* Set up DMA */ 399 ad1889_load_wave_buffer_address(chip, chip->wave.addr); 400 ad1889_load_wave_buffer_count(chip, size); 401 ad1889_load_wave_interrupt_count(chip, count); 402 403 /* writes flush */ 404 ad1889_readw(chip, AD_DS_WSMC); 405 406 spin_unlock_irq(&chip->lock); 407 408 ad1889_debug("prepare playback: addr = 0x%x, count = %u, " 409 "size = %u, reg = 0x%x, rate = %u\n", chip->wave.addr, 410 count, size, reg, rt->rate); 411 return 0; 412} 413 414static int 415snd_ad1889_capture_prepare(struct snd_pcm_substream *ss) 416{ 417 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 418 struct snd_pcm_runtime *rt = ss->runtime; 419 unsigned int size = snd_pcm_lib_buffer_bytes(ss); 420 unsigned int count = snd_pcm_lib_period_bytes(ss); 421 u16 reg; 422 423 ad1889_channel_reset(chip, AD_CHAN_ADC); 424 425 reg = ad1889_readw(chip, AD_DS_RAMC); 426 427 /* Mask out 16-bit / Stereo */ 428 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST); 429 430 if (snd_pcm_format_width(rt->format) == 16) 431 reg |= AD_DS_RAMC_AD16; 432 433 if (rt->channels > 1) 434 reg |= AD_DS_RAMC_ADST; 435 436 /* let's make sure we don't clobber ourselves */ 437 spin_lock_irq(&chip->lock); 438 439 chip->ramc.size = size; 440 chip->ramc.reg = reg; 441 chip->ramc.addr = rt->dma_addr; 442 443 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg); 444 445 /* Set up DMA */ 446 ad1889_load_adc_buffer_address(chip, chip->ramc.addr); 447 ad1889_load_adc_buffer_count(chip, size); 448 ad1889_load_adc_interrupt_count(chip, count); 449 450 /* writes flush */ 451 ad1889_readw(chip, AD_DS_RAMC); 452 453 spin_unlock_irq(&chip->lock); 454 455 ad1889_debug("prepare capture: addr = 0x%x, count = %u, " 456 "size = %u, reg = 0x%x, rate = %u\n", chip->ramc.addr, 457 count, size, reg, rt->rate); 458 return 0; 459} 460 461/* this is called in atomic context with IRQ disabled. 462 Must be as fast as possible and not sleep. 463 DMA should be *triggered* by this call. 464 The WSMC "WAEN" bit triggers DMA Wave On/Off */ 465static int 466snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd) 467{ 468 u16 wsmc; 469 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 470 471 wsmc = ad1889_readw(chip, AD_DS_WSMC); 472 473 switch (cmd) { 474 case SNDRV_PCM_TRIGGER_START: 475 /* enable DMA loop & interrupts */ 476 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT); 477 wsmc |= AD_DS_WSMC_WAEN; 478 /* 1 to clear CHSS bit */ 479 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS); 480 ad1889_unmute(chip); 481 break; 482 case SNDRV_PCM_TRIGGER_STOP: 483 ad1889_mute(chip); 484 wsmc &= ~AD_DS_WSMC_WAEN; 485 break; 486 default: 487 snd_BUG(); 488 return -EINVAL; 489 } 490 491 chip->wave.reg = wsmc; 492 ad1889_writew(chip, AD_DS_WSMC, wsmc); 493 ad1889_readw(chip, AD_DS_WSMC); /* flush */ 494 495 /* reset the chip when STOP - will disable IRQs */ 496 if (cmd == SNDRV_PCM_TRIGGER_STOP) 497 ad1889_channel_reset(chip, AD_CHAN_WAV); 498 499 return 0; 500} 501 502/* this is called in atomic context with IRQ disabled. 503 Must be as fast as possible and not sleep. 504 DMA should be *triggered* by this call. 505 The RAMC "ADEN" bit triggers DMA ADC On/Off */ 506static int 507snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd) 508{ 509 u16 ramc; 510 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 511 512 ramc = ad1889_readw(chip, AD_DS_RAMC); 513 514 switch (cmd) { 515 case SNDRV_PCM_TRIGGER_START: 516 /* enable DMA loop & interrupts */ 517 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT); 518 ramc |= AD_DS_RAMC_ADEN; 519 /* 1 to clear CHSS bit */ 520 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS); 521 break; 522 case SNDRV_PCM_TRIGGER_STOP: 523 ramc &= ~AD_DS_RAMC_ADEN; 524 break; 525 default: 526 return -EINVAL; 527 } 528 529 chip->ramc.reg = ramc; 530 ad1889_writew(chip, AD_DS_RAMC, ramc); 531 ad1889_readw(chip, AD_DS_RAMC); /* flush */ 532 533 /* reset the chip when STOP - will disable IRQs */ 534 if (cmd == SNDRV_PCM_TRIGGER_STOP) 535 ad1889_channel_reset(chip, AD_CHAN_ADC); 536 537 return 0; 538} 539 540/* Called in atomic context with IRQ disabled */ 541static snd_pcm_uframes_t 542snd_ad1889_playback_pointer(struct snd_pcm_substream *ss) 543{ 544 size_t ptr = 0; 545 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 546 547 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) 548 return 0; 549 550 ptr = ad1889_readl(chip, AD_DMA_WAVCA); 551 ptr -= chip->wave.addr; 552 553 snd_assert((ptr >= 0) && (ptr < chip->wave.size), return 0); 554 555 return bytes_to_frames(ss->runtime, ptr); 556} 557 558/* Called in atomic context with IRQ disabled */ 559static snd_pcm_uframes_t 560snd_ad1889_capture_pointer(struct snd_pcm_substream *ss) 561{ 562 size_t ptr = 0; 563 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss); 564 565 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN))) 566 return 0; 567 568 ptr = ad1889_readl(chip, AD_DMA_ADCCA); 569 ptr -= chip->ramc.addr; 570 571 snd_assert((ptr >= 0) && (ptr < chip->ramc.size), return 0); 572 573 return bytes_to_frames(ss->runtime, ptr); 574} 575 576static struct snd_pcm_ops snd_ad1889_playback_ops = { 577 .open = snd_ad1889_playback_open, 578 .close = snd_ad1889_playback_close, 579 .ioctl = snd_pcm_lib_ioctl, 580 .hw_params = snd_ad1889_hw_params, 581 .hw_free = snd_ad1889_hw_free, 582 .prepare = snd_ad1889_playback_prepare, 583 .trigger = snd_ad1889_playback_trigger, 584 .pointer = snd_ad1889_playback_pointer, 585}; 586 587static struct snd_pcm_ops snd_ad1889_capture_ops = { 588 .open = snd_ad1889_capture_open, 589 .close = snd_ad1889_capture_close, 590 .ioctl = snd_pcm_lib_ioctl, 591 .hw_params = snd_ad1889_hw_params, 592 .hw_free = snd_ad1889_hw_free, 593 .prepare = snd_ad1889_capture_prepare, 594 .trigger = snd_ad1889_capture_trigger, 595 .pointer = snd_ad1889_capture_pointer, 596}; 597 598static irqreturn_t 599snd_ad1889_interrupt(int irq, void *dev_id) 600{ 601 unsigned long st; 602 struct snd_ad1889 *chip = dev_id; 603 604 st = ad1889_readl(chip, AD_DMA_DISR); 605 606 /* clear ISR */ 607 ad1889_writel(chip, AD_DMA_DISR, st); 608 609 st &= AD_INTR_MASK; 610 611 if (unlikely(!st)) 612 return IRQ_NONE; 613 614 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI)) 615 ad1889_debug("Unexpected master or target abort interrupt!\n"); 616 617 if ((st & AD_DMA_DISR_WAVI) && chip->psubs) 618 snd_pcm_period_elapsed(chip->psubs); 619 if ((st & AD_DMA_DISR_ADCI) && chip->csubs) 620 snd_pcm_period_elapsed(chip->csubs); 621 622 return IRQ_HANDLED; 623} 624 625static int __devinit 626snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device, struct snd_pcm **rpcm) 627{ 628 int err; 629 struct snd_pcm *pcm; 630 631 if (rpcm) 632 *rpcm = NULL; 633 634 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm); 635 if (err < 0) 636 return err; 637 638 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 639 &snd_ad1889_playback_ops); 640 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 641 &snd_ad1889_capture_ops); 642 643 pcm->private_data = chip; 644 pcm->info_flags = 0; 645 strcpy(pcm->name, chip->card->shortname); 646 647 chip->pcm = pcm; 648 chip->psubs = NULL; 649 chip->csubs = NULL; 650 651 err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 652 snd_dma_pci_data(chip->pci), 653 BUFFER_BYTES_MAX / 2, 654 BUFFER_BYTES_MAX); 655 656 if (err < 0) { 657 snd_printk(KERN_ERR PFX "buffer allocation error: %d\n", err); 658 return err; 659 } 660 661 if (rpcm) 662 *rpcm = pcm; 663 664 return 0; 665} 666 667static void 668snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 669{ 670 struct snd_ad1889 *chip = entry->private_data; 671 u16 reg; 672 int tmp; 673 674 reg = ad1889_readw(chip, AD_DS_WSMC); 675 snd_iprintf(buffer, "Wave output: %s\n", 676 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled"); 677 snd_iprintf(buffer, "Wave Channels: %s\n", 678 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 679 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n", 680 (reg & AD_DS_WSMC_WA16) ? 16 : 8); 681 682 /* WARQ is at offset 12 */ 683 tmp = (reg & AD_DS_WSMC_WARQ) ? 684 (((reg & AD_DS_WSMC_WARQ >> 12) & 0x01) ? 12 : 18) : 4; 685 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 686 687 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp, 688 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 689 690 691 snd_iprintf(buffer, "Synthesis output: %s\n", 692 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled"); 693 694 /* SYRQ is at offset 4 */ 695 tmp = (reg & AD_DS_WSMC_SYRQ) ? 696 (((reg & AD_DS_WSMC_SYRQ >> 4) & 0x01) ? 12 : 18) : 4; 697 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1; 698 699 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp, 700 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 701 702 reg = ad1889_readw(chip, AD_DS_RAMC); 703 snd_iprintf(buffer, "ADC input: %s\n", 704 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled"); 705 snd_iprintf(buffer, "ADC Channels: %s\n", 706 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 707 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n", 708 (reg & AD_DS_RAMC_AD16) ? 16 : 8); 709 710 /* ACRQ is at offset 4 */ 711 tmp = (reg & AD_DS_RAMC_ACRQ) ? 712 (((reg & AD_DS_RAMC_ACRQ >> 4) & 0x01) ? 12 : 18) : 4; 713 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 714 715 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp, 716 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono"); 717 718 snd_iprintf(buffer, "Resampler input: %s\n", 719 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled"); 720 721 /* RERQ is at offset 12 */ 722 tmp = (reg & AD_DS_RAMC_RERQ) ? 723 (((reg & AD_DS_RAMC_RERQ >> 12) & 0x01) ? 12 : 18) : 4; 724 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1; 725 726 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp, 727 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono"); 728 729 730 /* doc says LSB represents -1.5dB, but the max value (-94.5dB) 731 suggests that LSB is -3dB, which is more coherent with the logarithmic 732 nature of the dB scale */ 733 reg = ad1889_readw(chip, AD_DS_WADA); 734 snd_iprintf(buffer, "Left: %s, -%d dB\n", 735 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute", 736 ((reg & AD_DS_WADA_LWAA) >> 8) * 3); 737 reg = ad1889_readw(chip, AD_DS_WADA); 738 snd_iprintf(buffer, "Right: %s, -%d dB\n", 739 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute", 740 ((reg & AD_DS_WADA_RWAA) >> 8) * 3); 741 742 reg = ad1889_readw(chip, AD_DS_WAS); 743 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg); 744 reg = ad1889_readw(chip, AD_DS_RES); 745 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg); 746} 747 748static void __devinit 749snd_ad1889_proc_init(struct snd_ad1889 *chip) 750{ 751 struct snd_info_entry *entry; 752 753 if (!snd_card_proc_new(chip->card, chip->card->driver, &entry)) 754 snd_info_set_text_ops(entry, chip, snd_ad1889_proc_read); 755} 756 757static struct ac97_quirk ac97_quirks[] = { 758 { 759 .subvendor = 0x11d4, /* AD */ 760 .subdevice = 0x1889, /* AD1889 */ 761 .codec_id = AC97_ID_AD1819, 762 .name = "AD1889", 763 .type = AC97_TUNE_HP_ONLY 764 }, 765 { } /* terminator */ 766}; 767 768static void __devinit 769snd_ad1889_ac97_xinit(struct snd_ad1889 *chip) 770{ 771 u16 reg; 772 773 reg = ad1889_readw(chip, AD_AC97_ACIC); 774 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */ 775 ad1889_writew(chip, AD_AC97_ACIC, reg); 776 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 777 udelay(10); 778 /* Interface Enable */ 779 reg |= AD_AC97_ACIC_ACIE; 780 ad1889_writew(chip, AD_AC97_ACIC, reg); 781 782 snd_ad1889_ac97_ready(chip); 783 784 /* Audio Stream Output | Variable Sample Rate Mode */ 785 reg = ad1889_readw(chip, AD_AC97_ACIC); 786 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM; 787 ad1889_writew(chip, AD_AC97_ACIC, reg); 788 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */ 789 790} 791 792static void 793snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus) 794{ 795 struct snd_ad1889 *chip = bus->private_data; 796 chip->ac97_bus = NULL; 797} 798 799static void 800snd_ad1889_ac97_free(struct snd_ac97 *ac97) 801{ 802 struct snd_ad1889 *chip = ac97->private_data; 803 chip->ac97 = NULL; 804} 805 806static int __devinit 807snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override) 808{ 809 int err; 810 struct snd_ac97_template ac97; 811 static struct snd_ac97_bus_ops ops = { 812 .write = snd_ad1889_ac97_write, 813 .read = snd_ad1889_ac97_read, 814 }; 815 816 /* doing that here, it works. */ 817 snd_ad1889_ac97_xinit(chip); 818 819 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus); 820 if (err < 0) 821 return err; 822 823 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free; 824 825 memset(&ac97, 0, sizeof(ac97)); 826 ac97.private_data = chip; 827 ac97.private_free = snd_ad1889_ac97_free; 828 ac97.pci = chip->pci; 829 830 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); 831 if (err < 0) 832 return err; 833 834 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override); 835 836 return 0; 837} 838 839static int 840snd_ad1889_free(struct snd_ad1889 *chip) 841{ 842 if (chip->irq < 0) 843 goto skip_hw; 844 845 spin_lock_irq(&chip->lock); 846 847 ad1889_mute(chip); 848 849 /* Turn off interrupt on count and zero DMA registers */ 850 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC); 851 852 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */ 853 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI); 854 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */ 855 856 spin_unlock_irq(&chip->lock); 857 858 synchronize_irq(chip->irq); 859 860 if (chip->irq >= 0) 861 free_irq(chip->irq, chip); 862 863skip_hw: 864 if (chip->iobase) 865 iounmap(chip->iobase); 866 867 pci_release_regions(chip->pci); 868 pci_disable_device(chip->pci); 869 870 kfree(chip); 871 return 0; 872} 873 874static int 875snd_ad1889_dev_free(struct snd_device *device) 876{ 877 struct snd_ad1889 *chip = device->device_data; 878 return snd_ad1889_free(chip); 879} 880 881static int __devinit 882snd_ad1889_init(struct snd_ad1889 *chip) 883{ 884 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */ 885 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */ 886 887 mdelay(10); 888 889 /* enable Master and Target abort interrupts */ 890 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE); 891 892 return 0; 893} 894 895static int __devinit 896snd_ad1889_create(struct snd_card *card, 897 struct pci_dev *pci, 898 struct snd_ad1889 **rchip) 899{ 900 int err; 901 902 struct snd_ad1889 *chip; 903 static struct snd_device_ops ops = { 904 .dev_free = snd_ad1889_dev_free, 905 }; 906 907 *rchip = NULL; 908 909 if ((err = pci_enable_device(pci)) < 0) 910 return err; 911 912 /* check PCI availability (32bit DMA) */ 913 if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0 || 914 pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK) < 0) { 915 printk(KERN_ERR PFX "error setting 32-bit DMA mask.\n"); 916 pci_disable_device(pci); 917 return -ENXIO; 918 } 919 920 /* allocate chip specific data with zero-filled memory */ 921 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) { 922 pci_disable_device(pci); 923 return -ENOMEM; 924 } 925 926 chip->card = card; 927 card->private_data = chip; 928 chip->pci = pci; 929 chip->irq = -1; 930 931 /* (1) PCI resource allocation */ 932 if ((err = pci_request_regions(pci, card->driver)) < 0) 933 goto free_and_ret; 934 935 chip->bar = pci_resource_start(pci, 0); 936 chip->iobase = ioremap_nocache(chip->bar, pci_resource_len(pci, 0)); 937 if (chip->iobase == NULL) { 938 printk(KERN_ERR PFX "unable to reserve region.\n"); 939 err = -EBUSY; 940 goto free_and_ret; 941 } 942 943 pci_set_master(pci); 944 945 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */ 946 947 if (request_irq(pci->irq, snd_ad1889_interrupt, 948 IRQF_SHARED, card->driver, chip)) { 949 printk(KERN_ERR PFX "cannot obtain IRQ %d\n", pci->irq); 950 snd_ad1889_free(chip); 951 return -EBUSY; 952 } 953 954 chip->irq = pci->irq; 955 synchronize_irq(chip->irq); 956 957 /* (2) initialization of the chip hardware */ 958 if ((err = snd_ad1889_init(chip)) < 0) { 959 snd_ad1889_free(chip); 960 return err; 961 } 962 963 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 964 snd_ad1889_free(chip); 965 return err; 966 } 967 968 snd_card_set_dev(card, &pci->dev); 969 970 *rchip = chip; 971 972 return 0; 973 974free_and_ret: 975 kfree(chip); 976 pci_disable_device(pci); 977 978 return err; 979} 980 981static int __devinit 982snd_ad1889_probe(struct pci_dev *pci, 983 const struct pci_device_id *pci_id) 984{ 985 int err; 986 static int devno; 987 struct snd_card *card; 988 struct snd_ad1889 *chip; 989 990 /* (1) */ 991 if (devno >= SNDRV_CARDS) 992 return -ENODEV; 993 if (!enable[devno]) { 994 devno++; 995 return -ENOENT; 996 } 997 998 /* (2) */ 999 card = snd_card_new(index[devno], id[devno], THIS_MODULE, 0); 1000 if (card == NULL) 1001 return -ENOMEM; 1002 1003 strcpy(card->driver, "AD1889"); 1004 strcpy(card->shortname, "Analog Devices AD1889"); 1005 1006 /* (3) */ 1007 err = snd_ad1889_create(card, pci, &chip); 1008 if (err < 0) 1009 goto free_and_ret; 1010 1011 /* (4) */ 1012 sprintf(card->longname, "%s at 0x%lx irq %i", 1013 card->shortname, chip->bar, chip->irq); 1014 1015 /* (5) */ 1016 /* register AC97 mixer */ 1017 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]); 1018 if (err < 0) 1019 goto free_and_ret; 1020 1021 err = snd_ad1889_pcm_init(chip, 0, NULL); 1022 if (err < 0) 1023 goto free_and_ret; 1024 1025 /* register proc interface */ 1026 snd_ad1889_proc_init(chip); 1027 1028 /* (6) */ 1029 err = snd_card_register(card); 1030 if (err < 0) 1031 goto free_and_ret; 1032 1033 /* (7) */ 1034 pci_set_drvdata(pci, card); 1035 1036 devno++; 1037 return 0; 1038 1039free_and_ret: 1040 snd_card_free(card); 1041 return err; 1042} 1043 1044static void __devexit 1045snd_ad1889_remove(struct pci_dev *pci) 1046{ 1047 snd_card_free(pci_get_drvdata(pci)); 1048 pci_set_drvdata(pci, NULL); 1049} 1050 1051static struct pci_device_id snd_ad1889_ids[] = { 1052 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) }, 1053 { 0, }, 1054}; 1055MODULE_DEVICE_TABLE(pci, snd_ad1889_ids); 1056 1057static struct pci_driver ad1889_pci = { 1058 .name = "AD1889 Audio", 1059 .id_table = snd_ad1889_ids, 1060 .probe = snd_ad1889_probe, 1061 .remove = __devexit_p(snd_ad1889_remove), 1062}; 1063 1064static int __init 1065alsa_ad1889_init(void) 1066{ 1067 return pci_register_driver(&ad1889_pci); 1068} 1069 1070static void __exit 1071alsa_ad1889_fini(void) 1072{ 1073 pci_unregister_driver(&ad1889_pci); 1074} 1075 1076module_init(alsa_ad1889_init); 1077module_exit(alsa_ad1889_fini); 1078