1/* 2 * Copyright (C) 2005 David Brownell 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 */ 18 19#ifndef __LINUX_SPI_H 20#define __LINUX_SPI_H 21 22/* 23 * INTERFACES between SPI master-side drivers and SPI infrastructure. 24 * (There's no SPI slave support for Linux yet...) 25 */ 26extern struct bus_type spi_bus_type; 27 28/** 29 * struct spi_device - Master side proxy for an SPI slave device 30 * @dev: Driver model representation of the device. 31 * @master: SPI controller used with the device. 32 * @max_speed_hz: Maximum clock rate to be used with this chip 33 * (on this board); may be changed by the device's driver. 34 * The spi_transfer.speed_hz can override this for each transfer. 35 * @chip_select: Chipselect, distinguishing chips handled by @master. 36 * @mode: The spi mode defines how data is clocked out and in. 37 * This may be changed by the device's driver. 38 * The "active low" default for chipselect mode can be overridden 39 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for 40 * each word in a transfer (by specifying SPI_LSB_FIRST). 41 * @bits_per_word: Data transfers involve one or more words; word sizes 42 * like eight or 12 bits are common. In-memory wordsizes are 43 * powers of two bytes (e.g. 20 bit samples use 32 bits). 44 * This may be changed by the device's driver, or left at the 45 * default (0) indicating protocol words are eight bit bytes. 46 * The spi_transfer.bits_per_word can override this for each transfer. 47 * @irq: Negative, or the number passed to request_irq() to receive 48 * interrupts from this device. 49 * @controller_state: Controller's runtime state 50 * @controller_data: Board-specific definitions for controller, such as 51 * FIFO initialization parameters; from board_info.controller_data 52 * @modalias: Name of the driver to use with this device, or an alias 53 * for that name. This appears in the sysfs "modalias" attribute 54 * for driver coldplugging, and in uevents used for hotplugging 55 * 56 * A @spi_device is used to interchange data between an SPI slave 57 * (usually a discrete chip) and CPU memory. 58 * 59 * In @dev, the platform_data is used to hold information about this 60 * device that's meaningful to the device's protocol driver, but not 61 * to its controller. One example might be an identifier for a chip 62 * variant with slightly different functionality; another might be 63 * information about how this particular board wires the chip's pins. 64 */ 65struct spi_device { 66 struct device dev; 67 struct spi_master *master; 68 u32 max_speed_hz; 69 u8 chip_select; 70 u8 mode; 71#define SPI_CPHA 0x01 /* clock phase */ 72#define SPI_CPOL 0x02 /* clock polarity */ 73#define SPI_MODE_0 (0|0) /* (original MicroWire) */ 74#define SPI_MODE_1 (0|SPI_CPHA) 75#define SPI_MODE_2 (SPI_CPOL|0) 76#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) 77#define SPI_CS_HIGH 0x04 /* chipselect active high? */ 78#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ 79 u8 bits_per_word; 80 int irq; 81 void *controller_state; 82 void *controller_data; 83 const char *modalias; 84 85 /* 86 * likely need more hooks for more protocol options affecting how 87 * the controller talks to each chip, like: 88 * - memory packing (12 bit samples into low bits, others zeroed) 89 * - priority 90 * - drop chipselect after each word 91 * - chipselect delays 92 * - ... 93 */ 94}; 95 96static inline struct spi_device *to_spi_device(struct device *dev) 97{ 98 return dev ? container_of(dev, struct spi_device, dev) : NULL; 99} 100 101/* most drivers won't need to care about device refcounting */ 102static inline struct spi_device *spi_dev_get(struct spi_device *spi) 103{ 104 return (spi && get_device(&spi->dev)) ? spi : NULL; 105} 106 107static inline void spi_dev_put(struct spi_device *spi) 108{ 109 if (spi) 110 put_device(&spi->dev); 111} 112 113/* ctldata is for the bus_master driver's runtime state */ 114static inline void *spi_get_ctldata(struct spi_device *spi) 115{ 116 return spi->controller_state; 117} 118 119static inline void spi_set_ctldata(struct spi_device *spi, void *state) 120{ 121 spi->controller_state = state; 122} 123 124/* device driver data */ 125 126static inline void spi_set_drvdata(struct spi_device *spi, void *data) 127{ 128 dev_set_drvdata(&spi->dev, data); 129} 130 131static inline void *spi_get_drvdata(struct spi_device *spi) 132{ 133 return dev_get_drvdata(&spi->dev); 134} 135 136struct spi_message; 137 138 139 140struct spi_driver { 141 int (*probe)(struct spi_device *spi); 142 int (*remove)(struct spi_device *spi); 143 void (*shutdown)(struct spi_device *spi); 144 int (*suspend)(struct spi_device *spi, pm_message_t mesg); 145 int (*resume)(struct spi_device *spi); 146 struct device_driver driver; 147}; 148 149static inline struct spi_driver *to_spi_driver(struct device_driver *drv) 150{ 151 return drv ? container_of(drv, struct spi_driver, driver) : NULL; 152} 153 154extern int spi_register_driver(struct spi_driver *sdrv); 155 156/** 157 * spi_unregister_driver - reverse effect of spi_register_driver 158 * @sdrv: the driver to unregister 159 * Context: can sleep 160 */ 161static inline void spi_unregister_driver(struct spi_driver *sdrv) 162{ 163 if (sdrv) 164 driver_unregister(&sdrv->driver); 165} 166 167 168/** 169 * struct spi_master - interface to SPI master controller 170 * @cdev: class interface to this driver 171 * @bus_num: board-specific (and often SOC-specific) identifier for a 172 * given SPI controller. 173 * @num_chipselect: chipselects are used to distinguish individual 174 * SPI slaves, and are numbered from zero to num_chipselects. 175 * each slave has a chipselect signal, but it's common that not 176 * every chipselect is connected to a slave. 177 * @setup: updates the device mode and clocking records used by a 178 * device's SPI controller; protocol code may call this. This 179 * must fail if an unrecognized or unsupported mode is requested. 180 * It's always safe to call this unless transfers are pending on 181 * the device whose settings are being modified. 182 * @transfer: adds a message to the controller's transfer queue. 183 * @cleanup: frees controller-specific state 184 * 185 * Each SPI master controller can communicate with one or more @spi_device 186 * children. These make a small bus, sharing MOSI, MISO and SCK signals 187 * but not chip select signals. Each device may be configured to use a 188 * different clock rate, since those shared signals are ignored unless 189 * the chip is selected. 190 * 191 * The driver for an SPI controller manages access to those devices through 192 * a queue of spi_message transactions, copying data between CPU memory and 193 * an SPI slave device. For each such message it queues, it calls the 194 * message's completion function when the transaction completes. 195 */ 196struct spi_master { 197 struct class_device cdev; 198 199 /* other than negative (== assign one dynamically), bus_num is fully 200 * board-specific. usually that simplifies to being SOC-specific. 201 * example: one SOC has three SPI controllers, numbered 0..2, 202 * and one board's schematics might show it using SPI-2. software 203 * would normally use bus_num=2 for that controller. 204 */ 205 s16 bus_num; 206 207 /* chipselects will be integral to many controllers; some others 208 * might use board-specific GPIOs. 209 */ 210 u16 num_chipselect; 211 212 /* setup mode and clock, etc (spi driver may call many times) */ 213 int (*setup)(struct spi_device *spi); 214 215 /* bidirectional bulk transfers 216 * 217 * + The transfer() method may not sleep; its main role is 218 * just to add the message to the queue. 219 * + For now there's no remove-from-queue operation, or 220 * any other request management 221 * + To a given spi_device, message queueing is pure fifo 222 * 223 * + The master's main job is to process its message queue, 224 * selecting a chip then transferring data 225 * + If there are multiple spi_device children, the i/o queue 226 * arbitration algorithm is unspecified (round robin, fifo, 227 * priority, reservations, preemption, etc) 228 * 229 * + Chipselect stays active during the entire message 230 * (unless modified by spi_transfer.cs_change != 0). 231 * + The message transfers use clock and SPI mode parameters 232 * previously established by setup() for this device 233 */ 234 int (*transfer)(struct spi_device *spi, 235 struct spi_message *mesg); 236 237 /* called on release() to free memory provided by spi_master */ 238 void (*cleanup)(struct spi_device *spi); 239}; 240 241static inline void *spi_master_get_devdata(struct spi_master *master) 242{ 243 return class_get_devdata(&master->cdev); 244} 245 246static inline void spi_master_set_devdata(struct spi_master *master, void *data) 247{ 248 class_set_devdata(&master->cdev, data); 249} 250 251static inline struct spi_master *spi_master_get(struct spi_master *master) 252{ 253 if (!master || !class_device_get(&master->cdev)) 254 return NULL; 255 return master; 256} 257 258static inline void spi_master_put(struct spi_master *master) 259{ 260 if (master) 261 class_device_put(&master->cdev); 262} 263 264 265/* the spi driver core manages memory for the spi_master classdev */ 266extern struct spi_master * 267spi_alloc_master(struct device *host, unsigned size); 268 269extern int spi_register_master(struct spi_master *master); 270extern void spi_unregister_master(struct spi_master *master); 271 272extern struct spi_master *spi_busnum_to_master(u16 busnum); 273 274/*---------------------------------------------------------------------------*/ 275 276/* 277 * I/O INTERFACE between SPI controller and protocol drivers 278 * 279 * Protocol drivers use a queue of spi_messages, each transferring data 280 * between the controller and memory buffers. 281 * 282 * The spi_messages themselves consist of a series of read+write transfer 283 * segments. Those segments always read the same number of bits as they 284 * write; but one or the other is easily ignored by passing a null buffer 285 * pointer. (This is unlike most types of I/O API, because SPI hardware 286 * is full duplex.) 287 * 288 * NOTE: Allocation of spi_transfer and spi_message memory is entirely 289 * up to the protocol driver, which guarantees the integrity of both (as 290 * well as the data buffers) for as long as the message is queued. 291 */ 292 293/** 294 * struct spi_transfer - a read/write buffer pair 295 * @tx_buf: data to be written (dma-safe memory), or NULL 296 * @rx_buf: data to be read (dma-safe memory), or NULL 297 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped 298 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped 299 * @len: size of rx and tx buffers (in bytes) 300 * @speed_hz: Select a speed other then the device default for this 301 * transfer. If 0 the default (from @spi_device) is used. 302 * @bits_per_word: select a bits_per_word other then the device default 303 * for this transfer. If 0 the default (from @spi_device) is used. 304 * @cs_change: affects chipselect after this transfer completes 305 * @delay_usecs: microseconds to delay after this transfer before 306 * (optionally) changing the chipselect status, then starting 307 * the next transfer or completing this @spi_message. 308 * @transfer_list: transfers are sequenced through @spi_message.transfers 309 * 310 * SPI transfers always write the same number of bytes as they read. 311 * Protocol drivers should always provide @rx_buf and/or @tx_buf. 312 * In some cases, they may also want to provide DMA addresses for 313 * the data being transferred; that may reduce overhead, when the 314 * underlying driver uses dma. 315 * 316 * If the transmit buffer is null, zeroes will be shifted out 317 * while filling @rx_buf. If the receive buffer is null, the data 318 * shifted in will be discarded. Only "len" bytes shift out (or in). 319 * It's an error to try to shift out a partial word. (For example, by 320 * shifting out three bytes with word size of sixteen or twenty bits; 321 * the former uses two bytes per word, the latter uses four bytes.) 322 * 323 * In-memory data values are always in native CPU byte order, translated 324 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So 325 * for example when bits_per_word is sixteen, buffers are 2N bytes long 326 * (@len = 2N) and hold N sixteen bit words in CPU byte order. 327 * 328 * When the word size of the SPI transfer is not a power-of-two multiple 329 * of eight bits, those in-memory words include extra bits. In-memory 330 * words are always seen by protocol drivers as right-justified, so the 331 * undefined (rx) or unused (tx) bits are always the most significant bits. 332 * 333 * All SPI transfers start with the relevant chipselect active. Normally 334 * it stays selected until after the last transfer in a message. Drivers 335 * can affect the chipselect signal using cs_change. 336 * 337 * (i) If the transfer isn't the last one in the message, this flag is 338 * used to make the chipselect briefly go inactive in the middle of the 339 * message. Toggling chipselect in this way may be needed to terminate 340 * a chip command, letting a single spi_message perform all of group of 341 * chip transactions together. 342 * 343 * (ii) When the transfer is the last one in the message, the chip may 344 * stay selected until the next transfer. On multi-device SPI busses 345 * with nothing blocking messages going to other devices, this is just 346 * a performance hint; starting a message to another device deselects 347 * this one. But in other cases, this can be used to ensure correctness. 348 * Some devices need protocol transactions to be built from a series of 349 * spi_message submissions, where the content of one message is determined 350 * by the results of previous messages and where the whole transaction 351 * ends when the chipselect goes intactive. 352 * 353 * The code that submits an spi_message (and its spi_transfers) 354 * to the lower layers is responsible for managing its memory. 355 * Zero-initialize every field you don't set up explicitly, to 356 * insulate against future API updates. After you submit a message 357 * and its transfers, ignore them until its completion callback. 358 */ 359struct spi_transfer { 360 /* it's ok if tx_buf == rx_buf (right?) 361 * for MicroWire, one buffer must be null 362 * buffers must work with dma_*map_single() calls, unless 363 * spi_message.is_dma_mapped reports a pre-existing mapping 364 */ 365 const void *tx_buf; 366 void *rx_buf; 367 unsigned len; 368 369 dma_addr_t tx_dma; 370 dma_addr_t rx_dma; 371 372 unsigned cs_change:1; 373 u8 bits_per_word; 374 u16 delay_usecs; 375 u32 speed_hz; 376 377 struct list_head transfer_list; 378}; 379 380/** 381 * struct spi_message - one multi-segment SPI transaction 382 * @transfers: list of transfer segments in this transaction 383 * @spi: SPI device to which the transaction is queued 384 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual 385 * addresses for each transfer buffer 386 * @complete: called to report transaction completions 387 * @context: the argument to complete() when it's called 388 * @actual_length: the total number of bytes that were transferred in all 389 * successful segments 390 * @status: zero for success, else negative errno 391 * @queue: for use by whichever driver currently owns the message 392 * @state: for use by whichever driver currently owns the message 393 * 394 * A @spi_message is used to execute an atomic sequence of data transfers, 395 * each represented by a struct spi_transfer. The sequence is "atomic" 396 * in the sense that no other spi_message may use that SPI bus until that 397 * sequence completes. On some systems, many such sequences can execute as 398 * as single programmed DMA transfer. On all systems, these messages are 399 * queued, and might complete after transactions to other devices. Messages 400 * sent to a given spi_device are alway executed in FIFO order. 401 * 402 * The code that submits an spi_message (and its spi_transfers) 403 * to the lower layers is responsible for managing its memory. 404 * Zero-initialize every field you don't set up explicitly, to 405 * insulate against future API updates. After you submit a message 406 * and its transfers, ignore them until its completion callback. 407 */ 408struct spi_message { 409 struct list_head transfers; 410 411 struct spi_device *spi; 412 413 unsigned is_dma_mapped:1; 414 415 /* REVISIT: we might want a flag affecting the behavior of the 416 * last transfer ... allowing things like "read 16 bit length L" 417 * immediately followed by "read L bytes". Basically imposing 418 * a specific message scheduling algorithm. 419 * 420 * Some controller drivers (message-at-a-time queue processing) 421 * could provide that as their default scheduling algorithm. But 422 * others (with multi-message pipelines) could need a flag to 423 * tell them about such special cases. 424 */ 425 426 /* completion is reported through a callback */ 427 void (*complete)(void *context); 428 void *context; 429 unsigned actual_length; 430 int status; 431 432 /* for optional use by whatever driver currently owns the 433 * spi_message ... between calls to spi_async and then later 434 * complete(), that's the spi_master controller driver. 435 */ 436 struct list_head queue; 437 void *state; 438}; 439 440static inline void spi_message_init(struct spi_message *m) 441{ 442 memset(m, 0, sizeof *m); 443 INIT_LIST_HEAD(&m->transfers); 444} 445 446static inline void 447spi_message_add_tail(struct spi_transfer *t, struct spi_message *m) 448{ 449 list_add_tail(&t->transfer_list, &m->transfers); 450} 451 452static inline void 453spi_transfer_del(struct spi_transfer *t) 454{ 455 list_del(&t->transfer_list); 456} 457 458/* It's fine to embed message and transaction structures in other data 459 * structures so long as you don't free them while they're in use. 460 */ 461 462static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags) 463{ 464 struct spi_message *m; 465 466 m = kzalloc(sizeof(struct spi_message) 467 + ntrans * sizeof(struct spi_transfer), 468 flags); 469 if (m) { 470 int i; 471 struct spi_transfer *t = (struct spi_transfer *)(m + 1); 472 473 INIT_LIST_HEAD(&m->transfers); 474 for (i = 0; i < ntrans; i++, t++) 475 spi_message_add_tail(t, m); 476 } 477 return m; 478} 479 480static inline void spi_message_free(struct spi_message *m) 481{ 482 kfree(m); 483} 484 485/** 486 * spi_setup - setup SPI mode and clock rate 487 * @spi: the device whose settings are being modified 488 * Context: can sleep, and no requests are queued to the device 489 * 490 * SPI protocol drivers may need to update the transfer mode if the 491 * device doesn't work with its default. They may likewise need 492 * to update clock rates or word sizes from initial values. This function 493 * changes those settings, and must be called from a context that can sleep. 494 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take 495 * effect the next time the device is selected and data is transferred to 496 * or from it. When this function returns, the spi device is deselected. 497 * 498 * Note that this call will fail if the protocol driver specifies an option 499 * that the underlying controller or its driver does not support. For 500 * example, not all hardware supports wire transfers using nine bit words, 501 * LSB-first wire encoding, or active-high chipselects. 502 */ 503static inline int 504spi_setup(struct spi_device *spi) 505{ 506 return spi->master->setup(spi); 507} 508 509 510/** 511 * spi_async - asynchronous SPI transfer 512 * @spi: device with which data will be exchanged 513 * @message: describes the data transfers, including completion callback 514 * Context: any (irqs may be blocked, etc) 515 * 516 * This call may be used in_irq and other contexts which can't sleep, 517 * as well as from task contexts which can sleep. 518 * 519 * The completion callback is invoked in a context which can't sleep. 520 * Before that invocation, the value of message->status is undefined. 521 * When the callback is issued, message->status holds either zero (to 522 * indicate complete success) or a negative error code. After that 523 * callback returns, the driver which issued the transfer request may 524 * deallocate the associated memory; it's no longer in use by any SPI 525 * core or controller driver code. 526 * 527 * Note that although all messages to a spi_device are handled in 528 * FIFO order, messages may go to different devices in other orders. 529 * Some device might be higher priority, or have various "hard" access 530 * time requirements, for example. 531 * 532 * On detection of any fault during the transfer, processing of 533 * the entire message is aborted, and the device is deselected. 534 * Until returning from the associated message completion callback, 535 * no other spi_message queued to that device will be processed. 536 * (This rule applies equally to all the synchronous transfer calls, 537 * which are wrappers around this core asynchronous primitive.) 538 */ 539static inline int 540spi_async(struct spi_device *spi, struct spi_message *message) 541{ 542 message->spi = spi; 543 return spi->master->transfer(spi, message); 544} 545 546/*---------------------------------------------------------------------------*/ 547 548/* All these synchronous SPI transfer routines are utilities layered 549 * over the core async transfer primitive. Here, "synchronous" means 550 * they will sleep uninterruptibly until the async transfer completes. 551 */ 552 553extern int spi_sync(struct spi_device *spi, struct spi_message *message); 554 555/** 556 * spi_write - SPI synchronous write 557 * @spi: device to which data will be written 558 * @buf: data buffer 559 * @len: data buffer size 560 * Context: can sleep 561 * 562 * This writes the buffer and returns zero or a negative error code. 563 * Callable only from contexts that can sleep. 564 */ 565static inline int 566spi_write(struct spi_device *spi, const u8 *buf, size_t len) 567{ 568 struct spi_transfer t = { 569 .tx_buf = buf, 570 .len = len, 571 }; 572 struct spi_message m; 573 574 spi_message_init(&m); 575 spi_message_add_tail(&t, &m); 576 return spi_sync(spi, &m); 577} 578 579/** 580 * spi_read - SPI synchronous read 581 * @spi: device from which data will be read 582 * @buf: data buffer 583 * @len: data buffer size 584 * Context: can sleep 585 * 586 * This reads the buffer and returns zero or a negative error code. 587 * Callable only from contexts that can sleep. 588 */ 589static inline int 590spi_read(struct spi_device *spi, u8 *buf, size_t len) 591{ 592 struct spi_transfer t = { 593 .rx_buf = buf, 594 .len = len, 595 }; 596 struct spi_message m; 597 598 spi_message_init(&m); 599 spi_message_add_tail(&t, &m); 600 return spi_sync(spi, &m); 601} 602 603/* this copies txbuf and rxbuf data; for small transfers only! */ 604extern int spi_write_then_read(struct spi_device *spi, 605 const u8 *txbuf, unsigned n_tx, 606 u8 *rxbuf, unsigned n_rx); 607 608/** 609 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read 610 * @spi: device with which data will be exchanged 611 * @cmd: command to be written before data is read back 612 * Context: can sleep 613 * 614 * This returns the (unsigned) eight bit number returned by the 615 * device, or else a negative error code. Callable only from 616 * contexts that can sleep. 617 */ 618static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) 619{ 620 ssize_t status; 621 u8 result; 622 623 status = spi_write_then_read(spi, &cmd, 1, &result, 1); 624 625 /* return negative errno or unsigned value */ 626 return (status < 0) ? status : result; 627} 628 629/** 630 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read 631 * @spi: device with which data will be exchanged 632 * @cmd: command to be written before data is read back 633 * Context: can sleep 634 * 635 * This returns the (unsigned) sixteen bit number returned by the 636 * device, or else a negative error code. Callable only from 637 * contexts that can sleep. 638 * 639 * The number is returned in wire-order, which is at least sometimes 640 * big-endian. 641 */ 642static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) 643{ 644 ssize_t status; 645 u16 result; 646 647 status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2); 648 649 /* return negative errno or unsigned value */ 650 return (status < 0) ? status : result; 651} 652 653/*---------------------------------------------------------------------------*/ 654 655/* 656 * INTERFACE between board init code and SPI infrastructure. 657 * 658 * No SPI driver ever sees these SPI device table segments, but 659 * it's how the SPI core (or adapters that get hotplugged) grows 660 * the driver model tree. 661 * 662 * As a rule, SPI devices can't be probed. Instead, board init code 663 * provides a table listing the devices which are present, with enough 664 * information to bind and set up the device's driver. There's basic 665 * support for nonstatic configurations too; enough to handle adding 666 * parport adapters, or microcontrollers acting as USB-to-SPI bridges. 667 */ 668 669/* board-specific information about each SPI device */ 670struct spi_board_info { 671 /* the device name and module name are coupled, like platform_bus; 672 * "modalias" is normally the driver name. 673 * 674 * platform_data goes to spi_device.dev.platform_data, 675 * controller_data goes to spi_device.controller_data, 676 * irq is copied too 677 */ 678 char modalias[KOBJ_NAME_LEN]; 679 const void *platform_data; 680 void *controller_data; 681 int irq; 682 683 /* slower signaling on noisy or low voltage boards */ 684 u32 max_speed_hz; 685 686 687 /* bus_num is board specific and matches the bus_num of some 688 * spi_master that will probably be registered later. 689 * 690 * chip_select reflects how this chip is wired to that master; 691 * it's less than num_chipselect. 692 */ 693 u16 bus_num; 694 u16 chip_select; 695 696 /* mode becomes spi_device.mode, and is essential for chips 697 * where the default of SPI_CS_HIGH = 0 is wrong. 698 */ 699 u8 mode; 700 701 /* ... may need additional spi_device chip config data here. 702 * avoid stuff protocol drivers can set; but include stuff 703 * needed to behave without being bound to a driver: 704 * - quirks like clock rate mattering when not selected 705 */ 706}; 707 708#ifdef CONFIG_SPI 709extern int 710spi_register_board_info(struct spi_board_info const *info, unsigned n); 711#else 712/* board init code may ignore whether SPI is configured or not */ 713static inline int 714spi_register_board_info(struct spi_board_info const *info, unsigned n) 715 { return 0; } 716#endif 717 718 719/* If you're hotplugging an adapter with devices (parport, usb, etc) 720 * use spi_new_device() to describe each device. You can also call 721 * spi_unregister_device() to start making that device vanish, but 722 * normally that would be handled by spi_unregister_master(). 723 */ 724extern struct spi_device * 725spi_new_device(struct spi_master *, struct spi_board_info *); 726 727static inline void 728spi_unregister_device(struct spi_device *spi) 729{ 730 if (spi) 731 device_unregister(&spi->dev); 732} 733 734#endif /* __LINUX_SPI_H */ 735