1/*  *********************************************************************
2    *  SB1250 Board Support Package
3    *
4    *  UART Constants				File: sb1250_uart.h
5    *
6    *  This module contains constants and macros useful for
7    *  manipulating the SB1250's UARTs
8    *
9    *  SB1250 specification level:  User's manual 1/02/02
10    *
11    *********************************************************************
12    *
13    *  Copyright 2000,2001,2002,2003
14    *  Broadcom Corporation. All rights reserved.
15    *
16    *  This program is free software; you can redistribute it and/or
17    *  modify it under the terms of the GNU General Public License as
18    *  published by the Free Software Foundation; either version 2 of
19    *  the License, or (at your option) any later version.
20    *
21    *  This program is distributed in the hope that it will be useful,
22    *  but WITHOUT ANY WARRANTY; without even the implied warranty of
23    *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
24    *  GNU General Public License for more details.
25    *
26    *  You should have received a copy of the GNU General Public License
27    *  along with this program; if not, write to the Free Software
28    *  Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29    *  MA 02111-1307 USA
30    ********************************************************************* */
31
32
33#ifndef _SB1250_UART_H
34#define _SB1250_UART_H
35
36#include "sb1250_defs.h"
37
38/* **********************************************************************
39   * DUART Registers
40   ********************************************************************** */
41
42/*
43 * DUART Mode Register #1 (Table 10-3)
44 * Register: DUART_MODE_REG_1_A
45 * Register: DUART_MODE_REG_1_B
46 */
47
48#define S_DUART_BITS_PER_CHAR       0
49#define M_DUART_BITS_PER_CHAR       _SB_MAKEMASK(2,S_DUART_BITS_PER_CHAR)
50#define V_DUART_BITS_PER_CHAR(x)    _SB_MAKEVALUE(x,S_DUART_BITS_PER_CHAR)
51
52#define K_DUART_BITS_PER_CHAR_RSV0  0
53#define K_DUART_BITS_PER_CHAR_RSV1  1
54#define K_DUART_BITS_PER_CHAR_7     2
55#define K_DUART_BITS_PER_CHAR_8     3
56
57#define V_DUART_BITS_PER_CHAR_RSV0  V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_RSV0)
58#define V_DUART_BITS_PER_CHAR_RSV1  V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_RSV1)
59#define V_DUART_BITS_PER_CHAR_7     V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_7)
60#define V_DUART_BITS_PER_CHAR_8     V_DUART_BITS_PER_CHAR(K_DUART_BITS_PER_CHAR_8)
61
62
63#define M_DUART_PARITY_TYPE_EVEN    0x00
64#define M_DUART_PARITY_TYPE_ODD     _SB_MAKEMASK1(2)
65
66#define S_DUART_PARITY_MODE          3
67#define M_DUART_PARITY_MODE         _SB_MAKEMASK(2,S_DUART_PARITY_MODE)
68#define V_DUART_PARITY_MODE(x)      _SB_MAKEVALUE(x,S_DUART_PARITY_MODE)
69
70#define K_DUART_PARITY_MODE_ADD       0
71#define K_DUART_PARITY_MODE_ADD_FIXED 1
72#define K_DUART_PARITY_MODE_NONE      2
73
74#define V_DUART_PARITY_MODE_ADD       V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD)
75#define V_DUART_PARITY_MODE_ADD_FIXED V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_ADD_FIXED)
76#define V_DUART_PARITY_MODE_NONE      V_DUART_PARITY_MODE(K_DUART_PARITY_MODE_NONE)
77
78#define M_DUART_ERR_MODE            _SB_MAKEMASK1(5)    /* must be zero */
79
80#define M_DUART_RX_IRQ_SEL_RXRDY    0
81#define M_DUART_RX_IRQ_SEL_RXFULL   _SB_MAKEMASK1(6)
82
83#define M_DUART_RX_RTS_ENA          _SB_MAKEMASK1(7)
84
85/*
86 * DUART Mode Register #2 (Table 10-4)
87 * Register: DUART_MODE_REG_2_A
88 * Register: DUART_MODE_REG_2_B
89 */
90
91#define M_DUART_MODE_RESERVED1      _SB_MAKEMASK(3,0)   /* ignored */
92
93#define M_DUART_STOP_BIT_LEN_2      _SB_MAKEMASK1(3)
94#define M_DUART_STOP_BIT_LEN_1      0
95
96#define M_DUART_TX_CTS_ENA          _SB_MAKEMASK1(4)
97
98
99#define M_DUART_MODE_RESERVED2      _SB_MAKEMASK1(5)    /* must be zero */
100
101#define S_DUART_CHAN_MODE	    6
102#define M_DUART_CHAN_MODE           _SB_MAKEMASK(2,S_DUART_CHAN_MODE)
103#define V_DUART_CHAN_MODE(x)	    _SB_MAKEVALUE(x,S_DUART_CHAN_MODE)
104
105#define K_DUART_CHAN_MODE_NORMAL    0
106#define K_DUART_CHAN_MODE_LCL_LOOP  2
107#define K_DUART_CHAN_MODE_REM_LOOP  3
108
109#define V_DUART_CHAN_MODE_NORMAL    V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_NORMAL)
110#define V_DUART_CHAN_MODE_LCL_LOOP  V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_LCL_LOOP)
111#define V_DUART_CHAN_MODE_REM_LOOP  V_DUART_CHAN_MODE(K_DUART_CHAN_MODE_REM_LOOP)
112
113/*
114 * DUART Command Register (Table 10-5)
115 * Register: DUART_CMD_A
116 * Register: DUART_CMD_B
117 */
118
119#define M_DUART_RX_EN               _SB_MAKEMASK1(0)
120#define M_DUART_RX_DIS              _SB_MAKEMASK1(1)
121#define M_DUART_TX_EN               _SB_MAKEMASK1(2)
122#define M_DUART_TX_DIS              _SB_MAKEMASK1(3)
123
124#define S_DUART_MISC_CMD	    4
125#define M_DUART_MISC_CMD            _SB_MAKEMASK(3,S_DUART_MISC_CMD)
126#define V_DUART_MISC_CMD(x)         _SB_MAKEVALUE(x,S_DUART_MISC_CMD)
127
128#define K_DUART_MISC_CMD_NOACTION0       0
129#define K_DUART_MISC_CMD_NOACTION1       1
130#define K_DUART_MISC_CMD_RESET_RX        2
131#define K_DUART_MISC_CMD_RESET_TX        3
132#define K_DUART_MISC_CMD_NOACTION4       4
133#define K_DUART_MISC_CMD_RESET_BREAK_INT 5
134#define K_DUART_MISC_CMD_START_BREAK     6
135#define K_DUART_MISC_CMD_STOP_BREAK      7
136
137#define V_DUART_MISC_CMD_NOACTION0       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION0)
138#define V_DUART_MISC_CMD_NOACTION1       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION1)
139#define V_DUART_MISC_CMD_RESET_RX        V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_RX)
140#define V_DUART_MISC_CMD_RESET_TX        V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_TX)
141#define V_DUART_MISC_CMD_NOACTION4       V_DUART_MISC_CMD(K_DUART_MISC_CMD_NOACTION4)
142#define V_DUART_MISC_CMD_RESET_BREAK_INT V_DUART_MISC_CMD(K_DUART_MISC_CMD_RESET_BREAK_INT)
143#define V_DUART_MISC_CMD_START_BREAK     V_DUART_MISC_CMD(K_DUART_MISC_CMD_START_BREAK)
144#define V_DUART_MISC_CMD_STOP_BREAK      V_DUART_MISC_CMD(K_DUART_MISC_CMD_STOP_BREAK)
145
146#define M_DUART_CMD_RESERVED             _SB_MAKEMASK1(7)
147
148/*
149 * DUART Status Register (Table 10-6)
150 * Register: DUART_STATUS_A
151 * Register: DUART_STATUS_B
152 * READ-ONLY
153 */
154
155#define M_DUART_RX_RDY              _SB_MAKEMASK1(0)
156#define M_DUART_RX_FFUL             _SB_MAKEMASK1(1)
157#define M_DUART_TX_RDY              _SB_MAKEMASK1(2)
158#define M_DUART_TX_EMT              _SB_MAKEMASK1(3)
159#define M_DUART_OVRUN_ERR           _SB_MAKEMASK1(4)
160#define M_DUART_PARITY_ERR          _SB_MAKEMASK1(5)
161#define M_DUART_FRM_ERR             _SB_MAKEMASK1(6)
162#define M_DUART_RCVD_BRK            _SB_MAKEMASK1(7)
163
164/*
165 * DUART Baud Rate Register (Table 10-7)
166 * Register: DUART_CLK_SEL_A
167 * Register: DUART_CLK_SEL_B
168 */
169
170#define M_DUART_CLK_COUNTER         _SB_MAKEMASK(12,0)
171#define V_DUART_BAUD_RATE(x)        (100000000/((x)*20)-1)
172
173/*
174 * DUART Data Registers (Table 10-8 and 10-9)
175 * Register: DUART_RX_HOLD_A
176 * Register: DUART_RX_HOLD_B
177 * Register: DUART_TX_HOLD_A
178 * Register: DUART_TX_HOLD_B
179 */
180
181#define M_DUART_RX_DATA             _SB_MAKEMASK(8,0)
182#define M_DUART_TX_DATA             _SB_MAKEMASK(8,0)
183
184/*
185 * DUART Input Port Register (Table 10-10)
186 * Register: DUART_IN_PORT
187 */
188
189#define M_DUART_IN_PIN0_VAL         _SB_MAKEMASK1(0)
190#define M_DUART_IN_PIN1_VAL         _SB_MAKEMASK1(1)
191#define M_DUART_IN_PIN2_VAL         _SB_MAKEMASK1(2)
192#define M_DUART_IN_PIN3_VAL         _SB_MAKEMASK1(3)
193#define M_DUART_IN_PIN4_VAL         _SB_MAKEMASK1(4)
194#define M_DUART_IN_PIN5_VAL         _SB_MAKEMASK1(5)
195#define M_DUART_RIN0_PIN            _SB_MAKEMASK1(6)
196#define M_DUART_RIN1_PIN            _SB_MAKEMASK1(7)
197
198/*
199 * DUART Input Port Change Status Register (Tables 10-11, 10-12, and 10-13)
200 * Register: DUART_INPORT_CHNG
201 */
202
203#define S_DUART_IN_PIN_VAL          0
204#define M_DUART_IN_PIN_VAL          _SB_MAKEMASK(4,S_DUART_IN_PIN_VAL)
205
206#define S_DUART_IN_PIN_CHNG         4
207#define M_DUART_IN_PIN_CHNG         _SB_MAKEMASK(4,S_DUART_IN_PIN_CHNG)
208
209
210/*
211 * DUART Output port control register (Table 10-14)
212 * Register: DUART_OPCR
213 */
214
215#define M_DUART_OPCR_RESERVED0      _SB_MAKEMASK1(0)   /* must be zero */
216#define M_DUART_OPC2_SEL            _SB_MAKEMASK1(1)
217#define M_DUART_OPCR_RESERVED1      _SB_MAKEMASK1(2)   /* must be zero */
218#define M_DUART_OPC3_SEL            _SB_MAKEMASK1(3)
219#define M_DUART_OPCR_RESERVED2      _SB_MAKEMASK(4,4)  /* must be zero */
220
221/*
222 * DUART Aux Control Register (Table 10-15)
223 * Register: DUART_AUX_CTRL
224 */
225
226#define M_DUART_IP0_CHNG_ENA        _SB_MAKEMASK1(0)
227#define M_DUART_IP1_CHNG_ENA        _SB_MAKEMASK1(1)
228#define M_DUART_IP2_CHNG_ENA        _SB_MAKEMASK1(2)
229#define M_DUART_IP3_CHNG_ENA        _SB_MAKEMASK1(3)
230#define M_DUART_ACR_RESERVED        _SB_MAKEMASK(4,4)
231
232#define M_DUART_CTS_CHNG_ENA        _SB_MAKEMASK1(0)
233#define M_DUART_CIN_CHNG_ENA        _SB_MAKEMASK1(2)
234
235/*
236 * DUART Interrupt Status Register (Table 10-16)
237 * Register: DUART_ISR
238 */
239
240#define M_DUART_ISR_TX_A            _SB_MAKEMASK1(0)
241
242#define S_DUART_ISR_RX_A            1
243#define M_DUART_ISR_RX_A            _SB_MAKEMASK1(S_DUART_ISR_RX_A)
244#define V_DUART_ISR_RX_A(x)         _SB_MAKEVALUE(x,S_DUART_ISR_RX_A)
245#define G_DUART_ISR_RX_A(x)         _SB_GETVALUE(x,S_DUART_ISR_RX_A,M_DUART_ISR_RX_A)
246
247#define M_DUART_ISR_BRK_A           _SB_MAKEMASK1(2)
248#define M_DUART_ISR_IN_A            _SB_MAKEMASK1(3)
249#define M_DUART_ISR_TX_B            _SB_MAKEMASK1(4)
250#define M_DUART_ISR_RX_B            _SB_MAKEMASK1(5)
251#define M_DUART_ISR_BRK_B           _SB_MAKEMASK1(6)
252#define M_DUART_ISR_IN_B            _SB_MAKEMASK1(7)
253
254/*
255 * DUART Channel A Interrupt Status Register (Table 10-17)
256 * DUART Channel B Interrupt Status Register (Table 10-18)
257 * Register: DUART_ISR_A
258 * Register: DUART_ISR_B
259 */
260
261#define M_DUART_ISR_TX              _SB_MAKEMASK1(0)
262#define M_DUART_ISR_RX              _SB_MAKEMASK1(1)
263#define M_DUART_ISR_BRK             _SB_MAKEMASK1(2)
264#define M_DUART_ISR_IN              _SB_MAKEMASK1(3)
265#define M_DUART_ISR_RESERVED        _SB_MAKEMASK(4,4)
266
267/*
268 * DUART Interrupt Mask Register (Table 10-19)
269 * Register: DUART_IMR
270 */
271
272#define M_DUART_IMR_TX_A            _SB_MAKEMASK1(0)
273#define M_DUART_IMR_RX_A            _SB_MAKEMASK1(1)
274#define M_DUART_IMR_BRK_A           _SB_MAKEMASK1(2)
275#define M_DUART_IMR_IN_A            _SB_MAKEMASK1(3)
276#define M_DUART_IMR_ALL_A	    _SB_MAKEMASK(4,0)
277
278#define M_DUART_IMR_TX_B            _SB_MAKEMASK1(4)
279#define M_DUART_IMR_RX_B            _SB_MAKEMASK1(5)
280#define M_DUART_IMR_BRK_B           _SB_MAKEMASK1(6)
281#define M_DUART_IMR_IN_B            _SB_MAKEMASK1(7)
282#define M_DUART_IMR_ALL_B           _SB_MAKEMASK(4,4)
283
284/*
285 * DUART Channel A Interrupt Mask Register (Table 10-20)
286 * DUART Channel B Interrupt Mask Register (Table 10-21)
287 * Register: DUART_IMR_A
288 * Register: DUART_IMR_B
289 */
290
291#define M_DUART_IMR_TX              _SB_MAKEMASK1(0)
292#define M_DUART_IMR_RX              _SB_MAKEMASK1(1)
293#define M_DUART_IMR_BRK             _SB_MAKEMASK1(2)
294#define M_DUART_IMR_IN              _SB_MAKEMASK1(3)
295#define M_DUART_IMR_ALL		    _SB_MAKEMASK(4,0)
296#define M_DUART_IMR_RESERVED        _SB_MAKEMASK(4,4)
297
298
299/*
300 * DUART Output Port Set Register (Table 10-22)
301 * Register: DUART_SET_OPR
302 */
303
304#define M_DUART_SET_OPR0            _SB_MAKEMASK1(0)
305#define M_DUART_SET_OPR1            _SB_MAKEMASK1(1)
306#define M_DUART_SET_OPR2            _SB_MAKEMASK1(2)
307#define M_DUART_SET_OPR3            _SB_MAKEMASK1(3)
308#define M_DUART_OPSR_RESERVED       _SB_MAKEMASK(4,4)
309
310/*
311 * DUART Output Port Clear Register (Table 10-23)
312 * Register: DUART_CLEAR_OPR
313 */
314
315#define M_DUART_CLR_OPR0            _SB_MAKEMASK1(0)
316#define M_DUART_CLR_OPR1            _SB_MAKEMASK1(1)
317#define M_DUART_CLR_OPR2            _SB_MAKEMASK1(2)
318#define M_DUART_CLR_OPR3            _SB_MAKEMASK1(3)
319#define M_DUART_OPCR_RESERVED       _SB_MAKEMASK(4,4)
320
321/*
322 * DUART Output Port RTS Register (Table 10-24)
323 * Register: DUART_OUT_PORT
324 */
325
326#define M_DUART_OUT_PIN_SET0        _SB_MAKEMASK1(0)
327#define M_DUART_OUT_PIN_SET1        _SB_MAKEMASK1(1)
328#define M_DUART_OUT_PIN_CLR0        _SB_MAKEMASK1(2)
329#define M_DUART_OUT_PIN_CLR1        _SB_MAKEMASK1(3)
330#define M_DUART_OPRR_RESERVED       _SB_MAKEMASK(4,4)
331
332#define M_DUART_OUT_PIN_SET(chan) \
333    (chan == 0 ? M_DUART_OUT_PIN_SET0 : M_DUART_OUT_PIN_SET1)
334#define M_DUART_OUT_PIN_CLR(chan) \
335    (chan == 0 ? M_DUART_OUT_PIN_CLR0 : M_DUART_OUT_PIN_CLR1)
336
337#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) || \
338	SIBYTE_HDR_FEATURE_CHIP(1480)
339/*
340 * Full Interrupt Control Register
341 */
342
343#define S_DUART_SIG_FULL           _SB_MAKE64(0)
344#define M_DUART_SIG_FULL           _SB_MAKEMASK(4,S_DUART_SIG_FULL)
345#define V_DUART_SIG_FULL(x)        _SB_MAKEVALUE(x,S_DUART_SIG_FULL)
346#define G_DUART_SIG_FULL(x)        _SB_GETVALUE(x,S_DUART_SIG_FULL,M_DUART_SIG_FULL)
347
348#define S_DUART_INT_TIME           _SB_MAKE64(4)
349#define M_DUART_INT_TIME           _SB_MAKEMASK(4,S_DUART_INT_TIME)
350#define V_DUART_INT_TIME(x)        _SB_MAKEVALUE(x,S_DUART_INT_TIME)
351#define G_DUART_INT_TIME(x)        _SB_GETVALUE(x,S_DUART_INT_TIME,M_DUART_INT_TIME)
352#endif /* 1250 PASS2 || 112x PASS1 || 1480 */
353
354
355/* ********************************************************************** */
356
357
358#endif
359