1#ifndef _ASM_MCE_H
2#define _ASM_MCE_H 1
3
4#include <asm/ioctls.h>
5#include <asm/types.h>
6
7/*
8 * Machine Check support for x86
9 */
10
11#define MCG_CTL_P        (1UL<<8)   /* MCG_CAP register available */
12
13#define MCG_STATUS_RIPV  (1UL<<0)   /* restart ip valid */
14#define MCG_STATUS_EIPV  (1UL<<1)   /* eip points to correct instruction */
15#define MCG_STATUS_MCIP  (1UL<<2)   /* machine check in progress */
16
17#define MCI_STATUS_VAL   (1UL<<63)  /* valid error */
18#define MCI_STATUS_OVER  (1UL<<62)  /* previous errors lost */
19#define MCI_STATUS_UC    (1UL<<61)  /* uncorrected error */
20#define MCI_STATUS_EN    (1UL<<60)  /* error enabled */
21#define MCI_STATUS_MISCV (1UL<<59)  /* misc error reg. valid */
22#define MCI_STATUS_ADDRV (1UL<<58)  /* addr reg. valid */
23#define MCI_STATUS_PCC   (1UL<<57)  /* processor context corrupt */
24
25/* Fields are zero when not available */
26struct mce {
27	__u64 status;
28	__u64 misc;
29	__u64 addr;
30	__u64 mcgstatus;
31	__u64 rip;
32	__u64 tsc;	/* cpu time stamp counter */
33	__u64 res1;	/* for future extension */
34	__u64 res2;	/* dito. */
35	__u8  cs;		/* code segment */
36	__u8  bank;	/* machine check bank */
37	__u8  cpu;	/* cpu that raised the error */
38	__u8  finished;   /* entry is valid */
39	__u32 pad;
40};
41
42/*
43 * This structure contains all data related to the MCE log.
44 * Also carries a signature to make it easier to find from external debugging tools.
45 * Each entry is only valid when its finished flag is set.
46 */
47
48#define MCE_LOG_LEN 32
49
50struct mce_log {
51	char signature[12]; /* "MACHINECHECK" */
52	unsigned len;  	    /* = MCE_LOG_LEN */
53	unsigned next;
54	unsigned flags;
55	unsigned pad0;
56	struct mce entry[MCE_LOG_LEN];
57};
58
59#define MCE_OVERFLOW 0		/* bit 0 in flags means overflow */
60
61#define MCE_LOG_SIGNATURE 	"MACHINECHECK"
62
63#define MCE_GET_RECORD_LEN   _IOR('M', 1, int)
64#define MCE_GET_LOG_LEN      _IOR('M', 2, int)
65#define MCE_GETCLEAR_FLAGS   _IOR('M', 3, int)
66
67/* Software defined banks */
68#define MCE_EXTENDED_BANK	128
69#define MCE_THERMAL_BANK	MCE_EXTENDED_BANK + 0
70
71#define K8_MCE_THRESHOLD_BASE      (MCE_EXTENDED_BANK + 1)      /* MCE_AMD */
72#define K8_MCE_THRESHOLD_BANK_0    (MCE_THRESHOLD_BASE + 0 * 9)
73#define K8_MCE_THRESHOLD_BANK_1    (MCE_THRESHOLD_BASE + 1 * 9)
74#define K8_MCE_THRESHOLD_BANK_2    (MCE_THRESHOLD_BASE + 2 * 9)
75#define K8_MCE_THRESHOLD_BANK_3    (MCE_THRESHOLD_BASE + 3 * 9)
76#define K8_MCE_THRESHOLD_BANK_4    (MCE_THRESHOLD_BASE + 4 * 9)
77#define K8_MCE_THRESHOLD_BANK_5    (MCE_THRESHOLD_BASE + 5 * 9)
78#define K8_MCE_THRESHOLD_DRAM_ECC  (MCE_THRESHOLD_BANK_4 + 0)
79
80#ifdef __KERNEL__
81#include <asm/atomic.h>
82
83void mce_log(struct mce *m);
84DECLARE_PER_CPU(struct sys_device, device_mce);
85
86#ifdef CONFIG_X86_MCE_INTEL
87void mce_intel_feature_init(struct cpuinfo_x86 *c);
88#else
89static inline void mce_intel_feature_init(struct cpuinfo_x86 *c)
90{
91}
92#endif
93
94#ifdef CONFIG_X86_MCE_AMD
95void mce_amd_feature_init(struct cpuinfo_x86 *c);
96#else
97static inline void mce_amd_feature_init(struct cpuinfo_x86 *c)
98{
99}
100#endif
101
102void mce_log_therm_throt_event(unsigned int cpu, __u64 status);
103
104extern atomic_t mce_entry;
105
106extern void do_machine_check(struct pt_regs *, long);
107
108#endif
109
110#endif
111