1/*
2 * This file contains the functions and defines necessary to modify and
3 * use the SuperH page table tree.
4 *
5 * Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2002 - 2005 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License.  See the file "COPYING" in the main directory of this
10 * archive for more details.
11 */
12#ifndef __ASM_SH_PGTABLE_H
13#define __ASM_SH_PGTABLE_H
14
15#include <asm-generic/pgtable-nopmd.h>
16#include <asm/page.h>
17
18#ifndef __ASSEMBLY__
19#include <asm/addrspace.h>
20#include <asm/fixmap.h>
21
22/*
23 * ZERO_PAGE is a global shared page that is always zero: used
24 * for zero-mapped memory areas etc..
25 */
26extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
27#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
28
29#endif /* !__ASSEMBLY__ */
30
31/*
32 * traditional two-level paging structure
33 */
34/* PTE bits */
35#ifdef CONFIG_X2TLB
36# define PTE_MAGNITUDE	3	/* 64-bit PTEs on extended mode SH-X2 TLB */
37#else
38# define PTE_MAGNITUDE	2	/* 32-bit PTEs */
39#endif
40#define PTE_SHIFT	PAGE_SHIFT
41#define PTE_BITS	(PTE_SHIFT - PTE_MAGNITUDE)
42
43/* PGD bits */
44#define PGDIR_SHIFT	(PTE_SHIFT + PTE_BITS)
45#define PGDIR_BITS	(32 - PGDIR_SHIFT)
46#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
47#define PGDIR_MASK	(~(PGDIR_SIZE-1))
48
49/* Entries per level */
50#define PTRS_PER_PTE	(PAGE_SIZE / (1 << PTE_MAGNITUDE))
51#define PTRS_PER_PGD	(PAGE_SIZE / 4)
52
53#define USER_PTRS_PER_PGD	(TASK_SIZE/PGDIR_SIZE)
54#define FIRST_USER_ADDRESS	0
55
56#define PTE_PHYS_MASK		(0x20000000 - PAGE_SIZE)
57
58/*
59 * First 1MB map is used by fixed purpose.
60 * Currently only 4-entry (16kB) is used (see arch/sh/mm/cache.c)
61 */
62#define VMALLOC_START	(P3SEG+0x00100000)
63#define VMALLOC_END	(FIXADDR_START-2*PAGE_SIZE)
64
65/* Legacy and compat mode bits */
66#define	_PAGE_WT	0x001		/* WT-bit on SH-4, 0 on SH-3 */
67#define _PAGE_HW_SHARED	0x002		/* SH-bit  : shared among processes */
68#define _PAGE_DIRTY	0x004		/* D-bit   : page changed */
69#define _PAGE_CACHABLE	0x008		/* C-bit   : cachable */
70#ifndef CONFIG_X2TLB
71# define _PAGE_SZ0	0x010		/* SZ0-bit : Size of page */
72# define _PAGE_RW	0x020
73# define _PAGE_USER	0x040
74# define _PAGE_SZ1	0x080		/* SZ1-bit : Size of page (on SH-4) */
75#endif
76#define _PAGE_PRESENT	0x100		/* V-bit   : page is valid */
77#define _PAGE_PROTNONE	0x200		/* software: if not present  */
78#define _PAGE_ACCESSED	0x400		/* software: page referenced */
79#define _PAGE_FILE	_PAGE_WT	/* software: pagecache or swap? */
80
81/* Extended mode bits */
82#define _PAGE_EXT_ESZ0		0x0010	/* ESZ0-bit: Size of page */
83#define _PAGE_EXT_ESZ1		0x0020	/* ESZ1-bit: Size of page */
84#define _PAGE_EXT_ESZ2		0x0040	/* ESZ2-bit: Size of page */
85#define _PAGE_EXT_ESZ3		0x0080	/* ESZ3-bit: Size of page */
86
87#define _PAGE_EXT_USER_EXEC	0x0100	/* EPR0-bit: User space executable */
88#define _PAGE_EXT_USER_WRITE	0x0200	/* EPR1-bit: User space writable */
89#define _PAGE_EXT_USER_READ	0x0400	/* EPR2-bit: User space readable */
90
91#define _PAGE_EXT_KERN_EXEC	0x0800	/* EPR3-bit: Kernel space executable */
92#define _PAGE_EXT_KERN_WRITE	0x1000	/* EPR4-bit: Kernel space writable */
93#define _PAGE_EXT_KERN_READ	0x2000	/* EPR5-bit: Kernel space readable */
94
95/* Wrapper for extended mode pgprot twiddling */
96#ifdef CONFIG_X2TLB
97# define _PAGE_EXT(x)		((unsigned long long)(x) << 32)
98#else
99# define _PAGE_EXT(x)		(0)
100#endif
101
102/* software: moves to PTEA.TC (Timing Control) */
103#define _PAGE_PCC_AREA5	0x00000000	/* use BSC registers for area5 */
104#define _PAGE_PCC_AREA6	0x80000000	/* use BSC registers for area6 */
105
106/* software: moves to PTEA.SA[2:0] (Space Attributes) */
107#define _PAGE_PCC_IODYN 0x00000001	/* IO space, dynamically sized bus */
108#define _PAGE_PCC_IO8	0x20000000	/* IO space, 8 bit bus */
109#define _PAGE_PCC_IO16	0x20000001	/* IO space, 16 bit bus */
110#define _PAGE_PCC_COM8	0x40000000	/* Common Memory space, 8 bit bus */
111#define _PAGE_PCC_COM16	0x40000001	/* Common Memory space, 16 bit bus */
112#define _PAGE_PCC_ATR8	0x60000000	/* Attribute Memory space, 8 bit bus */
113#define _PAGE_PCC_ATR16	0x60000001	/* Attribute Memory space, 6 bit bus */
114
115/* Mask which drops unused bits from the PTEL value */
116#ifdef CONFIG_CPU_SH3
117#define _PAGE_CLEAR_FLAGS	(_PAGE_PROTNONE | _PAGE_ACCESSED| \
118				 _PAGE_FILE	| _PAGE_SZ1	| \
119				 _PAGE_HW_SHARED)
120#else
121#define _PAGE_CLEAR_FLAGS	(_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
122#endif
123
124#define _PAGE_FLAGS_HARDWARE_MASK	(0x1fffffff & ~(_PAGE_CLEAR_FLAGS))
125
126/* Hardware flags, page size encoding */
127#if defined(CONFIG_X2TLB)
128# if defined(CONFIG_PAGE_SIZE_4KB)
129#  define _PAGE_FLAGS_HARD	_PAGE_EXT(_PAGE_EXT_ESZ0)
130# elif defined(CONFIG_PAGE_SIZE_8KB)
131#  define _PAGE_FLAGS_HARD	_PAGE_EXT(_PAGE_EXT_ESZ1)
132# elif defined(CONFIG_PAGE_SIZE_64KB)
133#  define _PAGE_FLAGS_HARD	_PAGE_EXT(_PAGE_EXT_ESZ2)
134# endif
135#else
136# if defined(CONFIG_PAGE_SIZE_4KB)
137#  define _PAGE_FLAGS_HARD	_PAGE_SZ0
138# elif defined(CONFIG_PAGE_SIZE_64KB)
139#  define _PAGE_FLAGS_HARD	_PAGE_SZ1
140# endif
141#endif
142
143#if defined(CONFIG_X2TLB)
144# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
145#  define _PAGE_SZHUGE	(_PAGE_EXT_ESZ2)
146# elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
147#  define _PAGE_SZHUGE	(_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2)
148# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
149#  define _PAGE_SZHUGE	(_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2)
150# elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
151#  define _PAGE_SZHUGE	(_PAGE_EXT_ESZ3)
152# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
153#  define _PAGE_SZHUGE	(_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3)
154# endif
155#else
156# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
157#  define _PAGE_SZHUGE	(_PAGE_SZ1)
158# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
159#  define _PAGE_SZHUGE	(_PAGE_SZ0 | _PAGE_SZ1)
160# endif
161#endif
162
163/*
164 * Stub out _PAGE_SZHUGE if we don't have a good definition for it,
165 * to make pte_mkhuge() happy.
166 */
167#ifndef _PAGE_SZHUGE
168# define _PAGE_SZHUGE	(_PAGE_FLAGS_HARD)
169#endif
170
171#define _PAGE_CHG_MASK \
172	(PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY)
173
174#ifndef __ASSEMBLY__
175
176#if defined(CONFIG_X2TLB)     /* SH-X2 TLB */
177#define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
178				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
179
180#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
181				 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
182				 _PAGE_EXT(_PAGE_EXT_USER_READ | \
183					   _PAGE_EXT_USER_WRITE))
184
185#define PAGE_EXECREAD	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
186				 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
187				 _PAGE_EXT(_PAGE_EXT_USER_EXEC | \
188					   _PAGE_EXT_USER_READ))
189
190#define PAGE_COPY	PAGE_EXECREAD
191
192#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
193				 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
194				 _PAGE_EXT(_PAGE_EXT_USER_READ))
195
196#define PAGE_WRITEONLY	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
197				 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
198				 _PAGE_EXT(_PAGE_EXT_USER_WRITE))
199
200#define PAGE_RWX	__pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
201				 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
202				 _PAGE_EXT(_PAGE_EXT_USER_WRITE | \
203					   _PAGE_EXT_USER_READ  | \
204					   _PAGE_EXT_USER_EXEC))
205
206#define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
207				 _PAGE_DIRTY | _PAGE_ACCESSED | \
208				 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
209				 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
210					   _PAGE_EXT_KERN_WRITE | \
211					   _PAGE_EXT_KERN_EXEC))
212
213#define PAGE_KERNEL_NOCACHE \
214			__pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
215				 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
216				 _PAGE_FLAGS_HARD | \
217				 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
218					   _PAGE_EXT_KERN_WRITE | \
219					   _PAGE_EXT_KERN_EXEC))
220
221#define PAGE_KERNEL_RO	__pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
222				 _PAGE_DIRTY | _PAGE_ACCESSED | \
223				 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
224				 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
225					   _PAGE_EXT_KERN_EXEC))
226
227#define PAGE_KERNEL_PCC(slot, type) \
228			__pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
229				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
230				 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
231					   _PAGE_EXT_KERN_WRITE | \
232					   _PAGE_EXT_KERN_EXEC) \
233				 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
234				 (type))
235
236#elif defined(CONFIG_MMU)   /* SH-X TLB */
237#define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
238				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
239
240#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
241				 _PAGE_CACHABLE | _PAGE_ACCESSED | \
242				 _PAGE_FLAGS_HARD)
243
244#define PAGE_COPY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
245				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
246
247#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
248				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
249
250#define PAGE_EXECREAD	PAGE_READONLY
251#define PAGE_RWX	PAGE_SHARED
252#define PAGE_WRITEONLY	PAGE_SHARED
253
254#define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \
255				 _PAGE_DIRTY | _PAGE_ACCESSED | \
256				 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
257
258#define PAGE_KERNEL_NOCACHE \
259			__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
260				 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
261				 _PAGE_FLAGS_HARD)
262
263#define PAGE_KERNEL_RO	__pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
264				 _PAGE_DIRTY | _PAGE_ACCESSED | \
265				 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
266
267#define PAGE_KERNEL_PCC(slot, type) \
268			__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
269				 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
270				 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
271				 (type))
272#else /* no mmu */
273#define PAGE_NONE		__pgprot(0)
274#define PAGE_SHARED		__pgprot(0)
275#define PAGE_COPY		__pgprot(0)
276#define PAGE_EXECREAD		__pgprot(0)
277#define PAGE_RWX		__pgprot(0)
278#define PAGE_READONLY		__pgprot(0)
279#define PAGE_WRITEONLY		__pgprot(0)
280#define PAGE_KERNEL		__pgprot(0)
281#define PAGE_KERNEL_NOCACHE	__pgprot(0)
282#define PAGE_KERNEL_RO		__pgprot(0)
283#define PAGE_KERNEL_PCC		__pgprot(0)
284#endif
285
286#endif /* __ASSEMBLY__ */
287
288/*
289 * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page
290 * protection for execute, and considers it the same as a read. Also, write
291 * permission implies read permission. This is the closest we can get..
292 *
293 * SH-X2 (SH7785) and later parts take this to the opposite end of the extreme,
294 * not only supporting separate execute, read, and write bits, but having
295 * completely separate permission bits for user and kernel space.
296 */
297	 /*xwr*/
298#define __P000	PAGE_NONE
299#define __P001	PAGE_READONLY
300#define __P010	PAGE_COPY
301#define __P011	PAGE_COPY
302#define __P100	PAGE_EXECREAD
303#define __P101	PAGE_EXECREAD
304#define __P110	PAGE_COPY
305#define __P111	PAGE_COPY
306
307#define __S000	PAGE_NONE
308#define __S001	PAGE_READONLY
309#define __S010	PAGE_WRITEONLY
310#define __S011	PAGE_SHARED
311#define __S100	PAGE_EXECREAD
312#define __S101	PAGE_EXECREAD
313#define __S110	PAGE_RWX
314#define __S111	PAGE_RWX
315
316#ifndef __ASSEMBLY__
317
318/*
319 * Certain architectures need to do special things when PTEs
320 * within a page table are directly modified.  Thus, the following
321 * hook is made available.
322 */
323#ifdef CONFIG_X2TLB
324static inline void set_pte(pte_t *ptep, pte_t pte)
325{
326	ptep->pte_high = pte.pte_high;
327	smp_wmb();
328	ptep->pte_low = pte.pte_low;
329}
330#else
331#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
332#endif
333
334#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
335
336/*
337 * (pmds are folded into pgds so this doesn't get actually called,
338 * but the define is needed for a generic inline function.)
339 */
340#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
341
342#define pte_pfn(x)		((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
343#define pfn_pte(pfn, prot)	__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
344#define pfn_pmd(pfn, prot)	__pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
345
346#define pte_none(x)	(!pte_val(x))
347#define pte_present(x)	(pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
348#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
349
350#define pmd_none(x)	(!pmd_val(x))
351#define pmd_present(x)	(pmd_val(x))
352#define pmd_clear(xp)	do { set_pmd(xp, __pmd(0)); } while (0)
353#define	pmd_bad(x)	(pmd_val(x) & ~PAGE_MASK)
354
355#define pages_to_mb(x)	((x) >> (20-PAGE_SHIFT))
356#define pte_page(x)	phys_to_page(pte_val(x)&PTE_PHYS_MASK)
357
358/*
359 * The following only work if pte_present() is true.
360 * Undefined behaviour if not..
361 */
362#define pte_not_present(pte)	(!(pte_val(pte) & _PAGE_PRESENT))
363#define pte_dirty(pte)		(pte_val(pte) & _PAGE_DIRTY)
364#define pte_young(pte)		(pte_val(pte) & _PAGE_ACCESSED)
365#define pte_file(pte)		(pte_val(pte) & _PAGE_FILE)
366
367#ifdef CONFIG_X2TLB
368#define pte_read(pte)		((pte).pte_high & _PAGE_EXT_USER_READ)
369#define pte_exec(pte)		((pte).pte_high & _PAGE_EXT_USER_EXEC)
370#define pte_write(pte)		((pte).pte_high & _PAGE_EXT_USER_WRITE)
371#else
372#define pte_read(pte)		(pte_val(pte) & _PAGE_USER)
373#define pte_exec(pte)		(pte_val(pte) & _PAGE_USER)
374#define pte_write(pte)		(pte_val(pte) & _PAGE_RW)
375#endif
376
377#define PTE_BIT_FUNC(h,fn,op) \
378static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; }
379
380#ifdef CONFIG_X2TLB
381/*
382 * We cheat a bit in the SH-X2 TLB case. As the permission bits are
383 * individually toggled (and user permissions are entirely decoupled from
384 * kernel permissions), we attempt to couple them a bit more sanely here.
385 */
386PTE_BIT_FUNC(high, rdprotect, &= ~_PAGE_EXT_USER_READ);
387PTE_BIT_FUNC(high, mkread, |= _PAGE_EXT_USER_READ | _PAGE_EXT_KERN_READ);
388PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE);
389PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);
390PTE_BIT_FUNC(high, exprotect, &= ~_PAGE_EXT_USER_EXEC);
391PTE_BIT_FUNC(high, mkexec, |= _PAGE_EXT_USER_EXEC | _PAGE_EXT_KERN_EXEC);
392PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE);
393#else
394PTE_BIT_FUNC(low, rdprotect, &= ~_PAGE_USER);
395PTE_BIT_FUNC(low, mkread, |= _PAGE_USER);
396PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW);
397PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW);
398PTE_BIT_FUNC(low, exprotect, &= ~_PAGE_USER);
399PTE_BIT_FUNC(low, mkexec, |= _PAGE_USER);
400PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE);
401#endif
402
403PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY);
404PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY);
405PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
406PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
407
408/*
409 * Macro and implementation to make a page protection as uncachable.
410 */
411#define pgprot_noncached pgprot_noncached
412
413static inline pgprot_t pgprot_noncached(pgprot_t _prot)
414{
415	unsigned long prot = pgprot_val(_prot);
416
417	prot &= ~_PAGE_CACHABLE;
418	return __pgprot(prot);
419}
420
421#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
422
423/*
424 * Conversion functions: convert a page and protection to a page entry,
425 * and a page entry and page directory to the page they refer to.
426 *
427 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
428 */
429#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))
430
431static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
432{
433	set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) |
434			    pgprot_val(newprot)));
435	return pte;
436}
437
438#define pmd_page_vaddr(pmd)	pmd_val(pmd)
439#define pmd_page(pmd)		(virt_to_page(pmd_val(pmd)))
440
441/* to find an entry in a page-table-directory. */
442#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
443#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
444
445/* to find an entry in a kernel page-table-directory */
446#define pgd_offset_k(address) pgd_offset(&init_mm, address)
447
448/* Find an entry in the third-level page table.. */
449#define pte_index(address) \
450		((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
451#define pte_offset_kernel(dir, address) \
452	((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
453#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
454#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
455#define pte_unmap(pte)		do { } while (0)
456#define pte_unmap_nested(pte)	do { } while (0)
457
458#ifdef CONFIG_X2TLB
459#define pte_ERROR(e) \
460	printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \
461	       &(e), (e).pte_high, (e).pte_low)
462#else
463#define pte_ERROR(e) \
464	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
465#endif
466
467#define pgd_ERROR(e) \
468	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
469
470struct vm_area_struct;
471extern void update_mmu_cache(struct vm_area_struct * vma,
472			     unsigned long address, pte_t pte);
473
474/*
475 * Encode and de-code a swap entry
476 *
477 * Constraints:
478 *	_PAGE_FILE at bit 0
479 *	_PAGE_PRESENT at bit 8
480 *	_PAGE_PROTNONE at bit 9
481 *
482 * For the normal case, we encode the swap type into bits 0:7 and the
483 * swap offset into bits 10:30. For the 64-bit PTE case, we keep the
484 * preserved bits in the low 32-bits and use the upper 32 as the swap
485 * offset (along with a 5-bit type), following the same approach as x86
486 * PAE. This keeps the logic quite simple, and allows for a full 32
487 * PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with
488 * in the pte_low case.
489 *
490 * As is evident by the Alpha code, if we ever get a 64-bit unsigned
491 * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes
492 * much cleaner..
493 *
494 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
495 *       and _PAGE_PROTNONE bits
496 */
497#ifdef CONFIG_X2TLB
498#define __swp_type(x)			((x).val & 0x1f)
499#define __swp_offset(x)			((x).val >> 5)
500#define __swp_entry(type, offset)	((swp_entry_t){ (type) | (offset) << 5})
501#define __pte_to_swp_entry(pte)		((swp_entry_t){ (pte).pte_high })
502#define __swp_entry_to_pte(x)		((pte_t){ 0, (x).val })
503
504/*
505 * Encode and decode a nonlinear file mapping entry
506 */
507#define pte_to_pgoff(pte)		((pte).pte_high)
508#define pgoff_to_pte(off)		((pte_t) { _PAGE_FILE, (off) })
509
510#define PTE_FILE_MAX_BITS		32
511#else
512#define __swp_type(x)			((x).val & 0xff)
513#define __swp_offset(x)			((x).val >> 10)
514#define __swp_entry(type, offset)	((swp_entry_t){(type) | (offset) <<10})
515
516#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) >> 1 })
517#define __swp_entry_to_pte(x)		((pte_t) { (x).val << 1 })
518
519/*
520 * Encode and decode a nonlinear file mapping entry
521 */
522#define PTE_FILE_MAX_BITS	29
523#define pte_to_pgoff(pte)	(pte_val(pte) >> 1)
524#define pgoff_to_pte(off)	((pte_t) { ((off) << 1) | _PAGE_FILE })
525#endif
526
527typedef pte_t *pte_addr_t;
528
529#define kern_addr_valid(addr)	(1)
530
531#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)		\
532		remap_pfn_range(vma, vaddr, pfn, size, prot)
533
534struct mm_struct;
535
536/*
537 * No page table caches to initialise
538 */
539#define pgtable_cache_init()	do { } while (0)
540
541#ifndef CONFIG_MMU
542extern unsigned int kobjsize(const void *objp);
543#endif /* !CONFIG_MMU */
544
545#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
546#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
547extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
548#endif
549
550extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
551extern void paging_init(void);
552
553#include <asm-generic/pgtable.h>
554
555#endif /* !__ASSEMBLY__ */
556#endif /* __ASM_SH_PAGE_H */
557