1/****************************************************************************/
2
3/*
4 *	anchor.h -- Anchor CO-MEM Lite PCI host bridge part.
5 *
6 *	(C) Copyright 2000, Moreton Bay (www.moreton.com.au)
7 */
8
9/****************************************************************************/
10#ifndef	anchor_h
11#define	anchor_h
12/****************************************************************************/
13
14/*
15 *	Define basic addressing info.
16 */
17#if defined(CONFIG_M5407C3)
18#define	COMEM_BASE	0xFFFF0000	/* Base of CO-MEM address space */
19#define	COMEM_IRQ	25		/* IRQ of anchor part */
20#else
21#define	COMEM_BASE	0x80000000	/* Base of CO-MEM address space */
22#define	COMEM_IRQ	25		/* IRQ of anchor part */
23#endif
24
25/****************************************************************************/
26
27/*
28 *	4-byte registers of CO-MEM, so adjust register addresses for
29 *	easy access. Handy macro for word access too.
30 */
31#define	LREG(a)		((a) >> 2)
32#define	WREG(a)		((a) >> 1)
33
34
35/*
36 *	Define base addresses within CO-MEM Lite register address space.
37 */
38#define	COMEM_I2O	0x0000		/* I2O registers */
39#define	COMEM_OPREGS	0x0400		/* Operation registers */
40#define	COMEM_PCIBUS	0x2000		/* Direct access to PCI bus */
41#define	COMEM_SHMEM	0x4000		/* Shared memory region */
42
43#define	COMEM_SHMEMSIZE	0x4000		/* Size of shared memory */
44
45
46/*
47 *	Define CO-MEM Registers.
48 */
49#define	COMEM_I2OHISR	0x0030		/* I2O host interrupt status */
50#define	COMEM_I2OHIMR	0x0034		/* I2O host interrupt mask */
51#define	COMEM_I2OLISR	0x0038		/* I2O local interrupt status */
52#define	COMEM_I2OLIMR	0x003c		/* I2O local interrupt mask */
53#define	COMEM_IBFPFIFO	0x0040		/* I2O inbound free/post FIFO */
54#define	COMEM_OBPFFIFO	0x0044		/* I2O outbound post/free FIFO */
55#define	COMEM_IBPFFIFO	0x0048		/* I2O inbound post/free FIFO */
56#define	COMEM_OBFPFIFO	0x004c		/* I2O outbound free/post FIFO */
57
58#define	COMEM_DAHBASE	0x0460		/* Direct access base address */
59
60#define	COMEM_NVCMD	0x04a0		/* I2C serial command */
61#define	COMEM_NVREAD	0x04a4		/* I2C serial read */
62#define	COMEM_NVSTAT	0x04a8		/* I2C status */
63
64#define	COMEM_DMALBASE	0x04b0		/* DMA local base address */
65#define	COMEM_DMAHBASE	0x04b4		/* DMA host base address */
66#define	COMEM_DMASIZE	0x04b8		/* DMA size */
67#define	COMEM_DMACTL	0x04bc		/* DMA control */
68
69#define	COMEM_HCTL	0x04e0		/* Host control */
70#define	COMEM_HINT	0x04e4		/* Host interrupt control/status */
71#define	COMEM_HLDATA	0x04e8		/* Host to local data mailbox */
72#define	COMEM_LINT	0x04f4		/* Local interrupt contole status */
73#define	COMEM_LHDATA	0x04f8		/* Local to host data mailbox */
74
75#define	COMEM_LBUSCFG	0x04fc		/* Local bus configuration */
76
77
78/*
79 *	Commands and flags for use with Direct Access Register.
80 */
81#define	COMEM_DA_IACK	0x00000000	/* Interrupt acknowledge (read) */
82#define	COMEM_DA_SPCL	0x00000010	/* Special cycle (write) */
83#define	COMEM_DA_MEMRD	0x00000004	/* Memory read cycle */
84#define	COMEM_DA_MEMWR	0x00000004	/* Memory write cycle */
85#define	COMEM_DA_IORD	0x00000002	/* I/O read cycle */
86#define	COMEM_DA_IOWR	0x00000002	/* I/O write cycle */
87#define	COMEM_DA_CFGRD	0x00000006	/* Configuration read cycle */
88#define	COMEM_DA_CFGWR	0x00000006	/* Configuration write cycle */
89
90#define	COMEM_DA_ADDR(a)	((a) & 0xffffe000)
91
92#define	COMEM_DA_OFFSET(a)	((a) & 0x00001fff)
93
94
95/*
96 *	The PCI bus will be limited in what slots will actually be used.
97 *	Define valid device numbers for different boards.
98 */
99#if defined(CONFIG_M5407C3)
100#define	COMEM_MINDEV	14		/* Minimum valid DEVICE */
101#define	COMEM_MAXDEV	14		/* Maximum valid DEVICE */
102#define	COMEM_BRIDGEDEV	15		/* Slot bridge is in */
103#else
104#define	COMEM_MINDEV	0		/* Minimum valid DEVICE */
105#define	COMEM_MAXDEV	3		/* Maximum valid DEVICE */
106#endif
107
108#define	COMEM_MAXPCI	(COMEM_MAXDEV+1)	/* Maximum PCI devices */
109
110
111/****************************************************************************/
112#endif	/* anchor_h */
113