1/*
2 *  linux/include/asm-arm/ptrace.h
3 *
4 *  Copyright (C) 1996-2003 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_ARM_PTRACE_H
11#define __ASM_ARM_PTRACE_H
12
13#define PTRACE_GETREGS		12
14#define PTRACE_SETREGS		13
15#define PTRACE_GETFPREGS	14
16#define PTRACE_SETFPREGS	15
17/* PTRACE_ATTACH is 16 */
18/* PTRACE_DETACH is 17 */
19#define PTRACE_GETWMMXREGS	18
20#define PTRACE_SETWMMXREGS	19
21/* 20 is unused */
22#define PTRACE_OLDSETOPTIONS	21
23#define PTRACE_GET_THREAD_AREA	22
24#define PTRACE_SET_SYSCALL	23
25/* PTRACE_SYSCALL is 24 */
26#define PTRACE_GETCRUNCHREGS	25
27#define PTRACE_SETCRUNCHREGS	26
28
29/*
30 * PSR bits
31 */
32#define USR26_MODE	0x00000000
33#define FIQ26_MODE	0x00000001
34#define IRQ26_MODE	0x00000002
35#define SVC26_MODE	0x00000003
36#define USR_MODE	0x00000010
37#define FIQ_MODE	0x00000011
38#define IRQ_MODE	0x00000012
39#define SVC_MODE	0x00000013
40#define ABT_MODE	0x00000017
41#define UND_MODE	0x0000001b
42#define SYSTEM_MODE	0x0000001f
43#define MODE32_BIT	0x00000010
44#define MODE_MASK	0x0000001f
45#define PSR_T_BIT	0x00000020
46#define PSR_F_BIT	0x00000040
47#define PSR_I_BIT	0x00000080
48#define PSR_J_BIT	0x01000000
49#define PSR_Q_BIT	0x08000000
50#define PSR_V_BIT	0x10000000
51#define PSR_C_BIT	0x20000000
52#define PSR_Z_BIT	0x40000000
53#define PSR_N_BIT	0x80000000
54#define PCMASK		0
55
56/*
57 * Groups of PSR bits
58 */
59#define PSR_f		0xff000000	/* Flags		*/
60#define PSR_s		0x00ff0000	/* Status		*/
61#define PSR_x		0x0000ff00	/* Extension		*/
62#define PSR_c		0x000000ff	/* Control		*/
63
64#ifndef __ASSEMBLY__
65
66/*
67 * This struct defines the way the registers are stored on the
68 * stack during a system call.  Note that sizeof(struct pt_regs)
69 * has to be a multiple of 8.
70 */
71struct pt_regs {
72	long uregs[18];
73};
74
75#define ARM_cpsr	uregs[16]
76#define ARM_pc		uregs[15]
77#define ARM_lr		uregs[14]
78#define ARM_sp		uregs[13]
79#define ARM_ip		uregs[12]
80#define ARM_fp		uregs[11]
81#define ARM_r10		uregs[10]
82#define ARM_r9		uregs[9]
83#define ARM_r8		uregs[8]
84#define ARM_r7		uregs[7]
85#define ARM_r6		uregs[6]
86#define ARM_r5		uregs[5]
87#define ARM_r4		uregs[4]
88#define ARM_r3		uregs[3]
89#define ARM_r2		uregs[2]
90#define ARM_r1		uregs[1]
91#define ARM_r0		uregs[0]
92#define ARM_ORIG_r0	uregs[17]
93
94#ifdef __KERNEL__
95
96#define user_mode(regs)	\
97	(((regs)->ARM_cpsr & 0xf) == 0)
98
99#ifdef CONFIG_ARM_THUMB
100#define thumb_mode(regs) \
101	(((regs)->ARM_cpsr & PSR_T_BIT))
102#else
103#define thumb_mode(regs) (0)
104#endif
105
106#define processor_mode(regs) \
107	((regs)->ARM_cpsr & MODE_MASK)
108
109#define interrupts_enabled(regs) \
110	(!((regs)->ARM_cpsr & PSR_I_BIT))
111
112#define fast_interrupts_enabled(regs) \
113	(!((regs)->ARM_cpsr & PSR_F_BIT))
114
115/* Are the current registers suitable for user mode?
116 * (used to maintain security in signal handlers)
117 */
118static inline int valid_user_regs(struct pt_regs *regs)
119{
120	if (user_mode(regs) &&
121	    (regs->ARM_cpsr & (PSR_F_BIT|PSR_I_BIT)) == 0)
122		return 1;
123
124	/*
125	 * Force CPSR to something logical...
126	 */
127	regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
128
129	return 0;
130}
131
132#endif	/* __KERNEL__ */
133
134#define pc_pointer(v) \
135	((v) & ~PCMASK)
136
137#define instruction_pointer(regs) \
138	(pc_pointer((regs)->ARM_pc))
139
140#ifdef CONFIG_SMP
141extern unsigned long profile_pc(struct pt_regs *regs);
142#else
143#define profile_pc(regs) instruction_pointer(regs)
144#endif
145
146#ifdef __KERNEL__
147#define predicate(x)		((x) & 0xf0000000)
148#define PREDICATE_ALWAYS	0xe0000000
149#endif
150
151#endif /* __ASSEMBLY__ */
152
153#endif
154