1/* 2 * linux/include/asm-arm/arch-sa1100/neponset.h 3 * 4 * Created 2000/06/05 by Nicolas Pitre <nico@cam.org> 5 * 6 * This file contains the hardware specific definitions for Assabet 7 * Only include this file from SA1100-specific files. 8 * 9 * 2000/05/23 John Dorsey <john+@cs.cmu.edu> 10 * Definitions for Neponset added. 11 */ 12#ifndef __ASM_ARCH_NEPONSET_H 13#define __ASM_ARCH_NEPONSET_H 14 15/* 16 * Neponset definitions: 17 */ 18 19#define NEPONSET_CPLD_BASE (0x10000000) 20#define Nep_p2v( x ) ((x) - NEPONSET_CPLD_BASE + 0xf3000000) 21#define Nep_v2p( x ) ((x) - 0xf3000000 + NEPONSET_CPLD_BASE) 22 23#define _IRR 0x10000024 /* Interrupt Reason Register */ 24#define _AUD_CTL 0x100000c0 /* Audio controls (RW) */ 25#define _MDM_CTL_0 0x100000b0 /* Modem control 0 (RW) */ 26#define _MDM_CTL_1 0x100000b4 /* Modem control 1 (RW) */ 27#define _NCR_0 0x100000a0 /* Control Register (RW) */ 28#define _KP_X_OUT 0x10000090 /* Keypad row write (RW) */ 29#define _KP_Y_IN 0x10000080 /* Keypad column read (RO) */ 30#define _SWPK 0x10000020 /* Switch pack (RO) */ 31#define _WHOAMI 0x10000000 /* System ID Register (RO) */ 32 33#define _LEDS 0x10000010 /* LEDs [31:0] (WO) */ 34 35#define IRR (*((volatile u_char *) Nep_p2v(_IRR))) 36#define AUD_CTL (*((volatile u_char *) Nep_p2v(_AUD_CTL))) 37#define MDM_CTL_0 (*((volatile u_char *) Nep_p2v(_MDM_CTL_0))) 38#define MDM_CTL_1 (*((volatile u_char *) Nep_p2v(_MDM_CTL_1))) 39#define NCR_0 (*((volatile u_char *) Nep_p2v(_NCR_0))) 40#define KP_X_OUT (*((volatile u_char *) Nep_p2v(_KP_X_OUT))) 41#define KP_Y_IN (*((volatile u_char *) Nep_p2v(_KP_Y_IN))) 42#define SWPK (*((volatile u_char *) Nep_p2v(_SWPK))) 43#define WHOAMI (*((volatile u_char *) Nep_p2v(_WHOAMI))) 44 45#define LEDS (*((volatile Word *) Nep_p2v(_LEDS))) 46 47#define IRR_ETHERNET (1<<0) 48#define IRR_USAR (1<<1) 49#define IRR_SA1111 (1<<2) 50 51#define AUD_SEL_1341 (1<<0) 52#define AUD_MUTE_1341 (1<<1) 53 54#define MDM_CTL0_RTS1 (1 << 0) 55#define MDM_CTL0_DTR1 (1 << 1) 56#define MDM_CTL0_RTS2 (1 << 2) 57#define MDM_CTL0_DTR2 (1 << 3) 58 59#define MDM_CTL1_CTS1 (1 << 0) 60#define MDM_CTL1_DSR1 (1 << 1) 61#define MDM_CTL1_DCD1 (1 << 2) 62#define MDM_CTL1_CTS2 (1 << 3) 63#define MDM_CTL1_DSR2 (1 << 4) 64#define MDM_CTL1_DCD2 (1 << 5) 65 66#define NCR_GP01_OFF (1<<0) 67#define NCR_TP_PWR_EN (1<<1) 68#define NCR_MS_PWR_EN (1<<2) 69#define NCR_ENET_OSC_EN (1<<3) 70#define NCR_SPI_KB_WK_UP (1<<4) 71#define NCR_A0VPP (1<<5) 72#define NCR_A1VPP (1<<6) 73 74#endif 75