1/* 2 * 3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400 4 * 5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz> 6 * 7 * Portions Copyright (c) 2001 Matrox Graphics Inc. 8 * 9 * Version: 1.65 2002/08/14 10 * 11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org> 12 * 13 * Contributors: "menion?" <menion@mindless.com> 14 * Betatesting, fixes, ideas 15 * 16 * "Kurt Garloff" <garloff@suse.de> 17 * Betatesting, fixes, ideas, videomodes, videomodes timmings 18 * 19 * "Tom Rini" <trini@kernel.crashing.org> 20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas 21 * 22 * "Bibek Sahu" <scorpio@dodds.net> 23 * Access device through readb|w|l and write b|w|l 24 * Extensive debugging stuff 25 * 26 * "Daniel Haun" <haund@usa.net> 27 * Testing, hardware cursor fixes 28 * 29 * "Scott Wood" <sawst46+@pitt.edu> 30 * Fixes 31 * 32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de> 33 * Betatesting 34 * 35 * "Kelly French" <targon@hazmat.com> 36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es> 37 * Betatesting, bug reporting 38 * 39 * "Pablo Bianucci" <pbian@pccp.com.ar> 40 * Fixes, ideas, betatesting 41 * 42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es> 43 * Fixes, enhandcements, ideas, betatesting 44 * 45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp> 46 * PPC betatesting, PPC support, backward compatibility 47 * 48 * "Paul Womar" <Paul@pwomar.demon.co.uk> 49 * "Owen Waller" <O.Waller@ee.qub.ac.uk> 50 * PPC betatesting 51 * 52 * "Thomas Pornin" <pornin@bolet.ens.fr> 53 * Alpha betatesting 54 * 55 * "Pieter van Leuven" <pvl@iae.nl> 56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de> 57 * G100 testing 58 * 59 * "H. Peter Arvin" <hpa@transmeta.com> 60 * Ideas 61 * 62 * "Cort Dougan" <cort@cs.nmt.edu> 63 * CHRP fixes and PReP cleanup 64 * 65 * "Mark Vojkovich" <mvojkovi@ucsd.edu> 66 * G400 support 67 * 68 * "Samuel Hocevar" <sam@via.ecp.fr> 69 * Fixes 70 * 71 * "Anton Altaparmakov" <AntonA@bigfoot.com> 72 * G400 MAX/non-MAX distinction 73 * 74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com> 75 * memtype extension (needed for GXT130P RS/6000 adapter) 76 * 77 * "Uns Lider" <unslider@miranda.org> 78 * G100 PLNWT fixes 79 * 80 * "Denis Zaitsev" <zzz@cd-club.ru> 81 * Fixes 82 * 83 * "Mike Pieper" <mike@pieper-family.de> 84 * TVOut enhandcements, V4L2 control interface. 85 * 86 * "Diego Biurrun" <diego@biurrun.de> 87 * DFP testing 88 * 89 * (following author is not in any relation with this code, but his code 90 * is included in this driver) 91 * 92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards 93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de> 94 * 95 * (following author is not in any relation with this code, but his ideas 96 * were used when writing this driver) 97 * 98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk> 99 * 100 */ 101 102#include <linux/version.h> 103 104#define __OLD_VIDIOC_ 105 106#include "matroxfb_base.h" 107#include "matroxfb_misc.h" 108#include "matroxfb_accel.h" 109#include "matroxfb_DAC1064.h" 110#include "matroxfb_Ti3026.h" 111#include "matroxfb_maven.h" 112#include "matroxfb_crtc2.h" 113#include "matroxfb_g450.h" 114#include <linux/matroxfb.h> 115#include <linux/interrupt.h> 116#include <asm/uaccess.h> 117 118#ifdef CONFIG_PPC_PMAC 119#include <asm/machdep.h> 120unsigned char nvram_read_byte(int); 121static int default_vmode = VMODE_NVRAM; 122static int default_cmode = CMODE_NVRAM; 123#endif 124 125static void matroxfb_unregister_device(struct matrox_fb_info* minfo); 126 127/* --------------------------------------------------------------------- */ 128 129/* 130 * card parameters 131 */ 132 133/* --------------------------------------------------------------------- */ 134 135static struct fb_var_screeninfo vesafb_defined = { 136 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/ 137 0,0, /* virtual -> visible no offset */ 138 8, /* depth -> load bits_per_pixel */ 139 0, /* greyscale ? */ 140 {0,0,0}, /* R */ 141 {0,0,0}, /* G */ 142 {0,0,0}, /* B */ 143 {0,0,0}, /* transparency */ 144 0, /* standard pixel format */ 145 FB_ACTIVATE_NOW, 146 -1,-1, 147 FB_ACCELF_TEXT, /* accel flags */ 148 39721L,48L,16L,33L,10L, 149 96L,2L,~0, /* No sync info */ 150 FB_VMODE_NONINTERLACED, 151 0, {0,0,0,0,0} 152}; 153 154 155 156/* --------------------------------------------------------------------- */ 157static void update_crtc2(WPMINFO unsigned int pos) { 158 struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info); 159 160 /* Make sure that displays are compatible */ 161 if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel) 162 && (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual) 163 && (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length) 164 ) { 165 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) { 166 case 16: 167 case 32: 168 pos = pos * 8; 169 if (info->interlaced) { 170 mga_outl(0x3C2C, pos); 171 mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8); 172 } else { 173 mga_outl(0x3C28, pos); 174 } 175 break; 176 } 177 } 178} 179 180static void matroxfb_crtc1_panpos(WPMINFO2) { 181 if (ACCESS_FBINFO(crtc1.panpos) >= 0) { 182 unsigned long flags; 183 int panpos; 184 185 matroxfb_DAC_lock_irqsave(flags); 186 panpos = ACCESS_FBINFO(crtc1.panpos); 187 if (panpos >= 0) { 188 unsigned int extvga_reg; 189 190 ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */ 191 extvga_reg = mga_inb(M_EXTVGA_INDEX); 192 mga_setr(M_EXTVGA_INDEX, 0x00, panpos); 193 if (extvga_reg != 0x00) { 194 mga_outb(M_EXTVGA_INDEX, extvga_reg); 195 } 196 } 197 matroxfb_DAC_unlock_irqrestore(flags); 198 } 199} 200 201static irqreturn_t matrox_irq(int irq, void *dev_id) 202{ 203 u_int32_t status; 204 int handled = 0; 205 206 MINFO_FROM(dev_id); 207 208 status = mga_inl(M_STATUS); 209 210 if (status & 0x20) { 211 mga_outl(M_ICLEAR, 0x20); 212 ACCESS_FBINFO(crtc1.vsync.cnt)++; 213 matroxfb_crtc1_panpos(PMINFO2); 214 wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait)); 215 handled = 1; 216 } 217 if (status & 0x200) { 218 mga_outl(M_ICLEAR, 0x200); 219 ACCESS_FBINFO(crtc2.vsync.cnt)++; 220 wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait)); 221 handled = 1; 222 } 223 return IRQ_RETVAL(handled); 224} 225 226int matroxfb_enable_irq(WPMINFO int reenable) { 227 u_int32_t bm; 228 229 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) 230 bm = 0x220; 231 else 232 bm = 0x020; 233 234 if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) { 235 if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq, 236 IRQF_SHARED, "matroxfb", MINFO)) { 237 clear_bit(0, &ACCESS_FBINFO(irq_flags)); 238 return -EINVAL; 239 } 240 /* Clear any pending field interrupts */ 241 mga_outl(M_ICLEAR, bm); 242 mga_outl(M_IEN, mga_inl(M_IEN) | bm); 243 } else if (reenable) { 244 u_int32_t ien; 245 246 ien = mga_inl(M_IEN); 247 if ((ien & bm) != bm) { 248 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien); 249 mga_outl(M_IEN, ien | bm); 250 } 251 } 252 return 0; 253} 254 255static void matroxfb_disable_irq(WPMINFO2) { 256 if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) { 257 /* Flush pending pan-at-vbl request... */ 258 matroxfb_crtc1_panpos(PMINFO2); 259 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) 260 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220); 261 else 262 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20); 263 free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO); 264 } 265} 266 267int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) { 268 struct matrox_vsync *vs; 269 unsigned int cnt; 270 int ret; 271 272 switch (crtc) { 273 case 0: 274 vs = &ACCESS_FBINFO(crtc1.vsync); 275 break; 276 case 1: 277 if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) { 278 return -ENODEV; 279 } 280 vs = &ACCESS_FBINFO(crtc2.vsync); 281 break; 282 default: 283 return -ENODEV; 284 } 285 ret = matroxfb_enable_irq(PMINFO 0); 286 if (ret) { 287 return ret; 288 } 289 290 cnt = vs->cnt; 291 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10); 292 if (ret < 0) { 293 return ret; 294 } 295 if (ret == 0) { 296 matroxfb_enable_irq(PMINFO 1); 297 return -ETIMEDOUT; 298 } 299 return 0; 300} 301 302/* --------------------------------------------------------------------- */ 303 304static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) { 305 unsigned int pos; 306 unsigned short p0, p1, p2; 307#ifdef CONFIG_FB_MATROX_32MB 308 unsigned int p3; 309#endif 310 int vbl; 311 unsigned long flags; 312 313 CRITFLAGS 314 315 DBG(__FUNCTION__) 316 317 if (ACCESS_FBINFO(dead)) 318 return; 319 320 ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset; 321 ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset; 322 pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32; 323 pos += ACCESS_FBINFO(curr.ydstorg.chunks); 324 p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF; 325 p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8; 326 p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40); 327#ifdef CONFIG_FB_MATROX_32MB 328 p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21; 329#endif 330 331 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */ 332 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0); 333 334 CRITBEGIN 335 336 matroxfb_DAC_lock_irqsave(flags); 337 mga_setr(M_CRTC_INDEX, 0x0D, p0); 338 mga_setr(M_CRTC_INDEX, 0x0C, p1); 339#ifdef CONFIG_FB_MATROX_32MB 340 if (ACCESS_FBINFO(devflags.support32MB)) 341 mga_setr(M_EXTVGA_INDEX, 0x08, p3); 342#endif 343 if (vbl) { 344 ACCESS_FBINFO(crtc1.panpos) = p2; 345 } else { 346 /* Abort any pending change */ 347 ACCESS_FBINFO(crtc1.panpos) = -1; 348 mga_setr(M_EXTVGA_INDEX, 0x00, p2); 349 } 350 matroxfb_DAC_unlock_irqrestore(flags); 351 352 update_crtc2(PMINFO pos); 353 354 CRITEND 355} 356 357static void matroxfb_remove(WPMINFO int dummy) { 358 /* Currently we are holding big kernel lock on all dead & usecount updates. 359 * Destroy everything after all users release it. Especially do not unregister 360 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check 361 * for device unplugged when in use. 362 * In future we should point mmio.vbase & video.vbase somewhere where we can 363 * write data without causing too much damage... 364 */ 365 366 ACCESS_FBINFO(dead) = 1; 367 if (ACCESS_FBINFO(usecount)) { 368 /* destroy it later */ 369 return; 370 } 371 matroxfb_unregister_device(MINFO); 372 unregister_framebuffer(&ACCESS_FBINFO(fbcon)); 373 matroxfb_g450_shutdown(PMINFO2); 374#ifdef CONFIG_MTRR 375 if (ACCESS_FBINFO(mtrr.vram_valid)) 376 mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len)); 377#endif 378 mga_iounmap(ACCESS_FBINFO(mmio.vbase)); 379 mga_iounmap(ACCESS_FBINFO(video.vbase)); 380 release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum)); 381 release_mem_region(ACCESS_FBINFO(mmio.base), 16384); 382#ifdef CONFIG_FB_MATROX_MULTIHEAD 383 kfree(minfo); 384#endif 385} 386 387 /* 388 * Open/Release the frame buffer device 389 */ 390 391static int matroxfb_open(struct fb_info *info, int user) 392{ 393 MINFO_FROM_INFO(info); 394 395 DBG_LOOP(__FUNCTION__) 396 397 if (ACCESS_FBINFO(dead)) { 398 return -ENXIO; 399 } 400 ACCESS_FBINFO(usecount)++; 401 if (user) { 402 ACCESS_FBINFO(userusecount)++; 403 } 404 return(0); 405} 406 407static int matroxfb_release(struct fb_info *info, int user) 408{ 409 MINFO_FROM_INFO(info); 410 411 DBG_LOOP(__FUNCTION__) 412 413 if (user) { 414 if (0 == --ACCESS_FBINFO(userusecount)) { 415 matroxfb_disable_irq(PMINFO2); 416 } 417 } 418 if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) { 419 matroxfb_remove(PMINFO 0); 420 } 421 return(0); 422} 423 424static int matroxfb_pan_display(struct fb_var_screeninfo *var, 425 struct fb_info* info) { 426 MINFO_FROM_INFO(info); 427 428 DBG(__FUNCTION__) 429 430 matrox_pan_var(PMINFO var); 431 return 0; 432} 433 434static int matroxfb_get_final_bppShift(CPMINFO int bpp) { 435 int bppshft2; 436 437 DBG(__FUNCTION__) 438 439 bppshft2 = bpp; 440 if (!bppshft2) { 441 return 8; 442 } 443 if (isInterleave(MINFO)) 444 bppshft2 >>= 1; 445 if (ACCESS_FBINFO(devflags.video64bits)) 446 bppshft2 >>= 1; 447 return bppshft2; 448} 449 450static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) { 451 int over; 452 int rounding; 453 454 DBG(__FUNCTION__) 455 456 switch (bpp) { 457 case 0: return xres; 458 case 4: rounding = 128; 459 break; 460 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */ 461 break; 462 case 16: rounding = 32; 463 break; 464 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */ 465 break; 466 default: rounding = 16; 467 /* on G400, 16 really does not work */ 468 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) 469 rounding = 32; 470 break; 471 } 472 if (isInterleave(MINFO)) { 473 rounding *= 2; 474 } 475 over = xres % rounding; 476 if (over) 477 xres += rounding-over; 478 return xres; 479} 480 481static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) { 482 const int* width; 483 int xres_new; 484 485 DBG(__FUNCTION__) 486 487 if (!bpp) return xres; 488 489 width = ACCESS_FBINFO(capable.vxres); 490 491 if (ACCESS_FBINFO(devflags.precise_width)) { 492 while (*width) { 493 if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) { 494 break; 495 } 496 width++; 497 } 498 xres_new = *width; 499 } else { 500 xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp); 501 } 502 return xres_new; 503} 504 505static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) { 506 507 DBG(__FUNCTION__) 508 509 switch (var->bits_per_pixel) { 510 case 4: 511 return 16; /* pseudocolor... 16 entries HW palette */ 512 case 8: 513 return 256; /* pseudocolor... 256 entries HW palette */ 514 case 16: 515 return 16; /* directcolor... 16 entries SW palette */ 516 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 517 case 24: 518 return 16; /* directcolor... 16 entries SW palette */ 519 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 520 case 32: 521 return 16; /* directcolor... 16 entries SW palette */ 522 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 523 } 524 return 16; /* return something reasonable... or panic()? */ 525} 526 527static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) { 528 struct RGBT { 529 unsigned char bpp; 530 struct { 531 unsigned char offset, 532 length; 533 } red, 534 green, 535 blue, 536 transp; 537 signed char visual; 538 }; 539 static const struct RGBT table[]= { 540 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR}, 541 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR}, 542 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR}, 543 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR}, 544 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR} 545 }; 546 struct RGBT const *rgbt; 547 unsigned int bpp = var->bits_per_pixel; 548 unsigned int vramlen; 549 unsigned int memlen; 550 551 DBG(__FUNCTION__) 552 553 switch (bpp) { 554 case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL; 555 break; 556 case 8: break; 557 case 16: break; 558 case 24: break; 559 case 32: break; 560 default: return -EINVAL; 561 } 562 *ydstorg = 0; 563 vramlen = ACCESS_FBINFO(video.len_usable); 564 if (var->yres_virtual < var->yres) 565 var->yres_virtual = var->yres; 566 if (var->xres_virtual < var->xres) 567 var->xres_virtual = var->xres; 568 569 var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp); 570 memlen = var->xres_virtual * bpp * var->yres_virtual / 8; 571 if (memlen > vramlen) { 572 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp); 573 memlen = var->xres_virtual * bpp * var->yres_virtual / 8; 574 } 575 /* There is hardware bug that no line can cross 4MB boundary */ 576 /* for other try to do something */ 577 if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) { 578 if (bpp == 24) { 579 /* sorry */ 580 } else { 581 unsigned int linelen; 582 unsigned int m1 = linelen = var->xres_virtual * bpp / 8; 583 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */ 584 unsigned int max_yres; 585 586 while (m1) { 587 int t; 588 589 while (m2 >= m1) m2 -= m1; 590 t = m1; 591 m1 = m2; 592 m2 = t; 593 } 594 m2 = linelen * PAGE_SIZE / m2; 595 *ydstorg = m2 = 0x400000 % m2; 596 max_yres = (vramlen - m2) / linelen; 597 if (var->yres_virtual > max_yres) 598 var->yres_virtual = max_yres; 599 } 600 } 601 /* YDSTLEN contains only signed 16bit value */ 602 if (var->yres_virtual > 32767) 603 var->yres_virtual = 32767; 604 /* we must round yres/xres down, we already rounded y/xres_virtual up 605 if it was possible. We should return -EINVAL, but I disagree */ 606 if (var->yres_virtual < var->yres) 607 var->yres = var->yres_virtual; 608 if (var->xres_virtual < var->xres) 609 var->xres = var->xres_virtual; 610 if (var->xoffset + var->xres > var->xres_virtual) 611 var->xoffset = var->xres_virtual - var->xres; 612 if (var->yoffset + var->yres > var->yres_virtual) 613 var->yoffset = var->yres_virtual - var->yres; 614 615 if (bpp == 16 && var->green.length == 5) { 616 bpp--; /* an artifical value - 15 */ 617 } 618 619 for (rgbt = table; rgbt->bpp < bpp; rgbt++); 620#define SETCLR(clr)\ 621 var->clr.offset = rgbt->clr.offset;\ 622 var->clr.length = rgbt->clr.length 623 SETCLR(red); 624 SETCLR(green); 625 SETCLR(blue); 626 SETCLR(transp); 627#undef SETCLR 628 *visual = rgbt->visual; 629 630 if (bpp > 8) 631 dprintk("matroxfb: truecolor: " 632 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n", 633 var->transp.length, var->red.length, var->green.length, var->blue.length, 634 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset); 635 636 *video_cmap_len = matroxfb_get_cmap_len(var); 637 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel, 638 var->xres_virtual, var->yres_virtual); 639 return 0; 640} 641 642static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green, 643 unsigned blue, unsigned transp, 644 struct fb_info *fb_info) 645{ 646#ifdef CONFIG_FB_MATROX_MULTIHEAD 647 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon); 648#endif 649 650 DBG(__FUNCTION__) 651 652 /* 653 * Set a single color register. The values supplied are 654 * already rounded down to the hardware's capabilities 655 * (according to the entries in the `var' structure). Return 656 * != 0 for invalid regno. 657 */ 658 659 if (regno >= ACCESS_FBINFO(curr.cmap_len)) 660 return 1; 661 662 if (ACCESS_FBINFO(fbcon).var.grayscale) { 663 /* gray = 0.30*R + 0.59*G + 0.11*B */ 664 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8; 665 } 666 667 red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length); 668 green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length); 669 blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length); 670 transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length); 671 672 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) { 673 case 4: 674 case 8: 675 mga_outb(M_DAC_REG, regno); 676 mga_outb(M_DAC_VAL, red); 677 mga_outb(M_DAC_VAL, green); 678 mga_outb(M_DAC_VAL, blue); 679 break; 680 case 16: 681 { 682 u_int16_t col = 683 (red << ACCESS_FBINFO(fbcon).var.red.offset) | 684 (green << ACCESS_FBINFO(fbcon).var.green.offset) | 685 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) | 686 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */ 687 ACCESS_FBINFO(cmap[regno]) = col | (col << 16); 688 } 689 break; 690 case 24: 691 case 32: 692 ACCESS_FBINFO(cmap[regno]) = 693 (red << ACCESS_FBINFO(fbcon).var.red.offset) | 694 (green << ACCESS_FBINFO(fbcon).var.green.offset) | 695 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) | 696 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */ 697 break; 698 } 699 return 0; 700} 701 702static void matroxfb_init_fix(WPMINFO2) 703{ 704 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix; 705 DBG(__FUNCTION__) 706 707 strcpy(fix->id,"MATROX"); 708 709 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */ 710 fix->ypanstep = 1; 711 fix->ywrapstep = 0; 712 fix->mmio_start = ACCESS_FBINFO(mmio.base); 713 fix->mmio_len = ACCESS_FBINFO(mmio.len); 714 fix->accel = ACCESS_FBINFO(devflags.accelerator); 715} 716 717static void matroxfb_update_fix(WPMINFO2) 718{ 719 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix; 720 DBG(__FUNCTION__) 721 722 fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes); 723 fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes); 724} 725 726static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 727{ 728 int err; 729 int visual; 730 int cmap_len; 731 unsigned int ydstorg; 732 MINFO_FROM_INFO(info); 733 734 if (ACCESS_FBINFO(dead)) { 735 return -ENXIO; 736 } 737 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0) 738 return err; 739 return 0; 740} 741 742static int matroxfb_set_par(struct fb_info *info) 743{ 744 int err; 745 int visual; 746 int cmap_len; 747 unsigned int ydstorg; 748 struct fb_var_screeninfo *var; 749 MINFO_FROM_INFO(info); 750 751 DBG(__FUNCTION__) 752 753 if (ACCESS_FBINFO(dead)) { 754 return -ENXIO; 755 } 756 757 var = &info->var; 758 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0) 759 return err; 760 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg; 761 matroxfb_update_fix(PMINFO2); 762 ACCESS_FBINFO(fbcon).fix.visual = visual; 763 ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS; 764 ACCESS_FBINFO(fbcon).fix.type_aux = 0; 765 ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3; 766 { 767 unsigned int pos; 768 769 ACCESS_FBINFO(curr.cmap_len) = cmap_len; 770 ydstorg += ACCESS_FBINFO(devflags.ydstorg); 771 ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg; 772 ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2); 773 if (var->bits_per_pixel == 4) 774 ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg; 775 else 776 ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel; 777 ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel); 778 { struct my_timming mt; 779 struct matrox_hw_state* hw; 780 int out; 781 782 matroxfb_var2my(var, &mt); 783 mt.crtc = MATROXFB_SRC_CRTC1; 784 /* CRTC1 delays */ 785 switch (var->bits_per_pixel) { 786 case 0: mt.delay = 31 + 0; break; 787 case 16: mt.delay = 21 + 8; break; 788 case 24: mt.delay = 17 + 8; break; 789 case 32: mt.delay = 16 + 8; break; 790 default: mt.delay = 31 + 8; break; 791 } 792 793 hw = &ACCESS_FBINFO(hw); 794 795 down_read(&ACCESS_FBINFO(altout).lock); 796 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 797 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 && 798 ACCESS_FBINFO(outputs[out]).output->compute) { 799 ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt); 800 } 801 } 802 up_read(&ACCESS_FBINFO(altout).lock); 803 ACCESS_FBINFO(crtc1).pixclock = mt.pixclock; 804 ACCESS_FBINFO(crtc1).mnp = mt.mnp; 805 ACCESS_FBINFO(hw_switch->init(PMINFO &mt)); 806 pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32; 807 pos += ACCESS_FBINFO(curr.ydstorg.chunks); 808 809 hw->CRTC[0x0D] = pos & 0xFF; 810 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8; 811 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40); 812 hw->CRTCEXT[8] = pos >> 21; 813 ACCESS_FBINFO(hw_switch->restore(PMINFO2)); 814 update_crtc2(PMINFO pos); 815 down_read(&ACCESS_FBINFO(altout).lock); 816 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 817 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 && 818 ACCESS_FBINFO(outputs[out]).output->program) { 819 ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data); 820 } 821 } 822 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 823 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 && 824 ACCESS_FBINFO(outputs[out]).output->start) { 825 ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data); 826 } 827 } 828 up_read(&ACCESS_FBINFO(altout).lock); 829 matrox_cfbX_init(PMINFO2); 830 } 831 } 832 ACCESS_FBINFO(initialized) = 1; 833 return 0; 834} 835 836static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank) 837{ 838 unsigned int sts1; 839 840 matroxfb_enable_irq(PMINFO 0); 841 memset(vblank, 0, sizeof(*vblank)); 842 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC | 843 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK; 844 sts1 = mga_inb(M_INSTS1); 845 vblank->vcount = mga_inl(M_VCOUNT); 846 /* BTW, on my PIII/450 with G400, reading M_INSTS1 847 byte makes this call about 12% slower (1.70 vs. 2.05 us 848 per ioctl()) */ 849 if (sts1 & 1) 850 vblank->flags |= FB_VBLANK_HBLANKING; 851 if (sts1 & 8) 852 vblank->flags |= FB_VBLANK_VSYNCING; 853 if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres) 854 vblank->flags |= FB_VBLANK_VBLANKING; 855 if (test_bit(0, &ACCESS_FBINFO(irq_flags))) { 856 vblank->flags |= FB_VBLANK_HAVE_COUNT; 857 /* Only one writer, aligned int value... 858 it should work without lock and without atomic_t */ 859 vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt; 860 } 861 return 0; 862} 863 864static struct matrox_altout panellink_output = { 865 .name = "Panellink output", 866}; 867 868static int matroxfb_ioctl(struct fb_info *info, 869 unsigned int cmd, unsigned long arg) 870{ 871 void __user *argp = (void __user *)arg; 872 MINFO_FROM_INFO(info); 873 874 DBG(__FUNCTION__) 875 876 if (ACCESS_FBINFO(dead)) { 877 return -ENXIO; 878 } 879 880 switch (cmd) { 881 case FBIOGET_VBLANK: 882 { 883 struct fb_vblank vblank; 884 int err; 885 886 err = matroxfb_get_vblank(PMINFO &vblank); 887 if (err) 888 return err; 889 if (copy_to_user(argp, &vblank, sizeof(vblank))) 890 return -EFAULT; 891 return 0; 892 } 893 case FBIO_WAITFORVSYNC: 894 { 895 u_int32_t crt; 896 897 if (get_user(crt, (u_int32_t __user *)arg)) 898 return -EFAULT; 899 900 return matroxfb_wait_for_sync(PMINFO crt); 901 } 902 case MATROXFB_SET_OUTPUT_MODE: 903 { 904 struct matroxioc_output_mode mom; 905 struct matrox_altout *oproc; 906 int val; 907 908 if (copy_from_user(&mom, argp, sizeof(mom))) 909 return -EFAULT; 910 if (mom.output >= MATROXFB_MAX_OUTPUTS) 911 return -ENXIO; 912 down_read(&ACCESS_FBINFO(altout.lock)); 913 oproc = ACCESS_FBINFO(outputs[mom.output]).output; 914 if (!oproc) { 915 val = -ENXIO; 916 } else if (!oproc->verifymode) { 917 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) { 918 val = 0; 919 } else { 920 val = -EINVAL; 921 } 922 } else { 923 val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode); 924 } 925 if (!val) { 926 if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) { 927 ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode; 928 val = 1; 929 } 930 } 931 up_read(&ACCESS_FBINFO(altout.lock)); 932 if (val != 1) 933 return val; 934 switch (ACCESS_FBINFO(outputs[mom.output]).src) { 935 case MATROXFB_SRC_CRTC1: 936 matroxfb_set_par(info); 937 break; 938 case MATROXFB_SRC_CRTC2: 939 { 940 struct matroxfb_dh_fb_info* crtc2; 941 942 down_read(&ACCESS_FBINFO(crtc2.lock)); 943 crtc2 = ACCESS_FBINFO(crtc2.info); 944 if (crtc2) 945 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon); 946 up_read(&ACCESS_FBINFO(crtc2.lock)); 947 } 948 break; 949 } 950 return 0; 951 } 952 case MATROXFB_GET_OUTPUT_MODE: 953 { 954 struct matroxioc_output_mode mom; 955 struct matrox_altout *oproc; 956 int val; 957 958 if (copy_from_user(&mom, argp, sizeof(mom))) 959 return -EFAULT; 960 if (mom.output >= MATROXFB_MAX_OUTPUTS) 961 return -ENXIO; 962 down_read(&ACCESS_FBINFO(altout.lock)); 963 oproc = ACCESS_FBINFO(outputs[mom.output]).output; 964 if (!oproc) { 965 val = -ENXIO; 966 } else { 967 mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode; 968 val = 0; 969 } 970 up_read(&ACCESS_FBINFO(altout.lock)); 971 if (val) 972 return val; 973 if (copy_to_user(argp, &mom, sizeof(mom))) 974 return -EFAULT; 975 return 0; 976 } 977 case MATROXFB_SET_OUTPUT_CONNECTION: 978 { 979 u_int32_t tmp; 980 int i; 981 int changes; 982 983 if (copy_from_user(&tmp, argp, sizeof(tmp))) 984 return -EFAULT; 985 for (i = 0; i < 32; i++) { 986 if (tmp & (1 << i)) { 987 if (i >= MATROXFB_MAX_OUTPUTS) 988 return -ENXIO; 989 if (!ACCESS_FBINFO(outputs[i]).output) 990 return -ENXIO; 991 switch (ACCESS_FBINFO(outputs[i]).src) { 992 case MATROXFB_SRC_NONE: 993 case MATROXFB_SRC_CRTC1: 994 break; 995 default: 996 return -EBUSY; 997 } 998 } 999 } 1000 if (ACCESS_FBINFO(devflags.panellink)) { 1001 if (tmp & MATROXFB_OUTPUT_CONN_DFP) { 1002 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY) 1003 return -EINVAL; 1004 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1005 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) { 1006 return -EBUSY; 1007 } 1008 } 1009 } 1010 } 1011 changes = 0; 1012 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1013 if (tmp & (1 << i)) { 1014 if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) { 1015 changes = 1; 1016 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1; 1017 } 1018 } else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) { 1019 changes = 1; 1020 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE; 1021 } 1022 } 1023 if (!changes) 1024 return 0; 1025 matroxfb_set_par(info); 1026 return 0; 1027 } 1028 case MATROXFB_GET_OUTPUT_CONNECTION: 1029 { 1030 u_int32_t conn = 0; 1031 int i; 1032 1033 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1034 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) { 1035 conn |= 1 << i; 1036 } 1037 } 1038 if (put_user(conn, (u_int32_t __user *)arg)) 1039 return -EFAULT; 1040 return 0; 1041 } 1042 case MATROXFB_GET_AVAILABLE_OUTPUTS: 1043 { 1044 u_int32_t conn = 0; 1045 int i; 1046 1047 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1048 if (ACCESS_FBINFO(outputs[i]).output) { 1049 switch (ACCESS_FBINFO(outputs[i]).src) { 1050 case MATROXFB_SRC_NONE: 1051 case MATROXFB_SRC_CRTC1: 1052 conn |= 1 << i; 1053 break; 1054 } 1055 } 1056 } 1057 if (ACCESS_FBINFO(devflags.panellink)) { 1058 if (conn & MATROXFB_OUTPUT_CONN_DFP) 1059 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY; 1060 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY) 1061 conn &= ~MATROXFB_OUTPUT_CONN_DFP; 1062 } 1063 if (put_user(conn, (u_int32_t __user *)arg)) 1064 return -EFAULT; 1065 return 0; 1066 } 1067 case MATROXFB_GET_ALL_OUTPUTS: 1068 { 1069 u_int32_t conn = 0; 1070 int i; 1071 1072 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1073 if (ACCESS_FBINFO(outputs[i]).output) { 1074 conn |= 1 << i; 1075 } 1076 } 1077 if (put_user(conn, (u_int32_t __user *)arg)) 1078 return -EFAULT; 1079 return 0; 1080 } 1081 case VIDIOC_QUERYCAP: 1082 { 1083 struct v4l2_capability r; 1084 1085 memset(&r, 0, sizeof(r)); 1086 strcpy(r.driver, "matroxfb"); 1087 strcpy(r.card, "Matrox"); 1088 sprintf(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev))); 1089 r.version = KERNEL_VERSION(1,0,0); 1090 r.capabilities = V4L2_CAP_VIDEO_OUTPUT; 1091 if (copy_to_user(argp, &r, sizeof(r))) 1092 return -EFAULT; 1093 return 0; 1094 1095 } 1096 case VIDIOC_QUERYCTRL: 1097 { 1098 struct v4l2_queryctrl qctrl; 1099 int err; 1100 1101 if (copy_from_user(&qctrl, argp, sizeof(qctrl))) 1102 return -EFAULT; 1103 1104 down_read(&ACCESS_FBINFO(altout).lock); 1105 if (!ACCESS_FBINFO(outputs[1]).output) { 1106 err = -ENXIO; 1107 } else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) { 1108 err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl); 1109 } else { 1110 err = -EINVAL; 1111 } 1112 up_read(&ACCESS_FBINFO(altout).lock); 1113 if (err >= 0 && 1114 copy_to_user(argp, &qctrl, sizeof(qctrl))) 1115 return -EFAULT; 1116 return err; 1117 } 1118 case VIDIOC_G_CTRL: 1119 { 1120 struct v4l2_control ctrl; 1121 int err; 1122 1123 if (copy_from_user(&ctrl, argp, sizeof(ctrl))) 1124 return -EFAULT; 1125 1126 down_read(&ACCESS_FBINFO(altout).lock); 1127 if (!ACCESS_FBINFO(outputs[1]).output) { 1128 err = -ENXIO; 1129 } else if (ACCESS_FBINFO(outputs[1]).output->getctrl) { 1130 err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl); 1131 } else { 1132 err = -EINVAL; 1133 } 1134 up_read(&ACCESS_FBINFO(altout).lock); 1135 if (err >= 0 && 1136 copy_to_user(argp, &ctrl, sizeof(ctrl))) 1137 return -EFAULT; 1138 return err; 1139 } 1140 case VIDIOC_S_CTRL_OLD: 1141 case VIDIOC_S_CTRL: 1142 { 1143 struct v4l2_control ctrl; 1144 int err; 1145 1146 if (copy_from_user(&ctrl, argp, sizeof(ctrl))) 1147 return -EFAULT; 1148 1149 down_read(&ACCESS_FBINFO(altout).lock); 1150 if (!ACCESS_FBINFO(outputs[1]).output) { 1151 err = -ENXIO; 1152 } else if (ACCESS_FBINFO(outputs[1]).output->setctrl) { 1153 err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl); 1154 } else { 1155 err = -EINVAL; 1156 } 1157 up_read(&ACCESS_FBINFO(altout).lock); 1158 return err; 1159 } 1160 } 1161 return -ENOTTY; 1162} 1163 1164/* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */ 1165 1166static int matroxfb_blank(int blank, struct fb_info *info) 1167{ 1168 int seq; 1169 int crtc; 1170 CRITFLAGS 1171 MINFO_FROM_INFO(info); 1172 1173 DBG(__FUNCTION__) 1174 1175 if (ACCESS_FBINFO(dead)) 1176 return 1; 1177 1178 switch (blank) { 1179 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */ 1180 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break; 1181 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break; 1182 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break; 1183 default: seq = 0x00; crtc = 0x00; break; 1184 } 1185 1186 CRITBEGIN 1187 1188 mga_outb(M_SEQ_INDEX, 1); 1189 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq); 1190 mga_outb(M_EXTVGA_INDEX, 1); 1191 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc); 1192 1193 CRITEND 1194 return 0; 1195} 1196 1197static struct fb_ops matroxfb_ops = { 1198 .owner = THIS_MODULE, 1199 .fb_open = matroxfb_open, 1200 .fb_release = matroxfb_release, 1201 .fb_check_var = matroxfb_check_var, 1202 .fb_set_par = matroxfb_set_par, 1203 .fb_setcolreg = matroxfb_setcolreg, 1204 .fb_pan_display =matroxfb_pan_display, 1205 .fb_blank = matroxfb_blank, 1206 .fb_ioctl = matroxfb_ioctl, 1207/* .fb_fillrect = <set by matrox_cfbX_init>, */ 1208/* .fb_copyarea = <set by matrox_cfbX_init>, */ 1209/* .fb_imageblit = <set by matrox_cfbX_init>, */ 1210/* .fb_cursor = <set by matrox_cfbX_init>, */ 1211}; 1212 1213#define RSDepth(X) (((X) >> 8) & 0x0F) 1214#define RS8bpp 0x1 1215#define RS15bpp 0x2 1216#define RS16bpp 0x3 1217#define RS32bpp 0x4 1218#define RS4bpp 0x5 1219#define RS24bpp 0x6 1220#define RSText 0x7 1221#define RSText8 0x8 1222/* 9-F */ 1223static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = { 1224 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 }, 1225 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 }, 1226 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 }, 1227 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 }, 1228 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 }, 1229 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 }, 1230 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */ 1231 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */ 1232}; 1233 1234/* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */ 1235static unsigned int mem; /* "matrox:mem:xxxxxM" */ 1236static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */ 1237static int inv24; /* "matrox:inv24" */ 1238static int cross4MB = -1; /* "matrox:cross4MB" */ 1239static int disabled; /* "matrox:disabled" */ 1240static int noaccel; /* "matrox:noaccel" */ 1241static int nopan; /* "matrox:nopan" */ 1242static int no_pci_retry; /* "matrox:nopciretry" */ 1243static int novga; /* "matrox:novga" */ 1244static int nobios; /* "matrox:nobios" */ 1245static int noinit = 1; /* "matrox:init" */ 1246static int inverse; /* "matrox:inverse" */ 1247static int sgram; /* "matrox:sgram" */ 1248#ifdef CONFIG_MTRR 1249static int mtrr = 1; /* "matrox:nomtrr" */ 1250#endif 1251static int grayscale; /* "matrox:grayscale" */ 1252static int dev = -1; /* "matrox:dev:xxxxx" */ 1253static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */ 1254static int depth = -1; /* "matrox:depth:xxxxx" */ 1255static unsigned int xres; /* "matrox:xres:xxxxx" */ 1256static unsigned int yres; /* "matrox:yres:xxxxx" */ 1257static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */ 1258static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */ 1259static unsigned int vslen; /* "matrox:vslen:xxxxx" */ 1260static unsigned int left = ~0; /* "matrox:left:xxxxx" */ 1261static unsigned int right = ~0; /* "matrox:right:xxxxx" */ 1262static unsigned int hslen; /* "matrox:hslen:xxxxx" */ 1263static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */ 1264static int sync = -1; /* "matrox:sync:xxxxx" */ 1265static unsigned int fv; /* "matrox:fv:xxxxx" */ 1266static unsigned int fh; /* "matrox:fh:xxxxxk" */ 1267static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */ 1268static int dfp; /* "matrox:dfp */ 1269static int dfp_type = -1; 1270static int memtype = -1; 1271static char outputs[8]; 1272 1273#ifndef MODULE 1274static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */ 1275#endif 1276 1277static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){ 1278 vaddr_t vm; 1279 unsigned int offs; 1280 unsigned int offs2; 1281 unsigned char orig; 1282 unsigned char bytes[32]; 1283 unsigned char* tmp; 1284 1285 DBG(__FUNCTION__) 1286 1287 vm = ACCESS_FBINFO(video.vbase); 1288 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */ 1289 /* at least 2MB */ 1290 if (maxSize < 0x0200000) return 0; 1291 if (maxSize > 0x2000000) maxSize = 0x2000000; 1292 1293 mga_outb(M_EXTVGA_INDEX, 0x03); 1294 orig = mga_inb(M_EXTVGA_DATA); 1295 mga_outb(M_EXTVGA_DATA, orig | 0x80); 1296 1297 tmp = bytes; 1298 for (offs = 0x100000; offs < maxSize; offs += 0x200000) 1299 *tmp++ = mga_readb(vm, offs); 1300 for (offs = 0x100000; offs < maxSize; offs += 0x200000) 1301 mga_writeb(vm, offs, 0x02); 1302 mga_outb(M_CACHEFLUSH, 0x00); 1303 for (offs = 0x100000; offs < maxSize; offs += 0x200000) { 1304 if (mga_readb(vm, offs) != 0x02) 1305 break; 1306 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02); 1307 if (mga_readb(vm, offs)) 1308 break; 1309 } 1310 tmp = bytes; 1311 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000) 1312 mga_writeb(vm, offs2, *tmp++); 1313 1314 mga_outb(M_EXTVGA_INDEX, 0x03); 1315 mga_outb(M_EXTVGA_DATA, orig); 1316 1317 *realSize = offs - 0x100000; 1318#ifdef CONFIG_FB_MATROX_MILLENIUM 1319 ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) || ((offs - 0x100000) & 0x3FFFFF)); 1320#endif 1321 return 1; 1322} 1323 1324struct video_board { 1325 int maxvram; 1326 int maxdisplayable; 1327 int accelID; 1328 struct matrox_switch* lowlevel; 1329 }; 1330#ifdef CONFIG_FB_MATROX_MILLENIUM 1331static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium}; 1332static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium}; 1333static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium}; 1334#endif /* CONFIG_FB_MATROX_MILLENIUM */ 1335#ifdef CONFIG_FB_MATROX_MYSTIQUE 1336static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique}; 1337#endif /* CONFIG_FB_MATROX_MYSTIQUE */ 1338#ifdef CONFIG_FB_MATROX_G 1339static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100}; 1340static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100}; 1341#ifdef CONFIG_FB_MATROX_32MB 1342/* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for 1343 whole 32MB */ 1344static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100}; 1345#else 1346static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100}; 1347#endif 1348#endif 1349 1350#define DEVF_VIDEO64BIT 0x0001 1351#define DEVF_SWAPS 0x0002 1352#define DEVF_SRCORG 0x0004 1353#define DEVF_DUALHEAD 0x0008 1354#define DEVF_CROSS4MB 0x0010 1355#define DEVF_TEXT4B 0x0020 1356/* #define DEVF_recycled 0x0040 */ 1357/* #define DEVF_recycled 0x0080 */ 1358#define DEVF_SUPPORT32MB 0x0100 1359#define DEVF_ANY_VXRES 0x0200 1360#define DEVF_TEXT16B 0x0400 1361#define DEVF_CRTC2 0x0800 1362#define DEVF_MAVEN_CAPABLE 0x1000 1363#define DEVF_PANELLINK_CAPABLE 0x2000 1364#define DEVF_G450DAC 0x4000 1365 1366#define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB) 1367#define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD) 1368#define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */ 1369#define DEVF_G200 (DEVF_G2CORE) 1370#define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2) 1371/* if you'll find how to drive DFP... */ 1372#define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD) 1373#define DEVF_G550 (DEVF_G450) 1374 1375static struct board { 1376 unsigned short vendor, device, rev, svid, sid; 1377 unsigned int flags; 1378 unsigned int maxclk; 1379 enum mga_chip chip; 1380 struct video_board* base; 1381 const char* name; 1382 } dev_list[] = { 1383#ifdef CONFIG_FB_MATROX_MILLENIUM 1384 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF, 1385 0, 0, 1386 DEVF_TEXT4B, 1387 230000, 1388 MGA_2064, 1389 &vbMillennium, 1390 "Millennium (PCI)"}, 1391 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF, 1392 0, 0, 1393 DEVF_SWAPS, 1394 220000, 1395 MGA_2164, 1396 &vbMillennium2, 1397 "Millennium II (PCI)"}, 1398 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF, 1399 0, 0, 1400 DEVF_SWAPS, 1401 250000, 1402 MGA_2164, 1403 &vbMillennium2A, 1404 "Millennium II (AGP)"}, 1405#endif 1406#ifdef CONFIG_FB_MATROX_MYSTIQUE 1407 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02, 1408 0, 0, 1409 DEVF_VIDEO64BIT | DEVF_CROSS4MB, 1410 180000, 1411 MGA_1064, 1412 &vbMystique, 1413 "Mystique (PCI)"}, 1414 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF, 1415 0, 0, 1416 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB, 1417 220000, 1418 MGA_1164, 1419 &vbMystique, 1420 "Mystique 220 (PCI)"}, 1421 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02, 1422 0, 0, 1423 DEVF_VIDEO64BIT | DEVF_CROSS4MB, 1424 180000, 1425 MGA_1064, 1426 &vbMystique, 1427 "Mystique (AGP)"}, 1428 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF, 1429 0, 0, 1430 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB, 1431 220000, 1432 MGA_1164, 1433 &vbMystique, 1434 "Mystique 220 (AGP)"}, 1435#endif 1436#ifdef CONFIG_FB_MATROX_G 1437 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF, 1438 0, 0, 1439 DEVF_G100, 1440 230000, 1441 MGA_G100, 1442 &vbG100, 1443 "MGA-G100 (PCI)"}, 1444 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF, 1445 0, 0, 1446 DEVF_G100, 1447 230000, 1448 MGA_G100, 1449 &vbG100, 1450 "MGA-G100 (AGP)"}, 1451 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF, 1452 0, 0, 1453 DEVF_G200, 1454 250000, 1455 MGA_G200, 1456 &vbG200, 1457 "MGA-G200 (PCI)"}, 1458 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1459 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC, 1460 DEVF_G200, 1461 220000, 1462 MGA_G200, 1463 &vbG200, 1464 "MGA-G200 (AGP)"}, 1465 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1466 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP, 1467 DEVF_G200, 1468 230000, 1469 MGA_G200, 1470 &vbG200, 1471 "Mystique G200 (AGP)"}, 1472 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1473 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP, 1474 DEVF_G200, 1475 250000, 1476 MGA_G200, 1477 &vbG200, 1478 "Millennium G200 (AGP)"}, 1479 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1480 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP, 1481 DEVF_G200, 1482 230000, 1483 MGA_G200, 1484 &vbG200, 1485 "Marvel G200 (AGP)"}, 1486 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1487 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP, 1488 DEVF_G200, 1489 230000, 1490 MGA_G200, 1491 &vbG200, 1492 "MGA-G200 (AGP)"}, 1493 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1494 0, 0, 1495 DEVF_G200, 1496 230000, 1497 MGA_G200, 1498 &vbG200, 1499 "G200 (AGP)"}, 1500 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80, 1501 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP, 1502 DEVF_G400, 1503 360000, 1504 MGA_G400, 1505 &vbG400, 1506 "Millennium G400 MAX (AGP)"}, 1507 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80, 1508 0, 0, 1509 DEVF_G400, 1510 300000, 1511 MGA_G400, 1512 &vbG400, 1513 "G400 (AGP)"}, 1514 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF, 1515 0, 0, 1516 DEVF_G450, 1517 360000, 1518 MGA_G450, 1519 &vbG400, 1520 "G450"}, 1521 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF, 1522 0, 0, 1523 DEVF_G550, 1524 360000, 1525 MGA_G550, 1526 &vbG400, 1527 "G550"}, 1528#endif 1529 {0, 0, 0xFF, 1530 0, 0, 1531 0, 1532 0, 1533 0, 1534 NULL, 1535 NULL}}; 1536 1537#ifndef MODULE 1538static struct fb_videomode defaultmode = { 1539 /* 640x480 @ 60Hz, 31.5 kHz */ 1540 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, 1541 0, FB_VMODE_NONINTERLACED 1542}; 1543#endif /* !MODULE */ 1544 1545static int hotplug = 0; 1546 1547static void setDefaultOutputs(WPMINFO2) { 1548 unsigned int i; 1549 const char* ptr; 1550 1551 ACCESS_FBINFO(outputs[0]).default_src = MATROXFB_SRC_CRTC1; 1552 if (ACCESS_FBINFO(devflags.g450dac)) { 1553 ACCESS_FBINFO(outputs[1]).default_src = MATROXFB_SRC_CRTC1; 1554 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1; 1555 } else if (dfp) { 1556 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1; 1557 } 1558 ptr = outputs; 1559 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1560 char c = *ptr++; 1561 1562 if (c == 0) { 1563 break; 1564 } 1565 if (c == '0') { 1566 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_NONE; 1567 } else if (c == '1') { 1568 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC1; 1569 } else if (c == '2' && ACCESS_FBINFO(devflags.crtc2)) { 1570 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC2; 1571 } else { 1572 printk(KERN_ERR "matroxfb: Unknown outputs setting\n"); 1573 break; 1574 } 1575 } 1576 /* Nullify this option for subsequent adapters */ 1577 outputs[0] = 0; 1578} 1579 1580static int initMatrox2(WPMINFO struct board* b){ 1581 unsigned long ctrlptr_phys = 0; 1582 unsigned long video_base_phys = 0; 1583 unsigned int memsize; 1584 int err; 1585 1586 static struct pci_device_id intel_82437[] = { 1587 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) }, 1588 { }, 1589 }; 1590 1591 DBG(__FUNCTION__) 1592 1593 /* set default values... */ 1594 vesafb_defined.accel_flags = FB_ACCELF_TEXT; 1595 1596 ACCESS_FBINFO(hw_switch) = b->base->lowlevel; 1597 ACCESS_FBINFO(devflags.accelerator) = b->base->accelID; 1598 ACCESS_FBINFO(max_pixel_clock) = b->maxclk; 1599 1600 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name); 1601 ACCESS_FBINFO(capable.plnwt) = 1; 1602 ACCESS_FBINFO(chip) = b->chip; 1603 ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG; 1604 ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT; 1605 if (b->flags & DEVF_TEXT4B) { 1606 ACCESS_FBINFO(devflags.vgastep) = 4; 1607 ACCESS_FBINFO(devflags.textmode) = 4; 1608 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16; 1609 } else if (b->flags & DEVF_TEXT16B) { 1610 ACCESS_FBINFO(devflags.vgastep) = 16; 1611 ACCESS_FBINFO(devflags.textmode) = 1; 1612 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16; 1613 } else { 1614 ACCESS_FBINFO(devflags.vgastep) = 8; 1615 ACCESS_FBINFO(devflags.textmode) = 1; 1616 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8; 1617 } 1618#ifdef CONFIG_FB_MATROX_32MB 1619 ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0; 1620#endif 1621 ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES); 1622 ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0; 1623 ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0; 1624 ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0; 1625 ACCESS_FBINFO(devflags.dfp_type) = dfp_type; 1626 ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0; 1627 ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode); 1628 ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode); 1629 setDefaultOutputs(PMINFO2); 1630 if (b->flags & DEVF_PANELLINK_CAPABLE) { 1631 ACCESS_FBINFO(outputs[2]).data = MINFO; 1632 ACCESS_FBINFO(outputs[2]).output = &panellink_output; 1633 ACCESS_FBINFO(outputs[2]).src = ACCESS_FBINFO(outputs[2]).default_src; 1634 ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR; 1635 ACCESS_FBINFO(devflags.panellink) = 1; 1636 } 1637 1638 if (ACCESS_FBINFO(capable.cross4MB) < 0) 1639 ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB; 1640 if (b->flags & DEVF_SWAPS) { 1641 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1); 1642 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0); 1643 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0; 1644 } else { 1645 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0); 1646 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1); 1647 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1; 1648 } 1649 err = -EINVAL; 1650 if (!ctrlptr_phys) { 1651 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n"); 1652 goto fail; 1653 } 1654 if (!video_base_phys) { 1655 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n"); 1656 goto fail; 1657 } 1658 memsize = b->base->maxvram; 1659 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) { 1660 goto fail; 1661 } 1662 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) { 1663 goto failCtrlMR; 1664 } 1665 ACCESS_FBINFO(video.len_maximum) = memsize; 1666 /* convert mem (autodetect k, M) */ 1667 if (mem < 1024) mem *= 1024; 1668 if (mem < 0x00100000) mem *= 1024; 1669 1670 if (mem && (mem < memsize)) 1671 memsize = mem; 1672 err = -ENOMEM; 1673 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) { 1674 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys); 1675 goto failVideoMR; 1676 } 1677 ACCESS_FBINFO(mmio.base) = ctrlptr_phys; 1678 ACCESS_FBINFO(mmio.len) = 16384; 1679 ACCESS_FBINFO(video.base) = video_base_phys; 1680 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) { 1681 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n", 1682 video_base_phys, memsize); 1683 goto failCtrlIO; 1684 } 1685 { 1686 u_int32_t cmd; 1687 u_int32_t mga_option; 1688 1689 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &mga_option); 1690 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, &cmd); 1691 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */ 1692 mga_option |= MX_OPTION_BSWAP; 1693 /* disable palette snooping */ 1694 cmd &= ~PCI_COMMAND_VGA_PALETTE; 1695 if (pci_dev_present(intel_82437)) { 1696 if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) { 1697 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n"); 1698 } 1699 mga_option |= 0x20000000; 1700 ACCESS_FBINFO(devflags.nopciretry) = 1; 1701 } 1702 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd); 1703 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option); 1704 ACCESS_FBINFO(hw).MXoptionReg = mga_option; 1705 1706 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */ 1707 /* maybe preinit() candidate, but it is same... for all devices... at this time... */ 1708 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00); 1709 } 1710 1711 err = -ENXIO; 1712 matroxfb_read_pins(PMINFO2); 1713 if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) { 1714 goto failVideoIO; 1715 } 1716 1717 err = -ENOMEM; 1718 if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) || !ACCESS_FBINFO(video.len)) { 1719 printk(KERN_ERR "matroxfb: cannot determine memory size\n"); 1720 goto failVideoIO; 1721 } 1722 ACCESS_FBINFO(devflags.ydstorg) = 0; 1723 1724 ACCESS_FBINFO(video.base) = video_base_phys; 1725 ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len); 1726 if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable) 1727 ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable; 1728#ifdef CONFIG_MTRR 1729 if (mtrr) { 1730 ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1); 1731 ACCESS_FBINFO(mtrr.vram_valid) = 1; 1732 printk(KERN_INFO "matroxfb: MTRR's turned on\n"); 1733 } 1734#endif /* CONFIG_MTRR */ 1735 1736 if (!ACCESS_FBINFO(devflags.novga)) 1737 request_region(0x3C0, 32, "matrox"); 1738 matroxfb_g450_connect(PMINFO2); 1739 ACCESS_FBINFO(hw_switch->reset(PMINFO2)); 1740 1741 ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0; 1742 ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh; 1743 ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0; 1744 ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv; 1745 ACCESS_FBINFO(fbcon.monspecs.dpms) = 0; /* TBD */ 1746 1747 /* static settings */ 1748 vesafb_defined.red = colors[depth-1].red; 1749 vesafb_defined.green = colors[depth-1].green; 1750 vesafb_defined.blue = colors[depth-1].blue; 1751 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel; 1752 vesafb_defined.grayscale = grayscale; 1753 vesafb_defined.vmode = 0; 1754 if (noaccel) 1755 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT; 1756 1757 ACCESS_FBINFO(fbops) = matroxfb_ops; 1758 ACCESS_FBINFO(fbcon.fbops) = &ACCESS_FBINFO(fbops); 1759 ACCESS_FBINFO(fbcon.pseudo_palette) = ACCESS_FBINFO(cmap); 1760 /* after __init time we are like module... no logo */ 1761 ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT; 1762 ACCESS_FBINFO(fbcon.flags) |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */ 1763 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */ 1764 FBINFO_HWACCEL_FILLRECT | /* And fillrect */ 1765 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */ 1766 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */ 1767 FBINFO_HWACCEL_YPAN; /* And vertical panning */ 1768 ACCESS_FBINFO(video.len_usable) &= PAGE_MASK; 1769 fb_alloc_cmap(&ACCESS_FBINFO(fbcon.cmap), 256, 1); 1770 1771#ifndef MODULE 1772 /* mode database is marked __init!!! */ 1773 if (!hotplug) { 1774 fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL, 1775 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel); 1776 } 1777#endif /* !MODULE */ 1778 1779 /* mode modifiers */ 1780 if (hslen) 1781 vesafb_defined.hsync_len = hslen; 1782 if (vslen) 1783 vesafb_defined.vsync_len = vslen; 1784 if (left != ~0) 1785 vesafb_defined.left_margin = left; 1786 if (right != ~0) 1787 vesafb_defined.right_margin = right; 1788 if (upper != ~0) 1789 vesafb_defined.upper_margin = upper; 1790 if (lower != ~0) 1791 vesafb_defined.lower_margin = lower; 1792 if (xres) 1793 vesafb_defined.xres = xres; 1794 if (yres) 1795 vesafb_defined.yres = yres; 1796 if (sync != -1) 1797 vesafb_defined.sync = sync; 1798 else if (vesafb_defined.sync == ~0) { 1799 vesafb_defined.sync = 0; 1800 if (yres < 400) 1801 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT; 1802 else if (yres < 480) 1803 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT; 1804 } 1805 1806 /* fv, fh, maxclk limits was specified */ 1807 { 1808 unsigned int tmp; 1809 1810 if (fv) { 1811 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres 1812 + vesafb_defined.lower_margin + vesafb_defined.vsync_len); 1813 if ((tmp < fh) || (fh == 0)) fh = tmp; 1814 } 1815 if (fh) { 1816 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres 1817 + vesafb_defined.right_margin + vesafb_defined.hsync_len); 1818 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp; 1819 } 1820 tmp = (maxclk + 499) / 500; 1821 if (tmp) { 1822 tmp = (2000000000 + tmp) / tmp; 1823 if (tmp > pixclock) pixclock = tmp; 1824 } 1825 } 1826 if (pixclock) { 1827 if (pixclock < 2000) /* > 500MHz */ 1828 pixclock = 4000; /* 250MHz */ 1829 if (pixclock > 1000000) 1830 pixclock = 1000000; /* 1MHz */ 1831 vesafb_defined.pixclock = pixclock; 1832 } 1833 1834#if defined(CONFIG_PPC_PMAC) 1835#ifndef MODULE 1836 if (machine_is(powermac)) { 1837 struct fb_var_screeninfo var; 1838 if (default_vmode <= 0 || default_vmode > VMODE_MAX) 1839 default_vmode = VMODE_640_480_60; 1840#ifdef CONFIG_NVRAM 1841 if (default_cmode == CMODE_NVRAM) 1842 default_cmode = nvram_read_byte(NV_CMODE); 1843#endif 1844 if (default_cmode < CMODE_8 || default_cmode > CMODE_32) 1845 default_cmode = CMODE_8; 1846 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) { 1847 var.accel_flags = vesafb_defined.accel_flags; 1848 var.xoffset = var.yoffset = 0; 1849 /* Note: mac_vmode_to_var() does not set all parameters */ 1850 vesafb_defined = var; 1851 } 1852 } 1853#endif /* !MODULE */ 1854#endif /* CONFIG_PPC_PMAC */ 1855 vesafb_defined.xres_virtual = vesafb_defined.xres; 1856 if (nopan) { 1857 vesafb_defined.yres_virtual = vesafb_defined.yres; 1858 } else { 1859 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough 1860 to yres_virtual * xres_virtual < 2^32 */ 1861 } 1862 matroxfb_init_fix(PMINFO2); 1863 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)); 1864 matroxfb_update_fix(PMINFO2); 1865 /* Normalize values (namely yres_virtual) */ 1866 matroxfb_check_var(&vesafb_defined, &ACCESS_FBINFO(fbcon)); 1867 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over 1868 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var, 1869 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work 1870 * anyway. But we at least tried... */ 1871 ACCESS_FBINFO(fbcon.var) = vesafb_defined; 1872 err = -EINVAL; 1873 1874 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n", 1875 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel, 1876 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual); 1877 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n", 1878 ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len)); 1879 1880/* We do not have to set currcon to 0... register_framebuffer do it for us on first console 1881 * and we do not want currcon == 0 for subsequent framebuffers */ 1882 1883 ACCESS_FBINFO(fbcon).device = &ACCESS_FBINFO(pcidev)->dev; 1884 if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) { 1885 goto failVideoIO; 1886 } 1887 printk("fb%d: %s frame buffer device\n", 1888 ACCESS_FBINFO(fbcon.node), ACCESS_FBINFO(fbcon.fix.id)); 1889 1890 /* there is no console on this fb... but we have to initialize hardware 1891 * until someone tells me what is proper thing to do */ 1892 if (!ACCESS_FBINFO(initialized)) { 1893 printk(KERN_INFO "fb%d: initializing hardware\n", 1894 ACCESS_FBINFO(fbcon.node)); 1895 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var 1896 * already before, so register_framebuffer works correctly. */ 1897 vesafb_defined.activate |= FB_ACTIVATE_FORCE; 1898 fb_set_var(&ACCESS_FBINFO(fbcon), &vesafb_defined); 1899 } 1900 1901 return 0; 1902failVideoIO:; 1903 matroxfb_g450_shutdown(PMINFO2); 1904 mga_iounmap(ACCESS_FBINFO(video.vbase)); 1905failCtrlIO:; 1906 mga_iounmap(ACCESS_FBINFO(mmio.vbase)); 1907failVideoMR:; 1908 release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum)); 1909failCtrlMR:; 1910 release_mem_region(ctrlptr_phys, 16384); 1911fail:; 1912 return err; 1913} 1914 1915static LIST_HEAD(matroxfb_list); 1916static LIST_HEAD(matroxfb_driver_list); 1917 1918#define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb) 1919#define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node) 1920int matroxfb_register_driver(struct matroxfb_driver* drv) { 1921 struct matrox_fb_info* minfo; 1922 1923 list_add(&drv->node, &matroxfb_driver_list); 1924 for (minfo = matroxfb_l(matroxfb_list.next); 1925 minfo != matroxfb_l(&matroxfb_list); 1926 minfo = matroxfb_l(minfo->next_fb.next)) { 1927 void* p; 1928 1929 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS) 1930 continue; 1931 p = drv->probe(minfo); 1932 if (p) { 1933 minfo->drivers_data[minfo->drivers_count] = p; 1934 minfo->drivers[minfo->drivers_count++] = drv; 1935 } 1936 } 1937 return 0; 1938} 1939 1940void matroxfb_unregister_driver(struct matroxfb_driver* drv) { 1941 struct matrox_fb_info* minfo; 1942 1943 list_del(&drv->node); 1944 for (minfo = matroxfb_l(matroxfb_list.next); 1945 minfo != matroxfb_l(&matroxfb_list); 1946 minfo = matroxfb_l(minfo->next_fb.next)) { 1947 int i; 1948 1949 for (i = 0; i < minfo->drivers_count; ) { 1950 if (minfo->drivers[i] == drv) { 1951 if (drv && drv->remove) 1952 drv->remove(minfo, minfo->drivers_data[i]); 1953 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count]; 1954 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count]; 1955 } else 1956 i++; 1957 } 1958 } 1959} 1960 1961static void matroxfb_register_device(struct matrox_fb_info* minfo) { 1962 struct matroxfb_driver* drv; 1963 int i = 0; 1964 list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list); 1965 for (drv = matroxfb_driver_l(matroxfb_driver_list.next); 1966 drv != matroxfb_driver_l(&matroxfb_driver_list); 1967 drv = matroxfb_driver_l(drv->node.next)) { 1968 if (drv && drv->probe) { 1969 void *p = drv->probe(minfo); 1970 if (p) { 1971 minfo->drivers_data[i] = p; 1972 minfo->drivers[i++] = drv; 1973 if (i == MATROXFB_MAX_FB_DRIVERS) 1974 break; 1975 } 1976 } 1977 } 1978 minfo->drivers_count = i; 1979} 1980 1981static void matroxfb_unregister_device(struct matrox_fb_info* minfo) { 1982 int i; 1983 1984 list_del(&ACCESS_FBINFO(next_fb)); 1985 for (i = 0; i < minfo->drivers_count; i++) { 1986 struct matroxfb_driver* drv = minfo->drivers[i]; 1987 1988 if (drv && drv->remove) 1989 drv->remove(minfo, minfo->drivers_data[i]); 1990 } 1991} 1992 1993static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) { 1994 struct board* b; 1995 u_int8_t rev; 1996 u_int16_t svid; 1997 u_int16_t sid; 1998 struct matrox_fb_info* minfo; 1999 int err; 2000 u_int32_t cmd; 2001#ifndef CONFIG_FB_MATROX_MULTIHEAD 2002 static int registered = 0; 2003#endif 2004 DBG(__FUNCTION__) 2005 2006 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 2007 svid = pdev->subsystem_vendor; 2008 sid = pdev->subsystem_device; 2009 for (b = dev_list; b->vendor; b++) { 2010 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < rev)) continue; 2011 if (b->svid) 2012 if ((b->svid != svid) || (b->sid != sid)) continue; 2013 break; 2014 } 2015 /* not match... */ 2016 if (!b->vendor) 2017 return -ENODEV; 2018 if (dev > 0) { 2019 /* not requested one... */ 2020 dev--; 2021 return -ENODEV; 2022 } 2023 pci_read_config_dword(pdev, PCI_COMMAND, &cmd); 2024 if (pci_enable_device(pdev)) { 2025 return -1; 2026 } 2027 2028#ifdef CONFIG_FB_MATROX_MULTIHEAD 2029 minfo = kmalloc(sizeof(*minfo), GFP_KERNEL); 2030 if (!minfo) 2031 return -1; 2032#else 2033 if (registered) /* singlehead driver... */ 2034 return -1; 2035 minfo = &matroxfb_global_mxinfo; 2036#endif 2037 memset(MINFO, 0, sizeof(*MINFO)); 2038 2039 ACCESS_FBINFO(pcidev) = pdev; 2040 ACCESS_FBINFO(dead) = 0; 2041 ACCESS_FBINFO(usecount) = 0; 2042 ACCESS_FBINFO(userusecount) = 0; 2043 2044 pci_set_drvdata(pdev, MINFO); 2045 /* DEVFLAGS */ 2046 ACCESS_FBINFO(devflags.memtype) = memtype; 2047 if (memtype != -1) 2048 noinit = 0; 2049 if (cmd & PCI_COMMAND_MEMORY) { 2050 ACCESS_FBINFO(devflags.novga) = novga; 2051 ACCESS_FBINFO(devflags.nobios) = nobios; 2052 ACCESS_FBINFO(devflags.noinit) = noinit; 2053 /* subsequent heads always needs initialization and must not enable BIOS */ 2054 novga = 1; 2055 nobios = 1; 2056 noinit = 0; 2057 } else { 2058 ACCESS_FBINFO(devflags.novga) = 1; 2059 ACCESS_FBINFO(devflags.nobios) = 1; 2060 ACCESS_FBINFO(devflags.noinit) = 0; 2061 } 2062 2063 ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry; 2064 ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24; 2065 ACCESS_FBINFO(devflags.precise_width) = option_precise_width; 2066 ACCESS_FBINFO(devflags.sgram) = sgram; 2067 ACCESS_FBINFO(capable.cross4MB) = cross4MB; 2068 2069 spin_lock_init(&ACCESS_FBINFO(lock.DAC)); 2070 spin_lock_init(&ACCESS_FBINFO(lock.accel)); 2071 init_rwsem(&ACCESS_FBINFO(crtc2.lock)); 2072 init_rwsem(&ACCESS_FBINFO(altout.lock)); 2073 ACCESS_FBINFO(irq_flags) = 0; 2074 init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait)); 2075 init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait)); 2076 ACCESS_FBINFO(crtc1.panpos) = -1; 2077 2078 err = initMatrox2(PMINFO b); 2079 if (!err) { 2080#ifndef CONFIG_FB_MATROX_MULTIHEAD 2081 registered = 1; 2082#endif 2083 matroxfb_register_device(MINFO); 2084 return 0; 2085 } 2086#ifdef CONFIG_FB_MATROX_MULTIHEAD 2087 kfree(minfo); 2088#endif 2089 return -1; 2090} 2091 2092static void pci_remove_matrox(struct pci_dev* pdev) { 2093 struct matrox_fb_info* minfo; 2094 2095 minfo = pci_get_drvdata(pdev); 2096 matroxfb_remove(PMINFO 1); 2097} 2098 2099static struct pci_device_id matroxfb_devices[] = { 2100#ifdef CONFIG_FB_MATROX_MILLENIUM 2101 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 2102 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2103 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 2104 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2105 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 2106 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2107#endif 2108#ifdef CONFIG_FB_MATROX_MYSTIQUE 2109 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 2110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2111#endif 2112#ifdef CONFIG_FB_MATROX_G 2113 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 2114 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2115 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 2116 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2117 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 2118 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2119 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 2120 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2121 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 2122 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2123 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 2124 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2125#endif 2126 {0, 0, 2127 0, 0, 0, 0, 0} 2128}; 2129 2130MODULE_DEVICE_TABLE(pci, matroxfb_devices); 2131 2132 2133static struct pci_driver matroxfb_driver = { 2134 .name = "matroxfb", 2135 .id_table = matroxfb_devices, 2136 .probe = matroxfb_probe, 2137 .remove = pci_remove_matrox, 2138}; 2139 2140/* **************************** init-time only **************************** */ 2141 2142#define RSResolution(X) ((X) & 0x0F) 2143#define RS640x400 1 2144#define RS640x480 2 2145#define RS800x600 3 2146#define RS1024x768 4 2147#define RS1280x1024 5 2148#define RS1600x1200 6 2149#define RS768x576 7 2150#define RS960x720 8 2151#define RS1152x864 9 2152#define RS1408x1056 10 2153#define RS640x350 11 2154#define RS1056x344 12 /* 132 x 43 text */ 2155#define RS1056x400 13 /* 132 x 50 text */ 2156#define RS1056x480 14 /* 132 x 60 text */ 2157#define RSNoxNo 15 2158/* 10-FF */ 2159static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = { 2160 { 640, 400, 48, 16, 39, 8, 96, 2, 70 }, 2161 { 640, 480, 48, 16, 33, 10, 96, 2, 60 }, 2162 { 800, 600, 144, 24, 28, 8, 112, 6, 60 }, 2163 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 }, 2164 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 }, 2165 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 }, 2166 { 768, 576, 144, 16, 28, 6, 112, 4, 60 }, 2167 { 960, 720, 144, 24, 28, 8, 112, 4, 60 }, 2168 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 }, 2169 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 }, 2170 { 640, 350, 48, 16, 39, 8, 96, 2, 70 }, 2171 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 }, 2172 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 }, 2173 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 }, 2174 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 } 2175}; 2176 2177#define RSCreate(X,Y) ((X) | ((Y) << 8)) 2178static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = { 2179/* default must be first */ 2180 { ~0, RSCreate(RSNoxNo, RS8bpp ) }, 2181 { 0x101, RSCreate(RS640x480, RS8bpp ) }, 2182 { 0x100, RSCreate(RS640x400, RS8bpp ) }, 2183 { 0x180, RSCreate(RS768x576, RS8bpp ) }, 2184 { 0x103, RSCreate(RS800x600, RS8bpp ) }, 2185 { 0x188, RSCreate(RS960x720, RS8bpp ) }, 2186 { 0x105, RSCreate(RS1024x768, RS8bpp ) }, 2187 { 0x190, RSCreate(RS1152x864, RS8bpp ) }, 2188 { 0x107, RSCreate(RS1280x1024, RS8bpp ) }, 2189 { 0x198, RSCreate(RS1408x1056, RS8bpp ) }, 2190 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) }, 2191 { 0x110, RSCreate(RS640x480, RS15bpp) }, 2192 { 0x181, RSCreate(RS768x576, RS15bpp) }, 2193 { 0x113, RSCreate(RS800x600, RS15bpp) }, 2194 { 0x189, RSCreate(RS960x720, RS15bpp) }, 2195 { 0x116, RSCreate(RS1024x768, RS15bpp) }, 2196 { 0x191, RSCreate(RS1152x864, RS15bpp) }, 2197 { 0x119, RSCreate(RS1280x1024, RS15bpp) }, 2198 { 0x199, RSCreate(RS1408x1056, RS15bpp) }, 2199 { 0x11D, RSCreate(RS1600x1200, RS15bpp) }, 2200 { 0x111, RSCreate(RS640x480, RS16bpp) }, 2201 { 0x182, RSCreate(RS768x576, RS16bpp) }, 2202 { 0x114, RSCreate(RS800x600, RS16bpp) }, 2203 { 0x18A, RSCreate(RS960x720, RS16bpp) }, 2204 { 0x117, RSCreate(RS1024x768, RS16bpp) }, 2205 { 0x192, RSCreate(RS1152x864, RS16bpp) }, 2206 { 0x11A, RSCreate(RS1280x1024, RS16bpp) }, 2207 { 0x19A, RSCreate(RS1408x1056, RS16bpp) }, 2208 { 0x11E, RSCreate(RS1600x1200, RS16bpp) }, 2209 { 0x1B2, RSCreate(RS640x480, RS24bpp) }, 2210 { 0x184, RSCreate(RS768x576, RS24bpp) }, 2211 { 0x1B5, RSCreate(RS800x600, RS24bpp) }, 2212 { 0x18C, RSCreate(RS960x720, RS24bpp) }, 2213 { 0x1B8, RSCreate(RS1024x768, RS24bpp) }, 2214 { 0x194, RSCreate(RS1152x864, RS24bpp) }, 2215 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) }, 2216 { 0x19C, RSCreate(RS1408x1056, RS24bpp) }, 2217 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) }, 2218 { 0x112, RSCreate(RS640x480, RS32bpp) }, 2219 { 0x183, RSCreate(RS768x576, RS32bpp) }, 2220 { 0x115, RSCreate(RS800x600, RS32bpp) }, 2221 { 0x18B, RSCreate(RS960x720, RS32bpp) }, 2222 { 0x118, RSCreate(RS1024x768, RS32bpp) }, 2223 { 0x193, RSCreate(RS1152x864, RS32bpp) }, 2224 { 0x11B, RSCreate(RS1280x1024, RS32bpp) }, 2225 { 0x19B, RSCreate(RS1408x1056, RS32bpp) }, 2226 { 0x11F, RSCreate(RS1600x1200, RS32bpp) }, 2227 { 0x010, RSCreate(RS640x350, RS4bpp ) }, 2228 { 0x012, RSCreate(RS640x480, RS4bpp ) }, 2229 { 0x102, RSCreate(RS800x600, RS4bpp ) }, 2230 { 0x104, RSCreate(RS1024x768, RS4bpp ) }, 2231 { 0x106, RSCreate(RS1280x1024, RS4bpp ) }, 2232 { 0, 0 }}; 2233 2234static void __init matroxfb_init_params(void) { 2235 /* fh from kHz to Hz */ 2236 if (fh < 1000) 2237 fh *= 1000; /* 1kHz minimum */ 2238 /* maxclk */ 2239 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */ 2240 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */ 2241 /* fix VESA number */ 2242 if (vesa != ~0) 2243 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */ 2244 2245 /* static settings */ 2246 for (RSptr = vesamap; RSptr->vesa; RSptr++) { 2247 if (RSptr->vesa == vesa) break; 2248 } 2249 if (!RSptr->vesa) { 2250 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa); 2251 RSptr = vesamap; 2252 } 2253 { 2254 int res = RSResolution(RSptr->info)-1; 2255 if (left == ~0) 2256 left = timmings[res].left; 2257 if (!xres) 2258 xres = timmings[res].xres; 2259 if (right == ~0) 2260 right = timmings[res].right; 2261 if (!hslen) 2262 hslen = timmings[res].hslen; 2263 if (upper == ~0) 2264 upper = timmings[res].upper; 2265 if (!yres) 2266 yres = timmings[res].yres; 2267 if (lower == ~0) 2268 lower = timmings[res].lower; 2269 if (!vslen) 2270 vslen = timmings[res].vslen; 2271 if (!(fv||fh||maxclk||pixclock)) 2272 fv = timmings[res].vfreq; 2273 if (depth == -1) 2274 depth = RSDepth(RSptr->info); 2275 } 2276} 2277 2278static int __init matrox_init(void) { 2279 int err; 2280 2281 matroxfb_init_params(); 2282 err = pci_register_driver(&matroxfb_driver); 2283 dev = -1; /* accept all new devices... */ 2284 return err; 2285} 2286 2287/* **************************** exit-time only **************************** */ 2288 2289static void __exit matrox_done(void) { 2290 pci_unregister_driver(&matroxfb_driver); 2291} 2292 2293#ifndef MODULE 2294 2295/* ************************* init in-kernel code ************************** */ 2296 2297static int __init matroxfb_setup(char *options) { 2298 char *this_opt; 2299 2300 DBG(__FUNCTION__) 2301 2302 if (!options || !*options) 2303 return 0; 2304 2305 while ((this_opt = strsep(&options, ",")) != NULL) { 2306 if (!*this_opt) continue; 2307 2308 dprintk("matroxfb_setup: option %s\n", this_opt); 2309 2310 if (!strncmp(this_opt, "dev:", 4)) 2311 dev = simple_strtoul(this_opt+4, NULL, 0); 2312 else if (!strncmp(this_opt, "depth:", 6)) { 2313 switch (simple_strtoul(this_opt+6, NULL, 0)) { 2314 case 0: depth = RSText; break; 2315 case 4: depth = RS4bpp; break; 2316 case 8: depth = RS8bpp; break; 2317 case 15:depth = RS15bpp; break; 2318 case 16:depth = RS16bpp; break; 2319 case 24:depth = RS24bpp; break; 2320 case 32:depth = RS32bpp; break; 2321 default: 2322 printk(KERN_ERR "matroxfb: unsupported color depth\n"); 2323 } 2324 } else if (!strncmp(this_opt, "xres:", 5)) 2325 xres = simple_strtoul(this_opt+5, NULL, 0); 2326 else if (!strncmp(this_opt, "yres:", 5)) 2327 yres = simple_strtoul(this_opt+5, NULL, 0); 2328 else if (!strncmp(this_opt, "vslen:", 6)) 2329 vslen = simple_strtoul(this_opt+6, NULL, 0); 2330 else if (!strncmp(this_opt, "hslen:", 6)) 2331 hslen = simple_strtoul(this_opt+6, NULL, 0); 2332 else if (!strncmp(this_opt, "left:", 5)) 2333 left = simple_strtoul(this_opt+5, NULL, 0); 2334 else if (!strncmp(this_opt, "right:", 6)) 2335 right = simple_strtoul(this_opt+6, NULL, 0); 2336 else if (!strncmp(this_opt, "upper:", 6)) 2337 upper = simple_strtoul(this_opt+6, NULL, 0); 2338 else if (!strncmp(this_opt, "lower:", 6)) 2339 lower = simple_strtoul(this_opt+6, NULL, 0); 2340 else if (!strncmp(this_opt, "pixclock:", 9)) 2341 pixclock = simple_strtoul(this_opt+9, NULL, 0); 2342 else if (!strncmp(this_opt, "sync:", 5)) 2343 sync = simple_strtoul(this_opt+5, NULL, 0); 2344 else if (!strncmp(this_opt, "vesa:", 5)) 2345 vesa = simple_strtoul(this_opt+5, NULL, 0); 2346 else if (!strncmp(this_opt, "maxclk:", 7)) 2347 maxclk = simple_strtoul(this_opt+7, NULL, 0); 2348 else if (!strncmp(this_opt, "fh:", 3)) 2349 fh = simple_strtoul(this_opt+3, NULL, 0); 2350 else if (!strncmp(this_opt, "fv:", 3)) 2351 fv = simple_strtoul(this_opt+3, NULL, 0); 2352 else if (!strncmp(this_opt, "mem:", 4)) 2353 mem = simple_strtoul(this_opt+4, NULL, 0); 2354 else if (!strncmp(this_opt, "mode:", 5)) 2355 strlcpy(videomode, this_opt+5, sizeof(videomode)); 2356 else if (!strncmp(this_opt, "outputs:", 8)) 2357 strlcpy(outputs, this_opt+8, sizeof(outputs)); 2358 else if (!strncmp(this_opt, "dfp:", 4)) { 2359 dfp_type = simple_strtoul(this_opt+4, NULL, 0); 2360 dfp = 1; 2361 } 2362#ifdef CONFIG_PPC_PMAC 2363 else if (!strncmp(this_opt, "vmode:", 6)) { 2364 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0); 2365 if (vmode > 0 && vmode <= VMODE_MAX) 2366 default_vmode = vmode; 2367 } else if (!strncmp(this_opt, "cmode:", 6)) { 2368 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0); 2369 switch (cmode) { 2370 case 0: 2371 case 8: 2372 default_cmode = CMODE_8; 2373 break; 2374 case 15: 2375 case 16: 2376 default_cmode = CMODE_16; 2377 break; 2378 case 24: 2379 case 32: 2380 default_cmode = CMODE_32; 2381 break; 2382 } 2383 } 2384#endif 2385 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */ 2386 disabled = 1; 2387 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */ 2388 disabled = 0; 2389 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */ 2390 sgram = 1; 2391 else if (!strcmp(this_opt, "sdram")) 2392 sgram = 0; 2393 else if (!strncmp(this_opt, "memtype:", 8)) 2394 memtype = simple_strtoul(this_opt+8, NULL, 0); 2395 else { 2396 int value = 1; 2397 2398 if (!strncmp(this_opt, "no", 2)) { 2399 value = 0; 2400 this_opt += 2; 2401 } 2402 if (! strcmp(this_opt, "inverse")) 2403 inverse = value; 2404 else if (!strcmp(this_opt, "accel")) 2405 noaccel = !value; 2406 else if (!strcmp(this_opt, "pan")) 2407 nopan = !value; 2408 else if (!strcmp(this_opt, "pciretry")) 2409 no_pci_retry = !value; 2410 else if (!strcmp(this_opt, "vga")) 2411 novga = !value; 2412 else if (!strcmp(this_opt, "bios")) 2413 nobios = !value; 2414 else if (!strcmp(this_opt, "init")) 2415 noinit = !value; 2416#ifdef CONFIG_MTRR 2417 else if (!strcmp(this_opt, "mtrr")) 2418 mtrr = value; 2419#endif 2420 else if (!strcmp(this_opt, "inv24")) 2421 inv24 = value; 2422 else if (!strcmp(this_opt, "cross4MB")) 2423 cross4MB = value; 2424 else if (!strcmp(this_opt, "grayscale")) 2425 grayscale = value; 2426 else if (!strcmp(this_opt, "dfp")) 2427 dfp = value; 2428 else { 2429 strlcpy(videomode, this_opt, sizeof(videomode)); 2430 } 2431 } 2432 } 2433 return 0; 2434} 2435 2436static int __initdata initialized = 0; 2437 2438static int __init matroxfb_init(void) 2439{ 2440 char *option = NULL; 2441 int err = 0; 2442 2443 DBG(__FUNCTION__) 2444 2445 if (fb_get_options("matroxfb", &option)) 2446 return -ENODEV; 2447 matroxfb_setup(option); 2448 2449 if (disabled) 2450 return -ENXIO; 2451 if (!initialized) { 2452 initialized = 1; 2453 err = matrox_init(); 2454 } 2455 hotplug = 1; 2456 /* never return failure, user can hotplug matrox later... */ 2457 return err; 2458} 2459 2460module_init(matroxfb_init); 2461 2462#else 2463 2464/* *************************** init module code **************************** */ 2465 2466MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>"); 2467MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550"); 2468MODULE_LICENSE("GPL"); 2469 2470module_param(mem, int, 0); 2471MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)"); 2472module_param(disabled, int, 0); 2473MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)"); 2474module_param(noaccel, int, 0); 2475MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)"); 2476module_param(nopan, int, 0); 2477MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)"); 2478module_param(no_pci_retry, int, 0); 2479MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)"); 2480module_param(novga, int, 0); 2481MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)"); 2482module_param(nobios, int, 0); 2483MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)"); 2484module_param(noinit, int, 0); 2485MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)"); 2486module_param(memtype, int, 0); 2487MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)"); 2488#ifdef CONFIG_MTRR 2489module_param(mtrr, int, 0); 2490MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)"); 2491#endif 2492module_param(sgram, int, 0); 2493MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)"); 2494module_param(inv24, int, 0); 2495MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)"); 2496module_param(inverse, int, 0); 2497MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)"); 2498#ifdef CONFIG_FB_MATROX_MULTIHEAD 2499module_param(dev, int, 0); 2500MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)"); 2501#else 2502module_param(dev, int, 0); 2503MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=first working)"); 2504#endif 2505module_param(vesa, int, 0); 2506MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)"); 2507module_param(xres, int, 0); 2508MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)"); 2509module_param(yres, int, 0); 2510MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)"); 2511module_param(upper, int, 0); 2512MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)"); 2513module_param(lower, int, 0); 2514MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)"); 2515module_param(vslen, int, 0); 2516MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)"); 2517module_param(left, int, 0); 2518MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)"); 2519module_param(right, int, 0); 2520MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)"); 2521module_param(hslen, int, 0); 2522MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)"); 2523module_param(pixclock, int, 0); 2524MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)"); 2525module_param(sync, int, 0); 2526MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)"); 2527module_param(depth, int, 0); 2528MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)"); 2529module_param(maxclk, int, 0); 2530MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz"); 2531module_param(fh, int, 0); 2532MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz"); 2533module_param(fv, int, 0); 2534MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n" 2535"You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"\n"); 2536module_param(grayscale, int, 0); 2537MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)"); 2538module_param(cross4MB, int, 0); 2539MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)"); 2540module_param(dfp, int, 0); 2541MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)"); 2542module_param(dfp_type, int, 0); 2543MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)"); 2544module_param_string(outputs, outputs, sizeof(outputs), 0); 2545MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)"); 2546#ifdef CONFIG_PPC_PMAC 2547module_param_named(vmode, default_vmode, int, 0); 2548MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)"); 2549module_param_named(cmode, default_cmode, int, 0); 2550MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)"); 2551#endif 2552 2553int __init init_module(void){ 2554 2555 DBG(__FUNCTION__) 2556 2557 if (disabled) 2558 return -ENXIO; 2559 2560 if (depth == 0) 2561 depth = RSText; 2562 else if (depth == 4) 2563 depth = RS4bpp; 2564 else if (depth == 8) 2565 depth = RS8bpp; 2566 else if (depth == 15) 2567 depth = RS15bpp; 2568 else if (depth == 16) 2569 depth = RS16bpp; 2570 else if (depth == 24) 2571 depth = RS24bpp; 2572 else if (depth == 32) 2573 depth = RS32bpp; 2574 else if (depth != -1) { 2575 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth); 2576 depth = -1; 2577 } 2578 matrox_init(); 2579 /* never return failure; user can hotplug matrox later... */ 2580 return 0; 2581} 2582#endif /* MODULE */ 2583 2584module_exit(matrox_done); 2585EXPORT_SYMBOL(matroxfb_register_driver); 2586EXPORT_SYMBOL(matroxfb_unregister_driver); 2587EXPORT_SYMBOL(matroxfb_wait_for_sync); 2588EXPORT_SYMBOL(matroxfb_enable_irq); 2589 2590/* 2591 * Overrides for Emacs so that we follow Linus's tabbing style. 2592 * --------------------------------------------------------------------------- 2593 * Local variables: 2594 * c-basic-offset: 8 2595 * End: 2596 */ 2597