1/*
2 *  Driver for NEC VR4100 series Serial Interface Unit.
3 *
4 *  Copyright (C) 2004-2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 *  Based on drivers/serial/8250.c, by Russell King.
7 *
8 *  This program is free software; you can redistribute it and/or modify
9 *  it under the terms of the GNU General Public License as published by
10 *  the Free Software Foundation; either version 2 of the License, or
11 *  (at your option) any later version.
12 *
13 *  This program is distributed in the hope that it will be useful,
14 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16 *  GNU General Public License for more details.
17 *
18 *  You should have received a copy of the GNU General Public License
19 *  along with this program; if not, write to the Free Software
20 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21 */
22
23#if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
24#define SUPPORT_SYSRQ
25#endif
26
27#include <linux/console.h>
28#include <linux/errno.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31#include <linux/ioport.h>
32#include <linux/module.h>
33#include <linux/platform_device.h>
34#include <linux/serial.h>
35#include <linux/serial_core.h>
36#include <linux/serial_reg.h>
37#include <linux/tty.h>
38#include <linux/tty_flip.h>
39
40#include <asm/io.h>
41#include <asm/vr41xx/siu.h>
42#include <asm/vr41xx/vr41xx.h>
43
44#define SIU_BAUD_BASE	1152000
45#define SIU_MAJOR	204
46#define SIU_MINOR_BASE	82
47
48#define RX_MAX_COUNT	256
49#define TX_MAX_COUNT	15
50
51#define SIUIRSEL	0x08
52 #define TMICMODE	0x20
53 #define TMICTX		0x10
54 #define IRMSEL		0x0c
55 #define IRMSEL_HP	0x08
56 #define IRMSEL_TEMIC	0x04
57 #define IRMSEL_SHARP	0x00
58 #define IRUSESEL	0x02
59 #define SIRSEL		0x01
60
61static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = {
62	[0 ... SIU_PORTS_MAX-1] = {
63		.lock	= __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock),
64		.irq	= -1,
65	},
66};
67
68static uint8_t lsr_break_flag[SIU_PORTS_MAX];
69
70#define siu_read(port, offset)		readb((port)->membase + (offset))
71#define siu_write(port, offset, value)	writeb((value), (port)->membase + (offset))
72
73void vr41xx_select_siu_interface(siu_interface_t interface)
74{
75	struct uart_port *port;
76	unsigned long flags;
77	uint8_t irsel;
78
79	port = &siu_uart_ports[0];
80
81	spin_lock_irqsave(&port->lock, flags);
82
83	irsel = siu_read(port, SIUIRSEL);
84	if (interface == SIU_INTERFACE_IRDA)
85		irsel |= SIRSEL;
86	else
87		irsel &= ~SIRSEL;
88	siu_write(port, SIUIRSEL, irsel);
89
90	spin_unlock_irqrestore(&port->lock, flags);
91}
92EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
93
94void vr41xx_use_irda(irda_use_t use)
95{
96	struct uart_port *port;
97	unsigned long flags;
98	uint8_t irsel;
99
100	port = &siu_uart_ports[0];
101
102	spin_lock_irqsave(&port->lock, flags);
103
104	irsel = siu_read(port, SIUIRSEL);
105	if (use == FIR_USE_IRDA)
106		irsel |= IRUSESEL;
107	else
108		irsel &= ~IRUSESEL;
109	siu_write(port, SIUIRSEL, irsel);
110
111	spin_unlock_irqrestore(&port->lock, flags);
112}
113EXPORT_SYMBOL_GPL(vr41xx_use_irda);
114
115void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
116{
117	struct uart_port *port;
118	unsigned long flags;
119	uint8_t irsel;
120
121	port = &siu_uart_ports[0];
122
123	spin_lock_irqsave(&port->lock, flags);
124
125	irsel = siu_read(port, SIUIRSEL);
126	irsel &= ~(IRMSEL | TMICTX | TMICMODE);
127	switch (module) {
128	case SHARP_IRDA:
129		irsel |= IRMSEL_SHARP;
130		break;
131	case TEMIC_IRDA:
132		irsel |= IRMSEL_TEMIC | TMICMODE;
133		if (speed == IRDA_TX_4MBPS)
134			irsel |= TMICTX;
135		break;
136	case HP_IRDA:
137		irsel |= IRMSEL_HP;
138		break;
139	default:
140		break;
141	}
142	siu_write(port, SIUIRSEL, irsel);
143
144	spin_unlock_irqrestore(&port->lock, flags);
145}
146EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
147
148static inline void siu_clear_fifo(struct uart_port *port)
149{
150	siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
151	siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
152	                          UART_FCR_CLEAR_XMIT);
153	siu_write(port, UART_FCR, 0);
154}
155
156static inline unsigned long siu_port_size(struct uart_port *port)
157{
158	switch (port->type) {
159	case PORT_VR41XX_SIU:
160		return 11UL;
161	case PORT_VR41XX_DSIU:
162		return 8UL;
163	}
164
165	return 0;
166}
167
168static inline unsigned int siu_check_type(struct uart_port *port)
169{
170	if (port->line == 0)
171		return PORT_VR41XX_SIU;
172	if (port->line == 1 && port->irq != -1)
173		return PORT_VR41XX_DSIU;
174
175	return PORT_UNKNOWN;
176}
177
178static inline const char *siu_type_name(struct uart_port *port)
179{
180	switch (port->type) {
181	case PORT_VR41XX_SIU:
182		return "SIU";
183	case PORT_VR41XX_DSIU:
184		return "DSIU";
185	}
186
187	return NULL;
188}
189
190static unsigned int siu_tx_empty(struct uart_port *port)
191{
192	uint8_t lsr;
193
194	lsr = siu_read(port, UART_LSR);
195	if (lsr & UART_LSR_TEMT)
196		return TIOCSER_TEMT;
197
198	return 0;
199}
200
201static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
202{
203	uint8_t mcr = 0;
204
205	if (mctrl & TIOCM_DTR)
206		mcr |= UART_MCR_DTR;
207	if (mctrl & TIOCM_RTS)
208		mcr |= UART_MCR_RTS;
209	if (mctrl & TIOCM_OUT1)
210		mcr |= UART_MCR_OUT1;
211	if (mctrl & TIOCM_OUT2)
212		mcr |= UART_MCR_OUT2;
213	if (mctrl & TIOCM_LOOP)
214		mcr |= UART_MCR_LOOP;
215
216	siu_write(port, UART_MCR, mcr);
217}
218
219static unsigned int siu_get_mctrl(struct uart_port *port)
220{
221	uint8_t msr;
222	unsigned int mctrl = 0;
223
224	msr = siu_read(port, UART_MSR);
225	if (msr & UART_MSR_DCD)
226		mctrl |= TIOCM_CAR;
227	if (msr & UART_MSR_RI)
228		mctrl |= TIOCM_RNG;
229	if (msr & UART_MSR_DSR)
230		mctrl |= TIOCM_DSR;
231	if (msr & UART_MSR_CTS)
232		mctrl |= TIOCM_CTS;
233
234	return mctrl;
235}
236
237static void siu_stop_tx(struct uart_port *port)
238{
239	unsigned long flags;
240	uint8_t ier;
241
242	spin_lock_irqsave(&port->lock, flags);
243
244	ier = siu_read(port, UART_IER);
245	ier &= ~UART_IER_THRI;
246	siu_write(port, UART_IER, ier);
247
248	spin_unlock_irqrestore(&port->lock, flags);
249}
250
251static void siu_start_tx(struct uart_port *port)
252{
253	unsigned long flags;
254	uint8_t ier;
255
256	spin_lock_irqsave(&port->lock, flags);
257
258	ier = siu_read(port, UART_IER);
259	ier |= UART_IER_THRI;
260	siu_write(port, UART_IER, ier);
261
262	spin_unlock_irqrestore(&port->lock, flags);
263}
264
265static void siu_stop_rx(struct uart_port *port)
266{
267	unsigned long flags;
268	uint8_t ier;
269
270	spin_lock_irqsave(&port->lock, flags);
271
272	ier = siu_read(port, UART_IER);
273	ier &= ~UART_IER_RLSI;
274	siu_write(port, UART_IER, ier);
275
276	port->read_status_mask &= ~UART_LSR_DR;
277
278	spin_unlock_irqrestore(&port->lock, flags);
279}
280
281static void siu_enable_ms(struct uart_port *port)
282{
283	unsigned long flags;
284	uint8_t ier;
285
286	spin_lock_irqsave(&port->lock, flags);
287
288	ier = siu_read(port, UART_IER);
289	ier |= UART_IER_MSI;
290	siu_write(port, UART_IER, ier);
291
292	spin_unlock_irqrestore(&port->lock, flags);
293}
294
295static void siu_break_ctl(struct uart_port *port, int ctl)
296{
297	unsigned long flags;
298	uint8_t lcr;
299
300	spin_lock_irqsave(&port->lock, flags);
301
302	lcr = siu_read(port, UART_LCR);
303	if (ctl == -1)
304		lcr |= UART_LCR_SBC;
305	else
306		lcr &= ~UART_LCR_SBC;
307	siu_write(port, UART_LCR, lcr);
308
309	spin_unlock_irqrestore(&port->lock, flags);
310}
311
312static inline void receive_chars(struct uart_port *port, uint8_t *status)
313{
314	struct tty_struct *tty;
315	uint8_t lsr, ch;
316	char flag;
317	int max_count = RX_MAX_COUNT;
318
319	tty = port->info->tty;
320	lsr = *status;
321
322	do {
323		ch = siu_read(port, UART_RX);
324		port->icount.rx++;
325		flag = TTY_NORMAL;
326
327#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
328		lsr |= lsr_break_flag[port->line];
329		lsr_break_flag[port->line] = 0;
330#endif
331		if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
332		                    UART_LSR_PE | UART_LSR_OE))) {
333			if (lsr & UART_LSR_BI) {
334				lsr &= ~(UART_LSR_FE | UART_LSR_PE);
335				port->icount.brk++;
336
337				if (uart_handle_break(port))
338					goto ignore_char;
339			}
340
341			if (lsr & UART_LSR_FE)
342				port->icount.frame++;
343			if (lsr & UART_LSR_PE)
344				port->icount.parity++;
345			if (lsr & UART_LSR_OE)
346				port->icount.overrun++;
347
348			lsr &= port->read_status_mask;
349			if (lsr & UART_LSR_BI)
350				flag = TTY_BREAK;
351			if (lsr & UART_LSR_FE)
352				flag = TTY_FRAME;
353			if (lsr & UART_LSR_PE)
354				flag = TTY_PARITY;
355		}
356
357		if (uart_handle_sysrq_char(port, ch))
358			goto ignore_char;
359
360		uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
361
362	ignore_char:
363		lsr = siu_read(port, UART_LSR);
364	} while ((lsr & UART_LSR_DR) && (max_count-- > 0));
365
366	tty_flip_buffer_push(tty);
367
368	*status = lsr;
369}
370
371static inline void check_modem_status(struct uart_port *port)
372{
373	uint8_t msr;
374
375	msr = siu_read(port, UART_MSR);
376	if ((msr & UART_MSR_ANY_DELTA) == 0)
377		return;
378	if (msr & UART_MSR_DDCD)
379		uart_handle_dcd_change(port, msr & UART_MSR_DCD);
380	if (msr & UART_MSR_TERI)
381		port->icount.rng++;
382	if (msr & UART_MSR_DDSR)
383		port->icount.dsr++;
384	if (msr & UART_MSR_DCTS)
385		uart_handle_cts_change(port, msr & UART_MSR_CTS);
386
387	wake_up_interruptible(&port->info->delta_msr_wait);
388}
389
390static inline void transmit_chars(struct uart_port *port)
391{
392	struct circ_buf *xmit;
393	int max_count = TX_MAX_COUNT;
394
395	xmit = &port->info->xmit;
396
397	if (port->x_char) {
398		siu_write(port, UART_TX, port->x_char);
399		port->icount.tx++;
400		port->x_char = 0;
401		return;
402	}
403
404	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
405		siu_stop_tx(port);
406		return;
407	}
408
409	do {
410		siu_write(port, UART_TX, xmit->buf[xmit->tail]);
411		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
412		port->icount.tx++;
413		if (uart_circ_empty(xmit))
414			break;
415	} while (max_count-- > 0);
416
417	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
418		uart_write_wakeup(port);
419
420	if (uart_circ_empty(xmit))
421		siu_stop_tx(port);
422}
423
424static irqreturn_t siu_interrupt(int irq, void *dev_id)
425{
426	struct uart_port *port;
427	uint8_t iir, lsr;
428
429	port = (struct uart_port *)dev_id;
430
431	iir = siu_read(port, UART_IIR);
432	if (iir & UART_IIR_NO_INT)
433		return IRQ_NONE;
434
435	lsr = siu_read(port, UART_LSR);
436	if (lsr & UART_LSR_DR)
437		receive_chars(port, &lsr);
438
439	check_modem_status(port);
440
441	if (lsr & UART_LSR_THRE)
442		transmit_chars(port);
443
444	return IRQ_HANDLED;
445}
446
447static int siu_startup(struct uart_port *port)
448{
449	int retval;
450
451	if (port->membase == NULL)
452		return -ENODEV;
453
454	siu_clear_fifo(port);
455
456	(void)siu_read(port, UART_LSR);
457	(void)siu_read(port, UART_RX);
458	(void)siu_read(port, UART_IIR);
459	(void)siu_read(port, UART_MSR);
460
461	if (siu_read(port, UART_LSR) == 0xff)
462		return -ENODEV;
463
464	retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
465	if (retval)
466		return retval;
467
468	if (port->type == PORT_VR41XX_DSIU)
469		vr41xx_enable_dsiuint(DSIUINT_ALL);
470
471	siu_write(port, UART_LCR, UART_LCR_WLEN8);
472
473	spin_lock_irq(&port->lock);
474	siu_set_mctrl(port, port->mctrl);
475	spin_unlock_irq(&port->lock);
476
477	siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
478
479	(void)siu_read(port, UART_LSR);
480	(void)siu_read(port, UART_RX);
481	(void)siu_read(port, UART_IIR);
482	(void)siu_read(port, UART_MSR);
483
484	return 0;
485}
486
487static void siu_shutdown(struct uart_port *port)
488{
489	unsigned long flags;
490	uint8_t lcr;
491
492	siu_write(port, UART_IER, 0);
493
494	spin_lock_irqsave(&port->lock, flags);
495
496	port->mctrl &= ~TIOCM_OUT2;
497	siu_set_mctrl(port, port->mctrl);
498
499	spin_unlock_irqrestore(&port->lock, flags);
500
501	lcr = siu_read(port, UART_LCR);
502	lcr &= ~UART_LCR_SBC;
503	siu_write(port, UART_LCR, lcr);
504
505	siu_clear_fifo(port);
506
507	(void)siu_read(port, UART_RX);
508
509	if (port->type == PORT_VR41XX_DSIU)
510		vr41xx_disable_dsiuint(DSIUINT_ALL);
511
512	free_irq(port->irq, port);
513}
514
515static void siu_set_termios(struct uart_port *port, struct ktermios *new,
516                            struct ktermios *old)
517{
518	tcflag_t c_cflag, c_iflag;
519	uint8_t lcr, fcr, ier;
520	unsigned int baud, quot;
521	unsigned long flags;
522
523	c_cflag = new->c_cflag;
524	switch (c_cflag & CSIZE) {
525	case CS5:
526		lcr = UART_LCR_WLEN5;
527		break;
528	case CS6:
529		lcr = UART_LCR_WLEN6;
530		break;
531	case CS7:
532		lcr = UART_LCR_WLEN7;
533		break;
534	default:
535		lcr = UART_LCR_WLEN8;
536		break;
537	}
538
539	if (c_cflag & CSTOPB)
540		lcr |= UART_LCR_STOP;
541	if (c_cflag & PARENB)
542		lcr |= UART_LCR_PARITY;
543	if ((c_cflag & PARODD) != PARODD)
544		lcr |= UART_LCR_EPAR;
545	if (c_cflag & CMSPAR)
546		lcr |= UART_LCR_SPAR;
547
548	baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
549	quot = uart_get_divisor(port, baud);
550
551	fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
552
553	spin_lock_irqsave(&port->lock, flags);
554
555	uart_update_timeout(port, c_cflag, baud);
556
557	c_iflag = new->c_iflag;
558
559	port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
560	if (c_iflag & INPCK)
561		port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
562	if (c_iflag & (BRKINT | PARMRK))
563		port->read_status_mask |= UART_LSR_BI;
564
565	port->ignore_status_mask = 0;
566	if (c_iflag & IGNPAR)
567		port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
568	if (c_iflag & IGNBRK) {
569		port->ignore_status_mask |= UART_LSR_BI;
570		if (c_iflag & IGNPAR)
571			port->ignore_status_mask |= UART_LSR_OE;
572	}
573
574	if ((c_cflag & CREAD) == 0)
575		port->ignore_status_mask |= UART_LSR_DR;
576
577	ier = siu_read(port, UART_IER);
578	ier &= ~UART_IER_MSI;
579	if (UART_ENABLE_MS(port, c_cflag))
580		ier |= UART_IER_MSI;
581	siu_write(port, UART_IER, ier);
582
583	siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
584
585	siu_write(port, UART_DLL, (uint8_t)quot);
586	siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
587
588	siu_write(port, UART_LCR, lcr);
589
590	siu_write(port, UART_FCR, fcr);
591
592	siu_set_mctrl(port, port->mctrl);
593
594	spin_unlock_irqrestore(&port->lock, flags);
595}
596
597static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
598{
599	switch (state) {
600	case 0:
601		switch (port->type) {
602		case PORT_VR41XX_SIU:
603			vr41xx_supply_clock(SIU_CLOCK);
604			break;
605		case PORT_VR41XX_DSIU:
606			vr41xx_supply_clock(DSIU_CLOCK);
607			break;
608		}
609		break;
610	case 3:
611		switch (port->type) {
612		case PORT_VR41XX_SIU:
613			vr41xx_mask_clock(SIU_CLOCK);
614			break;
615		case PORT_VR41XX_DSIU:
616			vr41xx_mask_clock(DSIU_CLOCK);
617			break;
618		}
619		break;
620	}
621}
622
623static const char *siu_type(struct uart_port *port)
624{
625	return siu_type_name(port);
626}
627
628static void siu_release_port(struct uart_port *port)
629{
630	unsigned long size;
631
632	if (port->flags	& UPF_IOREMAP) {
633		iounmap(port->membase);
634		port->membase = NULL;
635	}
636
637	size = siu_port_size(port);
638	release_mem_region(port->mapbase, size);
639}
640
641static int siu_request_port(struct uart_port *port)
642{
643	unsigned long size;
644	struct resource *res;
645
646	size = siu_port_size(port);
647	res = request_mem_region(port->mapbase, size, siu_type_name(port));
648	if (res == NULL)
649		return -EBUSY;
650
651	if (port->flags & UPF_IOREMAP) {
652		port->membase = ioremap(port->mapbase, size);
653		if (port->membase == NULL) {
654			release_resource(res);
655			return -ENOMEM;
656		}
657	}
658
659	return 0;
660}
661
662static void siu_config_port(struct uart_port *port, int flags)
663{
664	if (flags & UART_CONFIG_TYPE) {
665		port->type = siu_check_type(port);
666		(void)siu_request_port(port);
667	}
668}
669
670static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
671{
672	if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
673		return -EINVAL;
674	if (port->irq != serial->irq)
675		return -EINVAL;
676	if (port->iotype != serial->io_type)
677		return -EINVAL;
678	if (port->mapbase != (unsigned long)serial->iomem_base)
679		return -EINVAL;
680
681	return 0;
682}
683
684static struct uart_ops siu_uart_ops = {
685	.tx_empty	= siu_tx_empty,
686	.set_mctrl	= siu_set_mctrl,
687	.get_mctrl	= siu_get_mctrl,
688	.stop_tx	= siu_stop_tx,
689	.start_tx	= siu_start_tx,
690	.stop_rx	= siu_stop_rx,
691	.enable_ms	= siu_enable_ms,
692	.break_ctl	= siu_break_ctl,
693	.startup	= siu_startup,
694	.shutdown	= siu_shutdown,
695	.set_termios	= siu_set_termios,
696	.pm		= siu_pm,
697	.type		= siu_type,
698	.release_port	= siu_release_port,
699	.request_port	= siu_request_port,
700	.config_port	= siu_config_port,
701	.verify_port	= siu_verify_port,
702};
703
704static int siu_init_ports(struct platform_device *pdev)
705{
706	struct uart_port *port;
707	struct resource *res;
708	int *type = pdev->dev.platform_data;
709	int i;
710
711	if (!type)
712		return 0;
713
714	port = siu_uart_ports;
715	for (i = 0; i < SIU_PORTS_MAX; i++) {
716		port->type = type[i];
717		if (port->type == PORT_UNKNOWN)
718			continue;
719		port->irq = platform_get_irq(pdev, i);
720		port->uartclk = SIU_BAUD_BASE * 16;
721		port->fifosize = 16;
722		port->regshift = 0;
723		port->iotype = UPIO_MEM;
724		port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
725		port->line = i;
726		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
727		port->mapbase = res->start;
728		port++;
729	}
730
731	return i;
732}
733
734#ifdef CONFIG_SERIAL_VR41XX_CONSOLE
735
736#define BOTH_EMPTY	(UART_LSR_TEMT | UART_LSR_THRE)
737
738static void wait_for_xmitr(struct uart_port *port)
739{
740	int timeout = 10000;
741	uint8_t lsr, msr;
742
743	do {
744		lsr = siu_read(port, UART_LSR);
745		if (lsr & UART_LSR_BI)
746			lsr_break_flag[port->line] = UART_LSR_BI;
747
748		if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
749			break;
750	} while (timeout-- > 0);
751
752	if (port->flags & UPF_CONS_FLOW) {
753		timeout = 1000000;
754
755		do {
756			msr = siu_read(port, UART_MSR);
757			if ((msr & UART_MSR_CTS) != 0)
758				break;
759		} while (timeout-- > 0);
760	}
761}
762
763static void siu_console_putchar(struct uart_port *port, int ch)
764{
765	wait_for_xmitr(port);
766	siu_write(port, UART_TX, ch);
767}
768
769static void siu_console_write(struct console *con, const char *s, unsigned count)
770{
771	struct uart_port *port;
772	uint8_t ier;
773
774	port = &siu_uart_ports[con->index];
775
776	ier = siu_read(port, UART_IER);
777	siu_write(port, UART_IER, 0);
778
779	uart_console_write(port, s, count, siu_console_putchar);
780
781	wait_for_xmitr(port);
782	siu_write(port, UART_IER, ier);
783}
784
785static int siu_console_setup(struct console *con, char *options)
786{
787	struct uart_port *port;
788	int baud = 9600;
789	int parity = 'n';
790	int bits = 8;
791	int flow = 'n';
792
793	if (con->index >= SIU_PORTS_MAX)
794		con->index = 0;
795
796	port = &siu_uart_ports[con->index];
797	if (port->membase == NULL) {
798		if (port->mapbase == 0)
799			return -ENODEV;
800		port->membase = ioremap(port->mapbase, siu_port_size(port));
801	}
802
803	vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
804
805	if (options != NULL)
806		uart_parse_options(options, &baud, &parity, &bits, &flow);
807
808	return uart_set_options(port, con, baud, parity, bits, flow);
809}
810
811static struct uart_driver siu_uart_driver;
812
813static struct console siu_console = {
814	.name	= "ttyVR",
815	.write	= siu_console_write,
816	.device	= uart_console_device,
817	.setup	= siu_console_setup,
818	.flags	= CON_PRINTBUFFER,
819	.index	= -1,
820	.data	= &siu_uart_driver,
821};
822
823static int __devinit siu_console_init(void)
824{
825	struct uart_port *port;
826	int i;
827
828	for (i = 0; i < SIU_PORTS_MAX; i++) {
829		port = &siu_uart_ports[i];
830		port->ops = &siu_uart_ops;
831	}
832
833	register_console(&siu_console);
834
835	return 0;
836}
837
838console_initcall(siu_console_init);
839
840#define SERIAL_VR41XX_CONSOLE	&siu_console
841#else
842#define SERIAL_VR41XX_CONSOLE	NULL
843#endif
844
845static struct uart_driver siu_uart_driver = {
846	.owner		= THIS_MODULE,
847	.driver_name	= "SIU",
848	.dev_name	= "ttyVR",
849	.major		= SIU_MAJOR,
850	.minor		= SIU_MINOR_BASE,
851	.cons		= SERIAL_VR41XX_CONSOLE,
852};
853
854static int __devinit siu_probe(struct platform_device *dev)
855{
856	struct uart_port *port;
857	int num, i, retval;
858
859	num = siu_init_ports(dev);
860	if (num <= 0)
861		return -ENODEV;
862
863	siu_uart_driver.nr = num;
864	retval = uart_register_driver(&siu_uart_driver);
865	if (retval)
866		return retval;
867
868	for (i = 0; i < num; i++) {
869		port = &siu_uart_ports[i];
870		port->ops = &siu_uart_ops;
871		port->dev = &dev->dev;
872
873		retval = uart_add_one_port(&siu_uart_driver, port);
874		if (retval < 0) {
875			port->dev = NULL;
876			break;
877		}
878	}
879
880	if (i == 0 && retval < 0) {
881		uart_unregister_driver(&siu_uart_driver);
882		return retval;
883	}
884
885	return 0;
886}
887
888static int __devexit siu_remove(struct platform_device *dev)
889{
890	struct uart_port *port;
891	int i;
892
893	for (i = 0; i < siu_uart_driver.nr; i++) {
894		port = &siu_uart_ports[i];
895		if (port->dev == &dev->dev) {
896			uart_remove_one_port(&siu_uart_driver, port);
897			port->dev = NULL;
898		}
899	}
900
901	uart_unregister_driver(&siu_uart_driver);
902
903	return 0;
904}
905
906static int siu_suspend(struct platform_device *dev, pm_message_t state)
907{
908	struct uart_port *port;
909	int i;
910
911	for (i = 0; i < siu_uart_driver.nr; i++) {
912		port = &siu_uart_ports[i];
913		if ((port->type == PORT_VR41XX_SIU ||
914		     port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
915			uart_suspend_port(&siu_uart_driver, port);
916
917	}
918
919	return 0;
920}
921
922static int siu_resume(struct platform_device *dev)
923{
924	struct uart_port *port;
925	int i;
926
927	for (i = 0; i < siu_uart_driver.nr; i++) {
928		port = &siu_uart_ports[i];
929		if ((port->type == PORT_VR41XX_SIU ||
930		     port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
931			uart_resume_port(&siu_uart_driver, port);
932	}
933
934	return 0;
935}
936
937static struct platform_driver siu_device_driver = {
938	.probe		= siu_probe,
939	.remove		= __devexit_p(siu_remove),
940	.suspend	= siu_suspend,
941	.resume		= siu_resume,
942	.driver		= {
943		.name	= "SIU",
944		.owner	= THIS_MODULE,
945	},
946};
947
948static int __init vr41xx_siu_init(void)
949{
950	return platform_driver_register(&siu_device_driver);
951}
952
953static void __exit vr41xx_siu_exit(void)
954{
955	platform_driver_unregister(&siu_device_driver);
956}
957
958module_init(vr41xx_siu_init);
959module_exit(vr41xx_siu_exit);
960