1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2005 Silicon Graphics, Inc. All Rights Reserved. 7 */ 8 9/* 10 * This file contains a module version of the ioc3 serial driver. This 11 * includes all the support functions needed (support functions, etc.) 12 * and the serial driver itself. 13 */ 14#include <linux/errno.h> 15#include <linux/tty.h> 16#include <linux/serial.h> 17#include <linux/circ_buf.h> 18#include <linux/serial_reg.h> 19#include <linux/module.h> 20#include <linux/pci.h> 21#include <linux/serial_core.h> 22#include <linux/ioc3.h> 23 24/* 25 * Interesting things about the ioc3 26 */ 27 28#define LOGICAL_PORTS 2 /* rs232(0) and rs422(1) */ 29#define PORTS_PER_CARD 2 30#define LOGICAL_PORTS_PER_CARD (PORTS_PER_CARD * LOGICAL_PORTS) 31#define MAX_CARDS 8 32#define MAX_LOGICAL_PORTS (LOGICAL_PORTS_PER_CARD * MAX_CARDS) 33 34/* determine given the sio_ir what port it applies to */ 35#define GET_PORT_FROM_SIO_IR(_x) (_x & SIO_IR_SA) ? 0 : 1 36 37 38/* 39 * we have 2 logical ports (rs232, rs422) for each physical port 40 * evens are rs232, odds are rs422 41 */ 42#define GET_PHYSICAL_PORT(_x) ((_x) >> 1) 43#define GET_LOGICAL_PORT(_x) ((_x) & 1) 44#define IS_PHYSICAL_PORT(_x) !((_x) & 1) 45#define IS_RS232(_x) !((_x) & 1) 46 47static unsigned int Num_of_ioc3_cards; 48static unsigned int Submodule_slot; 49 50/* defining this will get you LOTS of great debug info */ 51//#define DEBUG_INTERRUPTS 52#define DPRINT_CONFIG(_x...) ; 53//#define DPRINT_CONFIG(_x...) printk _x 54#define NOT_PROGRESS() ; 55//#define NOT_PROGRESS() printk("%s : fails %d\n", __FUNCTION__, __LINE__) 56 57/* number of characters we want to transmit to the lower level at a time */ 58#define MAX_CHARS 256 59#define FIFO_SIZE (MAX_CHARS-1) /* it's a uchar */ 60 61/* Device name we're using */ 62#define DEVICE_NAME "ttySIOC" 63#define DEVICE_MAJOR 204 64#define DEVICE_MINOR 116 65 66/* flags for next_char_state */ 67#define NCS_BREAK 0x1 68#define NCS_PARITY 0x2 69#define NCS_FRAMING 0x4 70#define NCS_OVERRUN 0x8 71 72/* cause we need SOME parameters ... */ 73#define MIN_BAUD_SUPPORTED 1200 74#define MAX_BAUD_SUPPORTED 115200 75 76/* protocol types supported */ 77#define PROTO_RS232 0 78#define PROTO_RS422 1 79 80/* Notification types */ 81#define N_DATA_READY 0x01 82#define N_OUTPUT_LOWAT 0x02 83#define N_BREAK 0x04 84#define N_PARITY_ERROR 0x08 85#define N_FRAMING_ERROR 0x10 86#define N_OVERRUN_ERROR 0x20 87#define N_DDCD 0x40 88#define N_DCTS 0x80 89 90#define N_ALL_INPUT (N_DATA_READY | N_BREAK \ 91 | N_PARITY_ERROR | N_FRAMING_ERROR \ 92 | N_OVERRUN_ERROR | N_DDCD | N_DCTS) 93 94#define N_ALL_OUTPUT N_OUTPUT_LOWAT 95 96#define N_ALL_ERRORS (N_PARITY_ERROR | N_FRAMING_ERROR \ 97 | N_OVERRUN_ERROR) 98 99#define N_ALL (N_DATA_READY | N_OUTPUT_LOWAT | N_BREAK \ 100 | N_PARITY_ERROR | N_FRAMING_ERROR \ 101 | N_OVERRUN_ERROR | N_DDCD | N_DCTS) 102 103#define SER_CLK_SPEED(prediv) ((22000000 << 1) / prediv) 104#define SER_DIVISOR(x, clk) (((clk) + (x) * 8) / ((x) * 16)) 105#define DIVISOR_TO_BAUD(div, clk) ((clk) / 16 / (div)) 106 107/* Some masks */ 108#define LCR_MASK_BITS_CHAR (UART_LCR_WLEN5 | UART_LCR_WLEN6 \ 109 | UART_LCR_WLEN7 | UART_LCR_WLEN8) 110#define LCR_MASK_STOP_BITS (UART_LCR_STOP) 111 112#define PENDING(_a, _p) (readl(&(_p)->vma->sio_ir) & (_a)->ic_enable) 113 114#define RING_BUF_SIZE 4096 115#define BUF_SIZE_BIT SBBR_L_SIZE 116#define PROD_CONS_MASK PROD_CONS_PTR_4K 117 118#define TOTAL_RING_BUF_SIZE (RING_BUF_SIZE * 4) 119 120/* driver specific - one per card */ 121struct ioc3_card { 122 struct { 123 /* uart ports are allocated here */ 124 struct uart_port icp_uart_port[LOGICAL_PORTS]; 125 /* the ioc3_port used for this port */ 126 struct ioc3_port *icp_port; 127 } ic_port[PORTS_PER_CARD]; 128 /* currently enabled interrupts */ 129 uint32_t ic_enable; 130}; 131 132/* Local port info for each IOC3 serial port */ 133struct ioc3_port { 134 /* handy reference material */ 135 struct uart_port *ip_port; 136 struct ioc3_card *ip_card; 137 struct ioc3_driver_data *ip_idd; 138 struct ioc3_submodule *ip_is; 139 140 /* pci mem addresses for this port */ 141 struct ioc3_serialregs __iomem *ip_serial_regs; 142 struct ioc3_uartregs __iomem *ip_uart_regs; 143 144 /* Ring buffer page for this port */ 145 dma_addr_t ip_dma_ringbuf; 146 /* vaddr of ring buffer */ 147 struct ring_buffer *ip_cpu_ringbuf; 148 149 /* Rings for this port */ 150 struct ring *ip_inring; 151 struct ring *ip_outring; 152 153 /* Hook to port specific values */ 154 struct port_hooks *ip_hooks; 155 156 spinlock_t ip_lock; 157 158 /* Various rx/tx parameters */ 159 int ip_baud; 160 int ip_tx_lowat; 161 int ip_rx_timeout; 162 163 /* Copy of notification bits */ 164 int ip_notify; 165 166 /* Shadow copies of various registers so we don't need to PIO 167 * read them constantly 168 */ 169 uint32_t ip_sscr; 170 uint32_t ip_tx_prod; 171 uint32_t ip_rx_cons; 172 unsigned char ip_flags; 173}; 174 175/* tx low water mark. We need to notify the driver whenever tx is getting 176 * close to empty so it can refill the tx buffer and keep things going. 177 * Let's assume that if we interrupt 1 ms before the tx goes idle, we'll 178 * have no trouble getting in more chars in time (I certainly hope so). 179 */ 180#define TX_LOWAT_LATENCY 1000 181#define TX_LOWAT_HZ (1000000 / TX_LOWAT_LATENCY) 182#define TX_LOWAT_CHARS(baud) (baud / 10 / TX_LOWAT_HZ) 183 184/* Flags per port */ 185#define INPUT_HIGH 0x01 186 /* used to signify that we have turned off the rx_high 187 * temporarily - we need to drain the fifo and don't 188 * want to get blasted with interrupts. 189 */ 190#define DCD_ON 0x02 191 /* DCD state is on */ 192#define LOWAT_WRITTEN 0x04 193#define READ_ABORTED 0x08 194 /* the read was aborted - used to avaoid infinate looping 195 * in the interrupt handler 196 */ 197#define INPUT_ENABLE 0x10 198 199/* Since each port has different register offsets and bitmasks 200 * for everything, we'll store those that we need in tables so we 201 * don't have to be constantly checking the port we are dealing with. 202 */ 203struct port_hooks { 204 uint32_t intr_delta_dcd; 205 uint32_t intr_delta_cts; 206 uint32_t intr_tx_mt; 207 uint32_t intr_rx_timer; 208 uint32_t intr_rx_high; 209 uint32_t intr_tx_explicit; 210 uint32_t intr_clear; 211 uint32_t intr_all; 212 char rs422_select_pin; 213}; 214 215static struct port_hooks hooks_array[PORTS_PER_CARD] = { 216 /* values for port A */ 217 { 218 .intr_delta_dcd = SIO_IR_SA_DELTA_DCD, 219 .intr_delta_cts = SIO_IR_SA_DELTA_CTS, 220 .intr_tx_mt = SIO_IR_SA_TX_MT, 221 .intr_rx_timer = SIO_IR_SA_RX_TIMER, 222 .intr_rx_high = SIO_IR_SA_RX_HIGH, 223 .intr_tx_explicit = SIO_IR_SA_TX_EXPLICIT, 224 .intr_clear = (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL 225 | SIO_IR_SA_RX_HIGH 226 | SIO_IR_SA_RX_TIMER 227 | SIO_IR_SA_DELTA_DCD 228 | SIO_IR_SA_DELTA_CTS 229 | SIO_IR_SA_INT 230 | SIO_IR_SA_TX_EXPLICIT 231 | SIO_IR_SA_MEMERR), 232 .intr_all = SIO_IR_SA, 233 .rs422_select_pin = GPPR_UARTA_MODESEL_PIN, 234 }, 235 236 /* values for port B */ 237 { 238 .intr_delta_dcd = SIO_IR_SB_DELTA_DCD, 239 .intr_delta_cts = SIO_IR_SB_DELTA_CTS, 240 .intr_tx_mt = SIO_IR_SB_TX_MT, 241 .intr_rx_timer = SIO_IR_SB_RX_TIMER, 242 .intr_rx_high = SIO_IR_SB_RX_HIGH, 243 .intr_tx_explicit = SIO_IR_SB_TX_EXPLICIT, 244 .intr_clear = (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL 245 | SIO_IR_SB_RX_HIGH 246 | SIO_IR_SB_RX_TIMER 247 | SIO_IR_SB_DELTA_DCD 248 | SIO_IR_SB_DELTA_CTS 249 | SIO_IR_SB_INT 250 | SIO_IR_SB_TX_EXPLICIT 251 | SIO_IR_SB_MEMERR), 252 .intr_all = SIO_IR_SB, 253 .rs422_select_pin = GPPR_UARTB_MODESEL_PIN, 254 } 255}; 256 257struct ring_entry { 258 union { 259 struct { 260 uint32_t alldata; 261 uint32_t allsc; 262 } all; 263 struct { 264 char data[4]; /* data bytes */ 265 char sc[4]; /* status/control */ 266 } s; 267 } u; 268}; 269 270/* Test the valid bits in any of the 4 sc chars using "allsc" member */ 271#define RING_ANY_VALID \ 272 ((uint32_t)(RXSB_MODEM_VALID | RXSB_DATA_VALID) * 0x01010101) 273 274#define ring_sc u.s.sc 275#define ring_data u.s.data 276#define ring_allsc u.all.allsc 277 278/* Number of entries per ring buffer. */ 279#define ENTRIES_PER_RING (RING_BUF_SIZE / (int) sizeof(struct ring_entry)) 280 281/* An individual ring */ 282struct ring { 283 struct ring_entry entries[ENTRIES_PER_RING]; 284}; 285 286/* The whole enchilada */ 287struct ring_buffer { 288 struct ring TX_A; 289 struct ring RX_A; 290 struct ring TX_B; 291 struct ring RX_B; 292}; 293 294/* Get a ring from a port struct */ 295#define RING(_p, _wh) &(((struct ring_buffer *)((_p)->ip_cpu_ringbuf))->_wh) 296 297/* for Infinite loop detection */ 298#define MAXITER 10000000 299 300 301/** 302 * set_baud - Baud rate setting code 303 * @port: port to set 304 * @baud: baud rate to use 305 */ 306static int set_baud(struct ioc3_port *port, int baud) 307{ 308 int divisor; 309 int actual_baud; 310 int diff; 311 int lcr, prediv; 312 struct ioc3_uartregs __iomem *uart; 313 314 for (prediv = 6; prediv < 64; prediv++) { 315 divisor = SER_DIVISOR(baud, SER_CLK_SPEED(prediv)); 316 if (!divisor) 317 continue; /* invalid divisor */ 318 actual_baud = DIVISOR_TO_BAUD(divisor, SER_CLK_SPEED(prediv)); 319 320 diff = actual_baud - baud; 321 if (diff < 0) 322 diff = -diff; 323 324 /* if we're within 1% we've found a match */ 325 if (diff * 100 <= actual_baud) 326 break; 327 } 328 329 /* if the above loop completed, we didn't match 330 * the baud rate. give up. 331 */ 332 if (prediv == 64) { 333 NOT_PROGRESS(); 334 return 1; 335 } 336 337 uart = port->ip_uart_regs; 338 lcr = readb(&uart->iu_lcr); 339 340 writeb(lcr | UART_LCR_DLAB, &uart->iu_lcr); 341 writeb((unsigned char)divisor, &uart->iu_dll); 342 writeb((unsigned char)(divisor >> 8), &uart->iu_dlm); 343 writeb((unsigned char)prediv, &uart->iu_scr); 344 writeb((unsigned char)lcr, &uart->iu_lcr); 345 346 return 0; 347} 348 349/** 350 * get_ioc3_port - given a uart port, return the control structure 351 * @the_port: uart port to find 352 */ 353static struct ioc3_port *get_ioc3_port(struct uart_port *the_port) 354{ 355 struct ioc3_driver_data *idd = dev_get_drvdata(the_port->dev); 356 struct ioc3_card *card_ptr = idd->data[Submodule_slot]; 357 int ii, jj; 358 359 if (!card_ptr) { 360 NOT_PROGRESS(); 361 return NULL; 362 } 363 for (ii = 0; ii < PORTS_PER_CARD; ii++) { 364 for (jj = 0; jj < LOGICAL_PORTS; jj++) { 365 if (the_port == &card_ptr->ic_port[ii].icp_uart_port[jj]) 366 return card_ptr->ic_port[ii].icp_port; 367 } 368 } 369 NOT_PROGRESS(); 370 return NULL; 371} 372 373/** 374 * port_init - Initialize the sio and ioc3 hardware for a given port 375 * called per port from attach... 376 * @port: port to initialize 377 */ 378static int inline port_init(struct ioc3_port *port) 379{ 380 uint32_t sio_cr; 381 struct port_hooks *hooks = port->ip_hooks; 382 struct ioc3_uartregs __iomem *uart; 383 int reset_loop_counter = 0xfffff; 384 struct ioc3_driver_data *idd = port->ip_idd; 385 386 /* Idle the IOC3 serial interface */ 387 writel(SSCR_RESET, &port->ip_serial_regs->sscr); 388 389 /* Wait until any pending bus activity for this port has ceased */ 390 do { 391 sio_cr = readl(&idd->vma->sio_cr); 392 if (reset_loop_counter-- <= 0) { 393 printk(KERN_WARNING 394 "IOC3 unable to come out of reset" 395 " scr 0x%x\n", sio_cr); 396 return -1; 397 } 398 } while (!(sio_cr & SIO_CR_ARB_DIAG_IDLE) && 399 (((sio_cr &= SIO_CR_ARB_DIAG) == SIO_CR_ARB_DIAG_TXA) 400 || sio_cr == SIO_CR_ARB_DIAG_TXB 401 || sio_cr == SIO_CR_ARB_DIAG_RXA 402 || sio_cr == SIO_CR_ARB_DIAG_RXB)); 403 404 /* Finish reset sequence */ 405 writel(0, &port->ip_serial_regs->sscr); 406 407 /* Once RESET is done, reload cached tx_prod and rx_cons values 408 * and set rings to empty by making prod == cons 409 */ 410 port->ip_tx_prod = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK; 411 writel(port->ip_tx_prod, &port->ip_serial_regs->stpir); 412 port->ip_rx_cons = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK; 413 writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir); 414 415 /* Disable interrupts for this 16550 */ 416 uart = port->ip_uart_regs; 417 writeb(0, &uart->iu_lcr); 418 writeb(0, &uart->iu_ier); 419 420 /* Set the default baud */ 421 set_baud(port, port->ip_baud); 422 423 /* Set line control to 8 bits no parity */ 424 writeb(UART_LCR_WLEN8 | 0, &uart->iu_lcr); 425 /* UART_LCR_STOP == 1 stop */ 426 427 /* Enable the FIFOs */ 428 writeb(UART_FCR_ENABLE_FIFO, &uart->iu_fcr); 429 /* then reset 16550 FIFOs */ 430 writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, 431 &uart->iu_fcr); 432 433 /* Clear modem control register */ 434 writeb(0, &uart->iu_mcr); 435 436 /* Clear deltas in modem status register */ 437 writel(0, &port->ip_serial_regs->shadow); 438 439 /* Only do this once per port pair */ 440 if (port->ip_hooks == &hooks_array[0]) { 441 unsigned long ring_pci_addr; 442 uint32_t __iomem *sbbr_l, *sbbr_h; 443 444 sbbr_l = &idd->vma->sbbr_l; 445 sbbr_h = &idd->vma->sbbr_h; 446 ring_pci_addr = (unsigned long __iomem)port->ip_dma_ringbuf; 447 DPRINT_CONFIG(("%s: ring_pci_addr 0x%p\n", 448 __FUNCTION__, (void *)ring_pci_addr)); 449 450 writel((unsigned int)((uint64_t) ring_pci_addr >> 32), sbbr_h); 451 writel((unsigned int)ring_pci_addr | BUF_SIZE_BIT, sbbr_l); 452 } 453 454 /* Set the receive timeout value to 10 msec */ 455 writel(SRTR_HZ / 100, &port->ip_serial_regs->srtr); 456 457 /* Set rx threshold, enable DMA */ 458 /* Set high water mark at 3/4 of full ring */ 459 port->ip_sscr = (ENTRIES_PER_RING * 3 / 4); 460 461 port->ip_sscr |= SSCR_HIGH_SPD; 462 463 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 464 465 /* Disable and clear all serial related interrupt bits */ 466 port->ip_card->ic_enable &= ~hooks->intr_clear; 467 ioc3_disable(port->ip_is, idd, hooks->intr_clear); 468 ioc3_ack(port->ip_is, idd, hooks->intr_clear); 469 return 0; 470} 471 472/** 473 * enable_intrs - enable interrupts 474 * @port: port to enable 475 * @mask: mask to use 476 */ 477static void enable_intrs(struct ioc3_port *port, uint32_t mask) 478{ 479 if ((port->ip_card->ic_enable & mask) != mask) { 480 port->ip_card->ic_enable |= mask; 481 ioc3_enable(port->ip_is, port->ip_idd, mask); 482 } 483} 484 485/** 486 * local_open - local open a port 487 * @port: port to open 488 */ 489static inline int local_open(struct ioc3_port *port) 490{ 491 int spiniter = 0; 492 493 port->ip_flags = INPUT_ENABLE; 494 495 /* Pause the DMA interface if necessary */ 496 if (port->ip_sscr & SSCR_DMA_EN) { 497 writel(port->ip_sscr | SSCR_DMA_PAUSE, 498 &port->ip_serial_regs->sscr); 499 while ((readl(&port->ip_serial_regs->sscr) 500 & SSCR_PAUSE_STATE) == 0) { 501 spiniter++; 502 if (spiniter > MAXITER) { 503 NOT_PROGRESS(); 504 return -1; 505 } 506 } 507 } 508 509 /* Reset the input fifo. If the uart received chars while the port 510 * was closed and DMA is not enabled, the uart may have a bunch of 511 * chars hanging around in its rx fifo which will not be discarded 512 * by rclr in the upper layer. We must get rid of them here. 513 */ 514 writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR, 515 &port->ip_uart_regs->iu_fcr); 516 517 writeb(UART_LCR_WLEN8, &port->ip_uart_regs->iu_lcr); 518 /* UART_LCR_STOP == 1 stop */ 519 520 /* Re-enable DMA, set default threshold to intr whenever there is 521 * data available. 522 */ 523 port->ip_sscr &= ~SSCR_RX_THRESHOLD; 524 port->ip_sscr |= 1; /* default threshold */ 525 526 /* Plug in the new sscr. This implicitly clears the DMA_PAUSE 527 * flag if it was set above 528 */ 529 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 530 port->ip_tx_lowat = 1; 531 return 0; 532} 533 534/** 535 * set_rx_timeout - Set rx timeout and threshold values. 536 * @port: port to use 537 * @timeout: timeout value in ticks 538 */ 539static inline int set_rx_timeout(struct ioc3_port *port, int timeout) 540{ 541 int threshold; 542 543 port->ip_rx_timeout = timeout; 544 545 /* Timeout is in ticks. Let's figure out how many chars we 546 * can receive at the current baud rate in that interval 547 * and set the rx threshold to that amount. There are 4 chars 548 * per ring entry, so we'll divide the number of chars that will 549 * arrive in timeout by 4. 550 * So .... timeout * baud / 10 / HZ / 4, with HZ = 100. 551 */ 552 threshold = timeout * port->ip_baud / 4000; 553 if (threshold == 0) 554 threshold = 1; /* otherwise we'll intr all the time! */ 555 556 if ((unsigned)threshold > (unsigned)SSCR_RX_THRESHOLD) 557 return 1; 558 559 port->ip_sscr &= ~SSCR_RX_THRESHOLD; 560 port->ip_sscr |= threshold; 561 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 562 563 /* Now set the rx timeout to the given value 564 * again timeout * SRTR_HZ / HZ 565 */ 566 timeout = timeout * SRTR_HZ / 100; 567 if (timeout > SRTR_CNT) 568 timeout = SRTR_CNT; 569 writel(timeout, &port->ip_serial_regs->srtr); 570 return 0; 571} 572 573/** 574 * config_port - config the hardware 575 * @port: port to config 576 * @baud: baud rate for the port 577 * @byte_size: data size 578 * @stop_bits: number of stop bits 579 * @parenb: parity enable ? 580 * @parodd: odd parity ? 581 */ 582static inline int 583config_port(struct ioc3_port *port, 584 int baud, int byte_size, int stop_bits, int parenb, int parodd) 585{ 586 char lcr, sizebits; 587 int spiniter = 0; 588 589 DPRINT_CONFIG(("%s: line %d baud %d byte_size %d stop %d parenb %d " 590 "parodd %d\n", 591 __FUNCTION__, ((struct uart_port *)port->ip_port)->line, 592 baud, byte_size, stop_bits, parenb, parodd)); 593 594 if (set_baud(port, baud)) 595 return 1; 596 597 switch (byte_size) { 598 case 5: 599 sizebits = UART_LCR_WLEN5; 600 break; 601 case 6: 602 sizebits = UART_LCR_WLEN6; 603 break; 604 case 7: 605 sizebits = UART_LCR_WLEN7; 606 break; 607 case 8: 608 sizebits = UART_LCR_WLEN8; 609 break; 610 default: 611 return 1; 612 } 613 614 /* Pause the DMA interface if necessary */ 615 if (port->ip_sscr & SSCR_DMA_EN) { 616 writel(port->ip_sscr | SSCR_DMA_PAUSE, 617 &port->ip_serial_regs->sscr); 618 while ((readl(&port->ip_serial_regs->sscr) 619 & SSCR_PAUSE_STATE) == 0) { 620 spiniter++; 621 if (spiniter > MAXITER) 622 return -1; 623 } 624 } 625 626 /* Clear relevant fields in lcr */ 627 lcr = readb(&port->ip_uart_regs->iu_lcr); 628 lcr &= ~(LCR_MASK_BITS_CHAR | UART_LCR_EPAR | 629 UART_LCR_PARITY | LCR_MASK_STOP_BITS); 630 631 /* Set byte size in lcr */ 632 lcr |= sizebits; 633 634 /* Set parity */ 635 if (parenb) { 636 lcr |= UART_LCR_PARITY; 637 if (!parodd) 638 lcr |= UART_LCR_EPAR; 639 } 640 641 /* Set stop bits */ 642 if (stop_bits) 643 lcr |= UART_LCR_STOP /* 2 stop bits */ ; 644 645 writeb(lcr, &port->ip_uart_regs->iu_lcr); 646 647 /* Re-enable the DMA interface if necessary */ 648 if (port->ip_sscr & SSCR_DMA_EN) { 649 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 650 } 651 port->ip_baud = baud; 652 653 /* When we get within this number of ring entries of filling the 654 * entire ring on tx, place an EXPLICIT intr to generate a lowat 655 * notification when output has drained. 656 */ 657 port->ip_tx_lowat = (TX_LOWAT_CHARS(baud) + 3) / 4; 658 if (port->ip_tx_lowat == 0) 659 port->ip_tx_lowat = 1; 660 661 set_rx_timeout(port, 2); 662 return 0; 663} 664 665/** 666 * do_write - Write bytes to the port. Returns the number of bytes 667 * actually written. Called from transmit_chars 668 * @port: port to use 669 * @buf: the stuff to write 670 * @len: how many bytes in 'buf' 671 */ 672static inline int do_write(struct ioc3_port *port, char *buf, int len) 673{ 674 int prod_ptr, cons_ptr, total = 0; 675 struct ring *outring; 676 struct ring_entry *entry; 677 struct port_hooks *hooks = port->ip_hooks; 678 679 BUG_ON(!(len >= 0)); 680 681 prod_ptr = port->ip_tx_prod; 682 cons_ptr = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK; 683 outring = port->ip_outring; 684 685 /* Maintain a 1-entry red-zone. The ring buffer is full when 686 * (cons - prod) % ring_size is 1. Rather than do this subtraction 687 * in the body of the loop, I'll do it now. 688 */ 689 cons_ptr = (cons_ptr - (int)sizeof(struct ring_entry)) & PROD_CONS_MASK; 690 691 /* Stuff the bytes into the output */ 692 while ((prod_ptr != cons_ptr) && (len > 0)) { 693 int xx; 694 695 /* Get 4 bytes (one ring entry) at a time */ 696 entry = (struct ring_entry *)((caddr_t) outring + prod_ptr); 697 698 /* Invalidate all entries */ 699 entry->ring_allsc = 0; 700 701 /* Copy in some bytes */ 702 for (xx = 0; (xx < 4) && (len > 0); xx++) { 703 entry->ring_data[xx] = *buf++; 704 entry->ring_sc[xx] = TXCB_VALID; 705 len--; 706 total++; 707 } 708 709 /* If we are within some small threshold of filling up the 710 * entire ring buffer, we must place an EXPLICIT intr here 711 * to generate a lowat interrupt in case we subsequently 712 * really do fill up the ring and the caller goes to sleep. 713 * No need to place more than one though. 714 */ 715 if (!(port->ip_flags & LOWAT_WRITTEN) && 716 ((cons_ptr - prod_ptr) & PROD_CONS_MASK) 717 <= port->ip_tx_lowat * (int)sizeof(struct ring_entry)) { 718 port->ip_flags |= LOWAT_WRITTEN; 719 entry->ring_sc[0] |= TXCB_INT_WHEN_DONE; 720 } 721 722 /* Go on to next entry */ 723 prod_ptr += sizeof(struct ring_entry); 724 prod_ptr &= PROD_CONS_MASK; 725 } 726 727 /* If we sent something, start DMA if necessary */ 728 if (total > 0 && !(port->ip_sscr & SSCR_DMA_EN)) { 729 port->ip_sscr |= SSCR_DMA_EN; 730 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 731 } 732 733 /* Store the new producer pointer. If tx is disabled, we stuff the 734 * data into the ring buffer, but we don't actually start tx. 735 */ 736 if (!uart_tx_stopped(port->ip_port)) { 737 writel(prod_ptr, &port->ip_serial_regs->stpir); 738 739 /* If we are now transmitting, enable tx_mt interrupt so we 740 * can disable DMA if necessary when the tx finishes. 741 */ 742 if (total > 0) 743 enable_intrs(port, hooks->intr_tx_mt); 744 } 745 port->ip_tx_prod = prod_ptr; 746 747 return total; 748} 749 750/** 751 * disable_intrs - disable interrupts 752 * @port: port to enable 753 * @mask: mask to use 754 */ 755static inline void disable_intrs(struct ioc3_port *port, uint32_t mask) 756{ 757 if (port->ip_card->ic_enable & mask) { 758 ioc3_disable(port->ip_is, port->ip_idd, mask); 759 port->ip_card->ic_enable &= ~mask; 760 } 761} 762 763/** 764 * set_notification - Modify event notification 765 * @port: port to use 766 * @mask: events mask 767 * @set_on: set ? 768 */ 769static int set_notification(struct ioc3_port *port, int mask, int set_on) 770{ 771 struct port_hooks *hooks = port->ip_hooks; 772 uint32_t intrbits, sscrbits; 773 774 BUG_ON(!mask); 775 776 intrbits = sscrbits = 0; 777 778 if (mask & N_DATA_READY) 779 intrbits |= (hooks->intr_rx_timer | hooks->intr_rx_high); 780 if (mask & N_OUTPUT_LOWAT) 781 intrbits |= hooks->intr_tx_explicit; 782 if (mask & N_DDCD) { 783 intrbits |= hooks->intr_delta_dcd; 784 sscrbits |= SSCR_RX_RING_DCD; 785 } 786 if (mask & N_DCTS) 787 intrbits |= hooks->intr_delta_cts; 788 789 if (set_on) { 790 enable_intrs(port, intrbits); 791 port->ip_notify |= mask; 792 port->ip_sscr |= sscrbits; 793 } else { 794 disable_intrs(port, intrbits); 795 port->ip_notify &= ~mask; 796 port->ip_sscr &= ~sscrbits; 797 } 798 799 /* We require DMA if either DATA_READY or DDCD notification is 800 * currently requested. If neither of these is requested and 801 * there is currently no tx in progress, DMA may be disabled. 802 */ 803 if (port->ip_notify & (N_DATA_READY | N_DDCD)) 804 port->ip_sscr |= SSCR_DMA_EN; 805 else if (!(port->ip_card->ic_enable & hooks->intr_tx_mt)) 806 port->ip_sscr &= ~SSCR_DMA_EN; 807 808 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 809 return 0; 810} 811 812/** 813 * set_mcr - set the master control reg 814 * @the_port: port to use 815 * @mask1: mcr mask 816 * @mask2: shadow mask 817 */ 818static inline int set_mcr(struct uart_port *the_port, 819 int mask1, int mask2) 820{ 821 struct ioc3_port *port = get_ioc3_port(the_port); 822 uint32_t shadow; 823 int spiniter = 0; 824 char mcr; 825 826 if (!port) 827 return -1; 828 829 /* Pause the DMA interface if necessary */ 830 if (port->ip_sscr & SSCR_DMA_EN) { 831 writel(port->ip_sscr | SSCR_DMA_PAUSE, 832 &port->ip_serial_regs->sscr); 833 while ((readl(&port->ip_serial_regs->sscr) 834 & SSCR_PAUSE_STATE) == 0) { 835 spiniter++; 836 if (spiniter > MAXITER) 837 return -1; 838 } 839 } 840 shadow = readl(&port->ip_serial_regs->shadow); 841 mcr = (shadow & 0xff000000) >> 24; 842 843 /* Set new value */ 844 mcr |= mask1; 845 shadow |= mask2; 846 writeb(mcr, &port->ip_uart_regs->iu_mcr); 847 writel(shadow, &port->ip_serial_regs->shadow); 848 849 /* Re-enable the DMA interface if necessary */ 850 if (port->ip_sscr & SSCR_DMA_EN) { 851 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 852 } 853 return 0; 854} 855 856/** 857 * ioc3_set_proto - set the protocol for the port 858 * @port: port to use 859 * @proto: protocol to use 860 */ 861static int ioc3_set_proto(struct ioc3_port *port, int proto) 862{ 863 struct port_hooks *hooks = port->ip_hooks; 864 865 switch (proto) { 866 default: 867 case PROTO_RS232: 868 /* Clear the appropriate GIO pin */ 869 DPRINT_CONFIG(("%s: rs232\n", __FUNCTION__)); 870 writel(0, (&port->ip_idd->vma->gppr[0] 871 + hooks->rs422_select_pin)); 872 break; 873 874 case PROTO_RS422: 875 /* Set the appropriate GIO pin */ 876 DPRINT_CONFIG(("%s: rs422\n", __FUNCTION__)); 877 writel(1, (&port->ip_idd->vma->gppr[0] 878 + hooks->rs422_select_pin)); 879 break; 880 } 881 return 0; 882} 883 884/** 885 * transmit_chars - upper level write, called with the_port->lock 886 * @the_port: port to write 887 */ 888static void transmit_chars(struct uart_port *the_port) 889{ 890 int xmit_count, tail, head; 891 int result; 892 char *start; 893 struct tty_struct *tty; 894 struct ioc3_port *port = get_ioc3_port(the_port); 895 struct uart_info *info; 896 897 if (!the_port) 898 return; 899 if (!port) 900 return; 901 902 info = the_port->info; 903 tty = info->tty; 904 905 if (uart_circ_empty(&info->xmit) || uart_tx_stopped(the_port)) { 906 /* Nothing to do or hw stopped */ 907 set_notification(port, N_ALL_OUTPUT, 0); 908 return; 909 } 910 911 head = info->xmit.head; 912 tail = info->xmit.tail; 913 start = (char *)&info->xmit.buf[tail]; 914 915 /* write out all the data or until the end of the buffer */ 916 xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail); 917 if (xmit_count > 0) { 918 result = do_write(port, start, xmit_count); 919 if (result > 0) { 920 /* booking */ 921 xmit_count -= result; 922 the_port->icount.tx += result; 923 /* advance the pointers */ 924 tail += result; 925 tail &= UART_XMIT_SIZE - 1; 926 info->xmit.tail = tail; 927 start = (char *)&info->xmit.buf[tail]; 928 } 929 } 930 if (uart_circ_chars_pending(&info->xmit) < WAKEUP_CHARS) 931 uart_write_wakeup(the_port); 932 933 if (uart_circ_empty(&info->xmit)) { 934 set_notification(port, N_OUTPUT_LOWAT, 0); 935 } else { 936 set_notification(port, N_OUTPUT_LOWAT, 1); 937 } 938} 939 940/** 941 * ioc3_change_speed - change the speed of the port 942 * @the_port: port to change 943 * @new_termios: new termios settings 944 * @old_termios: old termios settings 945 */ 946static void 947ioc3_change_speed(struct uart_port *the_port, 948 struct ktermios *new_termios, struct ktermios *old_termios) 949{ 950 struct ioc3_port *port = get_ioc3_port(the_port); 951 unsigned int cflag; 952 int baud; 953 int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8; 954 struct uart_info *info = the_port->info; 955 956 cflag = new_termios->c_cflag; 957 958 switch (cflag & CSIZE) { 959 case CS5: 960 new_data = 5; 961 break; 962 case CS6: 963 new_data = 6; 964 break; 965 case CS7: 966 new_data = 7; 967 break; 968 case CS8: 969 new_data = 8; 970 break; 971 default: 972 /* cuz we always need a default ... */ 973 new_data = 5; 974 break; 975 } 976 if (cflag & CSTOPB) { 977 new_stop = 1; 978 } 979 if (cflag & PARENB) { 980 new_parity_enable = 1; 981 if (cflag & PARODD) 982 new_parity = 1; 983 } 984 baud = uart_get_baud_rate(the_port, new_termios, old_termios, 985 MIN_BAUD_SUPPORTED, MAX_BAUD_SUPPORTED); 986 DPRINT_CONFIG(("%s: returned baud %d for line %d\n", __FUNCTION__, baud, 987 the_port->line)); 988 989 if (!the_port->fifosize) 990 the_port->fifosize = FIFO_SIZE; 991 uart_update_timeout(the_port, cflag, baud); 992 993 the_port->ignore_status_mask = N_ALL_INPUT; 994 995 info->tty->low_latency = 1; 996 997 if (I_IGNPAR(info->tty)) 998 the_port->ignore_status_mask &= ~(N_PARITY_ERROR 999 | N_FRAMING_ERROR); 1000 if (I_IGNBRK(info->tty)) { 1001 the_port->ignore_status_mask &= ~N_BREAK; 1002 if (I_IGNPAR(info->tty)) 1003 the_port->ignore_status_mask &= ~N_OVERRUN_ERROR; 1004 } 1005 if (!(cflag & CREAD)) { 1006 /* ignore everything */ 1007 the_port->ignore_status_mask &= ~N_DATA_READY; 1008 } 1009 1010 if (cflag & CRTSCTS) { 1011 /* enable hardware flow control */ 1012 port->ip_sscr |= SSCR_HFC_EN; 1013 } 1014 else { 1015 /* disable hardware flow control */ 1016 port->ip_sscr &= ~SSCR_HFC_EN; 1017 } 1018 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 1019 1020 /* Set the configuration and proper notification call */ 1021 DPRINT_CONFIG(("%s : port 0x%p line %d cflag 0%o " 1022 "config_port(baud %d data %d stop %d penable %d " 1023 " parity %d), notification 0x%x\n", 1024 __FUNCTION__, (void *)port, the_port->line, cflag, baud, 1025 new_data, new_stop, new_parity_enable, new_parity, 1026 the_port->ignore_status_mask)); 1027 1028 if ((config_port(port, baud, /* baud */ 1029 new_data, /* byte size */ 1030 new_stop, /* stop bits */ 1031 new_parity_enable, /* set parity */ 1032 new_parity)) >= 0) { /* parity 1==odd */ 1033 set_notification(port, the_port->ignore_status_mask, 1); 1034 } 1035} 1036 1037/** 1038 * ic3_startup_local - Start up the serial port - returns >= 0 if no errors 1039 * @the_port: Port to operate on 1040 */ 1041static inline int ic3_startup_local(struct uart_port *the_port) 1042{ 1043 struct ioc3_port *port; 1044 1045 if (!the_port) { 1046 NOT_PROGRESS(); 1047 return -1; 1048 } 1049 1050 port = get_ioc3_port(the_port); 1051 if (!port) { 1052 NOT_PROGRESS(); 1053 return -1; 1054 } 1055 1056 local_open(port); 1057 1058 /* set the protocol */ 1059 ioc3_set_proto(port, IS_RS232(the_port->line) ? PROTO_RS232 : 1060 PROTO_RS422); 1061 return 0; 1062} 1063 1064/* 1065 * ioc3_cb_output_lowat - called when the output low water mark is hit 1066 * @port: port to output 1067 */ 1068static void ioc3_cb_output_lowat(struct ioc3_port *port) 1069{ 1070 unsigned long pflags; 1071 1072 /* the_port->lock is set on the call here */ 1073 if (port->ip_port) { 1074 spin_lock_irqsave(&port->ip_port->lock, pflags); 1075 transmit_chars(port->ip_port); 1076 spin_unlock_irqrestore(&port->ip_port->lock, pflags); 1077 } 1078} 1079 1080/* 1081 * ioc3_cb_post_ncs - called for some basic errors 1082 * @port: port to use 1083 * @ncs: event 1084 */ 1085static void ioc3_cb_post_ncs(struct uart_port *the_port, int ncs) 1086{ 1087 struct uart_icount *icount; 1088 1089 icount = &the_port->icount; 1090 1091 if (ncs & NCS_BREAK) 1092 icount->brk++; 1093 if (ncs & NCS_FRAMING) 1094 icount->frame++; 1095 if (ncs & NCS_OVERRUN) 1096 icount->overrun++; 1097 if (ncs & NCS_PARITY) 1098 icount->parity++; 1099} 1100 1101/** 1102 * do_read - Read in bytes from the port. Return the number of bytes 1103 * actually read. 1104 * @the_port: port to use 1105 * @buf: place to put the stuff we read 1106 * @len: how big 'buf' is 1107 */ 1108 1109static inline int do_read(struct uart_port *the_port, char *buf, int len) 1110{ 1111 int prod_ptr, cons_ptr, total; 1112 struct ioc3_port *port = get_ioc3_port(the_port); 1113 struct ring *inring; 1114 struct ring_entry *entry; 1115 struct port_hooks *hooks = port->ip_hooks; 1116 int byte_num; 1117 char *sc; 1118 int loop_counter; 1119 1120 BUG_ON(!(len >= 0)); 1121 BUG_ON(!port); 1122 1123 /* There is a nasty timing issue in the IOC3. When the rx_timer 1124 * expires or the rx_high condition arises, we take an interrupt. 1125 * At some point while servicing the interrupt, we read bytes from 1126 * the ring buffer and re-arm the rx_timer. However the rx_timer is 1127 * not started until the first byte is received *after* it is armed, 1128 * and any bytes pending in the rx construction buffers are not drained 1129 * to memory until either there are 4 bytes available or the rx_timer 1130 * expires. This leads to a potential situation where data is left 1131 * in the construction buffers forever - 1 to 3 bytes were received 1132 * after the interrupt was generated but before the rx_timer was 1133 * re-armed. At that point as long as no subsequent bytes are received 1134 * the timer will never be started and the bytes will remain in the 1135 * construction buffer forever. The solution is to execute a DRAIN 1136 * command after rearming the timer. This way any bytes received before 1137 * the DRAIN will be drained to memory, and any bytes received after 1138 * the DRAIN will start the TIMER and be drained when it expires. 1139 * Luckily, this only needs to be done when the DMA buffer is empty 1140 * since there is no requirement that this function return all 1141 * available data as long as it returns some. 1142 */ 1143 /* Re-arm the timer */ 1144 1145 writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir); 1146 1147 prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK; 1148 cons_ptr = port->ip_rx_cons; 1149 1150 if (prod_ptr == cons_ptr) { 1151 int reset_dma = 0; 1152 1153 /* Input buffer appears empty, do a flush. */ 1154 1155 /* DMA must be enabled for this to work. */ 1156 if (!(port->ip_sscr & SSCR_DMA_EN)) { 1157 port->ip_sscr |= SSCR_DMA_EN; 1158 reset_dma = 1; 1159 } 1160 1161 /* Potential race condition: we must reload the srpir after 1162 * issuing the drain command, otherwise we could think the rx 1163 * buffer is empty, then take a very long interrupt, and when 1164 * we come back it's full and we wait forever for the drain to 1165 * complete. 1166 */ 1167 writel(port->ip_sscr | SSCR_RX_DRAIN, 1168 &port->ip_serial_regs->sscr); 1169 prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK; 1170 1171 /* We must not wait for the DRAIN to complete unless there are 1172 * at least 8 bytes (2 ring entries) available to receive the 1173 * data otherwise the DRAIN will never complete and we'll 1174 * deadlock here. 1175 * In fact, to make things easier, I'll just ignore the flush if 1176 * there is any data at all now available. 1177 */ 1178 if (prod_ptr == cons_ptr) { 1179 loop_counter = 0; 1180 while (readl(&port->ip_serial_regs->sscr) & 1181 SSCR_RX_DRAIN) { 1182 loop_counter++; 1183 if (loop_counter > MAXITER) 1184 return -1; 1185 } 1186 1187 /* SIGH. We have to reload the prod_ptr *again* since 1188 * the drain may have caused it to change 1189 */ 1190 prod_ptr = readl(&port->ip_serial_regs->srpir) 1191 & PROD_CONS_MASK; 1192 } 1193 if (reset_dma) { 1194 port->ip_sscr &= ~SSCR_DMA_EN; 1195 writel(port->ip_sscr, &port->ip_serial_regs->sscr); 1196 } 1197 } 1198 inring = port->ip_inring; 1199 port->ip_flags &= ~READ_ABORTED; 1200 1201 total = 0; 1202 loop_counter = 0xfffff; /* to avoid hangs */ 1203 1204 /* Grab bytes from the hardware */ 1205 while ((prod_ptr != cons_ptr) && (len > 0)) { 1206 entry = (struct ring_entry *)((caddr_t) inring + cons_ptr); 1207 1208 if (loop_counter-- <= 0) { 1209 printk(KERN_WARNING "IOC3 serial: " 1210 "possible hang condition/" 1211 "port stuck on read (line %d).\n", 1212 the_port->line); 1213 break; 1214 } 1215 1216 /* According to the producer pointer, this ring entry 1217 * must contain some data. But if the PIO happened faster 1218 * than the DMA, the data may not be available yet, so let's 1219 * wait until it arrives. 1220 */ 1221 if ((entry->ring_allsc & RING_ANY_VALID) == 0) { 1222 /* Indicate the read is aborted so we don't disable 1223 * the interrupt thinking that the consumer is 1224 * congested. 1225 */ 1226 port->ip_flags |= READ_ABORTED; 1227 len = 0; 1228 break; 1229 } 1230 1231 /* Load the bytes/status out of the ring entry */ 1232 for (byte_num = 0; byte_num < 4 && len > 0; byte_num++) { 1233 sc = &(entry->ring_sc[byte_num]); 1234 1235 /* Check for change in modem state or overrun */ 1236 if ((*sc & RXSB_MODEM_VALID) 1237 && (port->ip_notify & N_DDCD)) { 1238 /* Notify upper layer if DCD dropped */ 1239 if ((port->ip_flags & DCD_ON) 1240 && !(*sc & RXSB_DCD)) { 1241 /* If we have already copied some data, 1242 * return it. We'll pick up the carrier 1243 * drop on the next pass. That way we 1244 * don't throw away the data that has 1245 * already been copied back to 1246 * the caller's buffer. 1247 */ 1248 if (total > 0) { 1249 len = 0; 1250 break; 1251 } 1252 port->ip_flags &= ~DCD_ON; 1253 1254 /* Turn off this notification so the 1255 * carrier drop protocol won't see it 1256 * again when it does a read. 1257 */ 1258 *sc &= ~RXSB_MODEM_VALID; 1259 1260 /* To keep things consistent, we need 1261 * to update the consumer pointer so 1262 * the next reader won't come in and 1263 * try to read the same ring entries 1264 * again. This must be done here before 1265 * the dcd change. 1266 */ 1267 1268 if ((entry->ring_allsc & RING_ANY_VALID) 1269 == 0) { 1270 cons_ptr += (int)sizeof 1271 (struct ring_entry); 1272 cons_ptr &= PROD_CONS_MASK; 1273 } 1274 writel(cons_ptr, 1275 &port->ip_serial_regs->srcir); 1276 port->ip_rx_cons = cons_ptr; 1277 1278 /* Notify upper layer of carrier drop */ 1279 if ((port->ip_notify & N_DDCD) 1280 && port->ip_port) { 1281 uart_handle_dcd_change 1282 (port->ip_port, 0); 1283 wake_up_interruptible 1284 (&the_port->info-> 1285 delta_msr_wait); 1286 } 1287 1288 /* If we had any data to return, we 1289 * would have returned it above. 1290 */ 1291 return 0; 1292 } 1293 } 1294 if (*sc & RXSB_MODEM_VALID) { 1295 /* Notify that an input overrun occurred */ 1296 if ((*sc & RXSB_OVERRUN) 1297 && (port->ip_notify & N_OVERRUN_ERROR)) { 1298 ioc3_cb_post_ncs(the_port, NCS_OVERRUN); 1299 } 1300 /* Don't look at this byte again */ 1301 *sc &= ~RXSB_MODEM_VALID; 1302 } 1303 1304 /* Check for valid data or RX errors */ 1305 if ((*sc & RXSB_DATA_VALID) && 1306 ((*sc & (RXSB_PAR_ERR 1307 | RXSB_FRAME_ERR | RXSB_BREAK)) 1308 && (port->ip_notify & (N_PARITY_ERROR 1309 | N_FRAMING_ERROR 1310 | N_BREAK)))) { 1311 /* There is an error condition on the next byte. 1312 * If we have already transferred some bytes, 1313 * we'll stop here. Otherwise if this is the 1314 * first byte to be read, we'll just transfer 1315 * it alone after notifying the 1316 * upper layer of its status. 1317 */ 1318 if (total > 0) { 1319 len = 0; 1320 break; 1321 } else { 1322 if ((*sc & RXSB_PAR_ERR) && 1323 (port-> 1324 ip_notify & N_PARITY_ERROR)) { 1325 ioc3_cb_post_ncs(the_port, 1326 NCS_PARITY); 1327 } 1328 if ((*sc & RXSB_FRAME_ERR) && 1329 (port-> 1330 ip_notify & N_FRAMING_ERROR)) { 1331 ioc3_cb_post_ncs(the_port, 1332 NCS_FRAMING); 1333 } 1334 if ((*sc & RXSB_BREAK) 1335 && (port->ip_notify & N_BREAK)) { 1336 ioc3_cb_post_ncs 1337 (the_port, NCS_BREAK); 1338 } 1339 len = 1; 1340 } 1341 } 1342 if (*sc & RXSB_DATA_VALID) { 1343 *sc &= ~RXSB_DATA_VALID; 1344 *buf = entry->ring_data[byte_num]; 1345 buf++; 1346 len--; 1347 total++; 1348 } 1349 } 1350 1351 /* If we used up this entry entirely, go on to the next one, 1352 * otherwise we must have run out of buffer space, so 1353 * leave the consumer pointer here for the next read in case 1354 * there are still unread bytes in this entry. 1355 */ 1356 if ((entry->ring_allsc & RING_ANY_VALID) == 0) { 1357 cons_ptr += (int)sizeof(struct ring_entry); 1358 cons_ptr &= PROD_CONS_MASK; 1359 } 1360 } 1361 1362 /* Update consumer pointer and re-arm rx timer interrupt */ 1363 writel(cons_ptr, &port->ip_serial_regs->srcir); 1364 port->ip_rx_cons = cons_ptr; 1365 1366 /* If we have now dipped below the rx high water mark and we have 1367 * rx_high interrupt turned off, we can now turn it back on again. 1368 */ 1369 if ((port->ip_flags & INPUT_HIGH) && (((prod_ptr - cons_ptr) 1370 & PROD_CONS_MASK) < 1371 ((port-> 1372 ip_sscr & 1373 SSCR_RX_THRESHOLD) 1374 << PROD_CONS_PTR_OFF))) { 1375 port->ip_flags &= ~INPUT_HIGH; 1376 enable_intrs(port, hooks->intr_rx_high); 1377 } 1378 return total; 1379} 1380 1381/** 1382 * receive_chars - upper level read. 1383 * @the_port: port to read from 1384 */ 1385static int receive_chars(struct uart_port *the_port) 1386{ 1387 struct tty_struct *tty; 1388 unsigned char ch[MAX_CHARS]; 1389 int read_count = 0, read_room, flip = 0; 1390 struct uart_info *info = the_port->info; 1391 struct ioc3_port *port = get_ioc3_port(the_port); 1392 unsigned long pflags; 1393 1394 /* Make sure all the pointers are "good" ones */ 1395 if (!info) 1396 return 0; 1397 if (!info->tty) 1398 return 0; 1399 1400 if (!(port->ip_flags & INPUT_ENABLE)) 1401 return 0; 1402 1403 spin_lock_irqsave(&the_port->lock, pflags); 1404 tty = info->tty; 1405 1406 read_count = do_read(the_port, ch, MAX_CHARS); 1407 if (read_count > 0) { 1408 flip = 1; 1409 read_room = tty_buffer_request_room(tty, read_count); 1410 tty_insert_flip_string(tty, ch, read_room); 1411 the_port->icount.rx += read_count; 1412 } 1413 spin_unlock_irqrestore(&the_port->lock, pflags); 1414 1415 if (flip) 1416 tty_flip_buffer_push(tty); 1417 1418 return read_count; 1419} 1420 1421/** 1422 * ioc3uart_intr_one - lowest level (per port) interrupt handler. 1423 * @is : submodule 1424 * @idd: driver data 1425 * @pending: interrupts to handle 1426 */ 1427 1428static int inline 1429ioc3uart_intr_one(struct ioc3_submodule *is, 1430 struct ioc3_driver_data *idd, 1431 unsigned int pending) 1432{ 1433 int port_num = GET_PORT_FROM_SIO_IR(pending); 1434 struct port_hooks *hooks; 1435 unsigned int rx_high_rd_aborted = 0; 1436 unsigned long flags; 1437 struct uart_port *the_port; 1438 struct ioc3_port *port; 1439 int loop_counter; 1440 struct ioc3_card *card_ptr; 1441 unsigned int sio_ir; 1442 1443 card_ptr = idd->data[is->id]; 1444 port = card_ptr->ic_port[port_num].icp_port; 1445 hooks = port->ip_hooks; 1446 1447 /* Possible race condition here: The tx_mt interrupt bit may be 1448 * cleared without the intervention of the interrupt handler, 1449 * e.g. by a write. If the top level interrupt handler reads a 1450 * tx_mt, then some other processor does a write, starting up 1451 * output, then we come in here, see the tx_mt and stop DMA, the 1452 * output started by the other processor will hang. Thus we can 1453 * only rely on tx_mt being legitimate if it is read while the 1454 * port lock is held. Therefore this bit must be ignored in the 1455 * passed in interrupt mask which was read by the top level 1456 * interrupt handler since the port lock was not held at the time 1457 * it was read. We can only rely on this bit being accurate if it 1458 * is read while the port lock is held. So we'll clear it for now, 1459 * and reload it later once we have the port lock. 1460 */ 1461 1462 sio_ir = pending & ~(hooks->intr_tx_mt); 1463 spin_lock_irqsave(&port->ip_lock, flags); 1464 1465 loop_counter = MAXITER; /* to avoid hangs */ 1466 1467 do { 1468 uint32_t shadow; 1469 1470 if (loop_counter-- <= 0) { 1471 printk(KERN_WARNING "IOC3 serial: " 1472 "possible hang condition/" 1473 "port stuck on interrupt (line %d).\n", 1474 ((struct uart_port *)port->ip_port)->line); 1475 break; 1476 } 1477 /* Handle a DCD change */ 1478 if (sio_ir & hooks->intr_delta_dcd) { 1479 ioc3_ack(is, idd, hooks->intr_delta_dcd); 1480 shadow = readl(&port->ip_serial_regs->shadow); 1481 1482 if ((port->ip_notify & N_DDCD) 1483 && (shadow & SHADOW_DCD) 1484 && (port->ip_port)) { 1485 the_port = port->ip_port; 1486 uart_handle_dcd_change(the_port, 1487 shadow & SHADOW_DCD); 1488 wake_up_interruptible 1489 (&the_port->info->delta_msr_wait); 1490 } else if ((port->ip_notify & N_DDCD) 1491 && !(shadow & SHADOW_DCD)) { 1492 /* Flag delta DCD/no DCD */ 1493 uart_handle_dcd_change(port->ip_port, 1494 shadow & SHADOW_DCD); 1495 port->ip_flags |= DCD_ON; 1496 } 1497 } 1498 1499 /* Handle a CTS change */ 1500 if (sio_ir & hooks->intr_delta_cts) { 1501 ioc3_ack(is, idd, hooks->intr_delta_cts); 1502 shadow = readl(&port->ip_serial_regs->shadow); 1503 1504 if ((port->ip_notify & N_DCTS) && (port->ip_port)) { 1505 the_port = port->ip_port; 1506 uart_handle_cts_change(the_port, shadow 1507 & SHADOW_CTS); 1508 wake_up_interruptible 1509 (&the_port->info->delta_msr_wait); 1510 } 1511 } 1512 1513 /* rx timeout interrupt. Must be some data available. Put this 1514 * before the check for rx_high since servicing this condition 1515 * may cause that condition to clear. 1516 */ 1517 if (sio_ir & hooks->intr_rx_timer) { 1518 ioc3_ack(is, idd, hooks->intr_rx_timer); 1519 if ((port->ip_notify & N_DATA_READY) 1520 && (port->ip_port)) { 1521 receive_chars(port->ip_port); 1522 } 1523 } 1524 1525 /* rx high interrupt. Must be after rx_timer. */ 1526 else if (sio_ir & hooks->intr_rx_high) { 1527 /* Data available, notify upper layer */ 1528 if ((port->ip_notify & N_DATA_READY) && port->ip_port) { 1529 receive_chars(port->ip_port); 1530 } 1531 1532 /* We can't ACK this interrupt. If receive_chars didn't 1533 * cause the condition to clear, we'll have to disable 1534 * the interrupt until the data is drained. 1535 * If the read was aborted, don't disable the interrupt 1536 * as this may cause us to hang indefinitely. An 1537 * aborted read generally means that this interrupt 1538 * hasn't been delivered to the cpu yet anyway, even 1539 * though we see it as asserted when we read the sio_ir. 1540 */ 1541 if ((sio_ir = PENDING(card_ptr, idd)) 1542 & hooks->intr_rx_high) { 1543 if (port->ip_flags & READ_ABORTED) { 1544 rx_high_rd_aborted++; 1545 } 1546 else { 1547 card_ptr->ic_enable &= ~hooks->intr_rx_high; 1548 port->ip_flags |= INPUT_HIGH; 1549 } 1550 } 1551 } 1552 1553 /* We got a low water interrupt: notify upper layer to 1554 * send more data. Must come before tx_mt since servicing 1555 * this condition may cause that condition to clear. 1556 */ 1557 if (sio_ir & hooks->intr_tx_explicit) { 1558 port->ip_flags &= ~LOWAT_WRITTEN; 1559 ioc3_ack(is, idd, hooks->intr_tx_explicit); 1560 if (port->ip_notify & N_OUTPUT_LOWAT) 1561 ioc3_cb_output_lowat(port); 1562 } 1563 1564 /* Handle tx_mt. Must come after tx_explicit. */ 1565 else if (sio_ir & hooks->intr_tx_mt) { 1566 /* If we are expecting a lowat notification 1567 * and we get to this point it probably means that for 1568 * some reason the tx_explicit didn't work as expected 1569 * (that can legitimately happen if the output buffer is 1570 * filled up in just the right way). 1571 * So send the notification now. 1572 */ 1573 if (port->ip_notify & N_OUTPUT_LOWAT) { 1574 ioc3_cb_output_lowat(port); 1575 1576 /* We need to reload the sio_ir since the lowat 1577 * call may have caused another write to occur, 1578 * clearing the tx_mt condition. 1579 */ 1580 sio_ir = PENDING(card_ptr, idd); 1581 } 1582 1583 /* If the tx_mt condition still persists even after the 1584 * lowat call, we've got some work to do. 1585 */ 1586 if (sio_ir & hooks->intr_tx_mt) { 1587 /* If we are not currently expecting DMA input, 1588 * and the transmitter has just gone idle, 1589 * there is no longer any reason for DMA, so 1590 * disable it. 1591 */ 1592 if (!(port->ip_notify 1593 & (N_DATA_READY | N_DDCD))) { 1594 BUG_ON(!(port->ip_sscr 1595 & SSCR_DMA_EN)); 1596 port->ip_sscr &= ~SSCR_DMA_EN; 1597 writel(port->ip_sscr, 1598 &port->ip_serial_regs->sscr); 1599 } 1600 /* Prevent infinite tx_mt interrupt */ 1601 card_ptr->ic_enable &= ~hooks->intr_tx_mt; 1602 } 1603 } 1604 sio_ir = PENDING(card_ptr, idd); 1605 1606 /* if the read was aborted and only hooks->intr_rx_high, 1607 * clear hooks->intr_rx_high, so we do not loop forever. 1608 */ 1609 1610 if (rx_high_rd_aborted && (sio_ir == hooks->intr_rx_high)) { 1611 sio_ir &= ~hooks->intr_rx_high; 1612 } 1613 } while (sio_ir & hooks->intr_all); 1614 1615 spin_unlock_irqrestore(&port->ip_lock, flags); 1616 ioc3_enable(is, idd, card_ptr->ic_enable); 1617 return 0; 1618} 1619 1620/** 1621 * ioc3uart_intr - field all serial interrupts 1622 * @is : submodule 1623 * @idd: driver data 1624 * @pending: interrupts to handle 1625 * 1626 */ 1627 1628static int ioc3uart_intr(struct ioc3_submodule *is, 1629 struct ioc3_driver_data *idd, 1630 unsigned int pending) 1631{ 1632 int ret = 0; 1633 1634 /* 1635 * The upper level interrupt handler sends interrupts for both ports 1636 * here. So we need to call for each port with its interrupts. 1637 */ 1638 1639 if (pending & SIO_IR_SA) 1640 ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SA); 1641 if (pending & SIO_IR_SB) 1642 ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SB); 1643 1644 return ret; 1645} 1646 1647/** 1648 * ic3_type 1649 * @port: Port to operate with (we ignore since we only have one port) 1650 * 1651 */ 1652static const char *ic3_type(struct uart_port *the_port) 1653{ 1654 if (IS_RS232(the_port->line)) 1655 return "SGI IOC3 Serial [rs232]"; 1656 else 1657 return "SGI IOC3 Serial [rs422]"; 1658} 1659 1660/** 1661 * ic3_tx_empty - Is the transmitter empty? 1662 * @port: Port to operate on 1663 * 1664 */ 1665static unsigned int ic3_tx_empty(struct uart_port *the_port) 1666{ 1667 unsigned int ret = 0; 1668 struct ioc3_port *port = get_ioc3_port(the_port); 1669 1670 if (readl(&port->ip_serial_regs->shadow) & SHADOW_TEMT) 1671 ret = TIOCSER_TEMT; 1672 return ret; 1673} 1674 1675/** 1676 * ic3_stop_tx - stop the transmitter 1677 * @port: Port to operate on 1678 * 1679 */ 1680static void ic3_stop_tx(struct uart_port *the_port) 1681{ 1682 struct ioc3_port *port = get_ioc3_port(the_port); 1683 1684 if (port) 1685 set_notification(port, N_OUTPUT_LOWAT, 0); 1686} 1687 1688/** 1689 * ic3_stop_rx - stop the receiver 1690 * @port: Port to operate on 1691 * 1692 */ 1693static void ic3_stop_rx(struct uart_port *the_port) 1694{ 1695 struct ioc3_port *port = get_ioc3_port(the_port); 1696 1697 if (port) 1698 port->ip_flags &= ~INPUT_ENABLE; 1699} 1700 1701/** 1702 * null_void_function 1703 * @port: Port to operate on 1704 * 1705 */ 1706static void null_void_function(struct uart_port *the_port) 1707{ 1708} 1709 1710/** 1711 * ic3_shutdown - shut down the port - free irq and disable 1712 * @port: port to shut down 1713 * 1714 */ 1715static void ic3_shutdown(struct uart_port *the_port) 1716{ 1717 unsigned long port_flags; 1718 struct ioc3_port *port; 1719 struct uart_info *info; 1720 1721 port = get_ioc3_port(the_port); 1722 if (!port) 1723 return; 1724 1725 info = the_port->info; 1726 wake_up_interruptible(&info->delta_msr_wait); 1727 1728 spin_lock_irqsave(&the_port->lock, port_flags); 1729 set_notification(port, N_ALL, 0); 1730 spin_unlock_irqrestore(&the_port->lock, port_flags); 1731} 1732 1733/** 1734 * ic3_set_mctrl - set control lines (dtr, rts, etc) 1735 * @port: Port to operate on 1736 * @mctrl: Lines to set/unset 1737 * 1738 */ 1739static void ic3_set_mctrl(struct uart_port *the_port, unsigned int mctrl) 1740{ 1741 unsigned char mcr = 0; 1742 1743 if (mctrl & TIOCM_RTS) 1744 mcr |= UART_MCR_RTS; 1745 if (mctrl & TIOCM_DTR) 1746 mcr |= UART_MCR_DTR; 1747 if (mctrl & TIOCM_OUT1) 1748 mcr |= UART_MCR_OUT1; 1749 if (mctrl & TIOCM_OUT2) 1750 mcr |= UART_MCR_OUT2; 1751 if (mctrl & TIOCM_LOOP) 1752 mcr |= UART_MCR_LOOP; 1753 1754 set_mcr(the_port, mcr, SHADOW_DTR); 1755} 1756 1757/** 1758 * ic3_get_mctrl - get control line info 1759 * @port: port to operate on 1760 * 1761 */ 1762static unsigned int ic3_get_mctrl(struct uart_port *the_port) 1763{ 1764 struct ioc3_port *port = get_ioc3_port(the_port); 1765 uint32_t shadow; 1766 unsigned int ret = 0; 1767 1768 if (!port) 1769 return 0; 1770 1771 shadow = readl(&port->ip_serial_regs->shadow); 1772 if (shadow & SHADOW_DCD) 1773 ret |= TIOCM_CD; 1774 if (shadow & SHADOW_DR) 1775 ret |= TIOCM_DSR; 1776 if (shadow & SHADOW_CTS) 1777 ret |= TIOCM_CTS; 1778 return ret; 1779} 1780 1781/** 1782 * ic3_start_tx - Start transmitter. Called with the_port->lock 1783 * @port: Port to operate on 1784 * 1785 */ 1786static void ic3_start_tx(struct uart_port *the_port) 1787{ 1788 struct ioc3_port *port = get_ioc3_port(the_port); 1789 1790 if (port) { 1791 set_notification(port, N_OUTPUT_LOWAT, 1); 1792 enable_intrs(port, port->ip_hooks->intr_tx_mt); 1793 } 1794} 1795 1796/** 1797 * ic3_break_ctl - handle breaks 1798 * @port: Port to operate on 1799 * @break_state: Break state 1800 * 1801 */ 1802static void ic3_break_ctl(struct uart_port *the_port, int break_state) 1803{ 1804} 1805 1806/** 1807 * ic3_startup - Start up the serial port - always return 0 (We're always on) 1808 * @port: Port to operate on 1809 * 1810 */ 1811static int ic3_startup(struct uart_port *the_port) 1812{ 1813 int retval; 1814 struct ioc3_port *port; 1815 struct ioc3_card *card_ptr; 1816 unsigned long port_flags; 1817 1818 if (!the_port) { 1819 NOT_PROGRESS(); 1820 return -ENODEV; 1821 } 1822 port = get_ioc3_port(the_port); 1823 if (!port) { 1824 NOT_PROGRESS(); 1825 return -ENODEV; 1826 } 1827 card_ptr = port->ip_card; 1828 port->ip_port = the_port; 1829 1830 if (!card_ptr) { 1831 NOT_PROGRESS(); 1832 return -ENODEV; 1833 } 1834 1835 /* Start up the serial port */ 1836 spin_lock_irqsave(&the_port->lock, port_flags); 1837 retval = ic3_startup_local(the_port); 1838 spin_unlock_irqrestore(&the_port->lock, port_flags); 1839 return retval; 1840} 1841 1842/** 1843 * ic3_set_termios - set termios stuff 1844 * @port: port to operate on 1845 * @termios: New settings 1846 * @termios: Old 1847 * 1848 */ 1849static void 1850ic3_set_termios(struct uart_port *the_port, 1851 struct ktermios *termios, struct ktermios *old_termios) 1852{ 1853 unsigned long port_flags; 1854 1855 spin_lock_irqsave(&the_port->lock, port_flags); 1856 ioc3_change_speed(the_port, termios, old_termios); 1857 spin_unlock_irqrestore(&the_port->lock, port_flags); 1858} 1859 1860/** 1861 * ic3_request_port - allocate resources for port - no op.... 1862 * @port: port to operate on 1863 * 1864 */ 1865static int ic3_request_port(struct uart_port *port) 1866{ 1867 return 0; 1868} 1869 1870/* Associate the uart functions above - given to serial core */ 1871static struct uart_ops ioc3_ops = { 1872 .tx_empty = ic3_tx_empty, 1873 .set_mctrl = ic3_set_mctrl, 1874 .get_mctrl = ic3_get_mctrl, 1875 .stop_tx = ic3_stop_tx, 1876 .start_tx = ic3_start_tx, 1877 .stop_rx = ic3_stop_rx, 1878 .enable_ms = null_void_function, 1879 .break_ctl = ic3_break_ctl, 1880 .startup = ic3_startup, 1881 .shutdown = ic3_shutdown, 1882 .set_termios = ic3_set_termios, 1883 .type = ic3_type, 1884 .release_port = null_void_function, 1885 .request_port = ic3_request_port, 1886}; 1887 1888/* 1889 * Boot-time initialization code 1890 */ 1891 1892static struct uart_driver ioc3_uart = { 1893 .owner = THIS_MODULE, 1894 .driver_name = "ioc3_serial", 1895 .dev_name = DEVICE_NAME, 1896 .major = DEVICE_MAJOR, 1897 .minor = DEVICE_MINOR, 1898 .nr = MAX_LOGICAL_PORTS 1899}; 1900 1901/** 1902 * ioc3_serial_core_attach - register with serial core 1903 * This is done during pci probing 1904 * @is: submodule struct for this 1905 * @idd: handle for this card 1906 */ 1907static inline int ioc3_serial_core_attach( struct ioc3_submodule *is, 1908 struct ioc3_driver_data *idd) 1909{ 1910 struct ioc3_port *port; 1911 struct uart_port *the_port; 1912 struct ioc3_card *card_ptr = idd->data[is->id]; 1913 int ii, phys_port; 1914 struct pci_dev *pdev = idd->pdev; 1915 1916 DPRINT_CONFIG(("%s: attach pdev 0x%p - card_ptr 0x%p\n", 1917 __FUNCTION__, pdev, (void *)card_ptr)); 1918 1919 if (!card_ptr) 1920 return -ENODEV; 1921 1922 /* once around for each logical port on this card */ 1923 for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) { 1924 phys_port = GET_PHYSICAL_PORT(ii); 1925 the_port = &card_ptr->ic_port[phys_port]. 1926 icp_uart_port[GET_LOGICAL_PORT(ii)]; 1927 port = card_ptr->ic_port[phys_port].icp_port; 1928 port->ip_port = the_port; 1929 1930 DPRINT_CONFIG(("%s: attach the_port 0x%p / port 0x%p [%d/%d]\n", 1931 __FUNCTION__, (void *)the_port, (void *)port, 1932 phys_port, ii)); 1933 1934 /* membase, iobase and mapbase just need to be non-0 */ 1935 the_port->membase = (unsigned char __iomem *)1; 1936 the_port->iobase = (pdev->bus->number << 16) | ii; 1937 the_port->line = (Num_of_ioc3_cards << 2) | ii; 1938 the_port->mapbase = 1; 1939 the_port->type = PORT_16550A; 1940 the_port->fifosize = FIFO_SIZE; 1941 the_port->ops = &ioc3_ops; 1942 the_port->irq = idd->irq_io; 1943 the_port->dev = &pdev->dev; 1944 1945 if (uart_add_one_port(&ioc3_uart, the_port) < 0) { 1946 printk(KERN_WARNING 1947 "%s: unable to add port %d bus %d\n", 1948 __FUNCTION__, the_port->line, pdev->bus->number); 1949 } else { 1950 DPRINT_CONFIG(("IOC3 serial port %d irq %d bus %d\n", 1951 the_port->line, the_port->irq, pdev->bus->number)); 1952 } 1953 1954 /* all ports are rs232 for now */ 1955 if (IS_PHYSICAL_PORT(ii)) 1956 ioc3_set_proto(port, PROTO_RS232); 1957 } 1958 return 0; 1959} 1960 1961/** 1962 * ioc3uart_remove - register detach function 1963 * @is: submodule struct for this submodule 1964 * @idd: ioc3 driver data for this submodule 1965 */ 1966 1967static int ioc3uart_remove(struct ioc3_submodule *is, 1968 struct ioc3_driver_data *idd) 1969{ 1970 struct ioc3_card *card_ptr = idd->data[is->id]; 1971 struct uart_port *the_port; 1972 struct ioc3_port *port; 1973 int ii; 1974 1975 if (card_ptr) { 1976 for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) { 1977 the_port = &card_ptr->ic_port[GET_PHYSICAL_PORT(ii)]. 1978 icp_uart_port[GET_LOGICAL_PORT(ii)]; 1979 if (the_port) 1980 uart_remove_one_port(&ioc3_uart, the_port); 1981 port = card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].icp_port; 1982 if (port && IS_PHYSICAL_PORT(ii) 1983 && (GET_PHYSICAL_PORT(ii) == 0)) { 1984 pci_free_consistent(port->ip_idd->pdev, 1985 TOTAL_RING_BUF_SIZE, 1986 (void *)port->ip_cpu_ringbuf, 1987 port->ip_dma_ringbuf); 1988 kfree(port); 1989 card_ptr->ic_port[GET_PHYSICAL_PORT(ii)]. 1990 icp_port = NULL; 1991 } 1992 } 1993 kfree(card_ptr); 1994 idd->data[is->id] = NULL; 1995 } 1996 return 0; 1997} 1998 1999/** 2000 * ioc3uart_probe - card probe function called from shim driver 2001 * @is: submodule struct for this submodule 2002 * @idd: ioc3 driver data for this card 2003 */ 2004 2005static int __devinit 2006ioc3uart_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd) 2007{ 2008 struct pci_dev *pdev = idd->pdev; 2009 struct ioc3_card *card_ptr; 2010 int ret = 0; 2011 struct ioc3_port *port; 2012 struct ioc3_port *ports[PORTS_PER_CARD]; 2013 int phys_port; 2014 2015 DPRINT_CONFIG(("%s (0x%p, 0x%p)\n", __FUNCTION__, is, idd)); 2016 2017 card_ptr = kzalloc(sizeof(struct ioc3_card), GFP_KERNEL); 2018 if (!card_ptr) { 2019 printk(KERN_WARNING "ioc3_attach_one" 2020 ": unable to get memory for the IOC3\n"); 2021 return -ENOMEM; 2022 } 2023 idd->data[is->id] = card_ptr; 2024 Submodule_slot = is->id; 2025 2026 writel(((UARTA_BASE >> 3) << SIO_CR_SER_A_BASE_SHIFT) | 2027 ((UARTB_BASE >> 3) << SIO_CR_SER_B_BASE_SHIFT) | 2028 (0xf << SIO_CR_CMD_PULSE_SHIFT), &idd->vma->sio_cr); 2029 2030 pci_write_config_dword(pdev, PCI_LAT, 0xff00); 2031 2032 /* Enable serial port mode select generic PIO pins as outputs */ 2033 ioc3_gpcr_set(idd, GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL); 2034 2035 /* Create port structures for each port */ 2036 for (phys_port = 0; phys_port < PORTS_PER_CARD; phys_port++) { 2037 port = kzalloc(sizeof(struct ioc3_port), GFP_KERNEL); 2038 if (!port) { 2039 printk(KERN_WARNING 2040 "IOC3 serial memory not available for port\n"); 2041 goto out4; 2042 } 2043 spin_lock_init(&port->ip_lock); 2044 2045 /* we need to remember the previous ones, to point back to 2046 * them farther down - setting up the ring buffers. 2047 */ 2048 ports[phys_port] = port; 2049 2050 /* init to something useful */ 2051 card_ptr->ic_port[phys_port].icp_port = port; 2052 port->ip_is = is; 2053 port->ip_idd = idd; 2054 port->ip_baud = 9600; 2055 port->ip_card = card_ptr; 2056 port->ip_hooks = &hooks_array[phys_port]; 2057 2058 /* Setup each port */ 2059 if (phys_port == 0) { 2060 port->ip_serial_regs = &idd->vma->port_a; 2061 port->ip_uart_regs = &idd->vma->sregs.uarta; 2062 2063 DPRINT_CONFIG(("%s : Port A ip_serial_regs 0x%p " 2064 "ip_uart_regs 0x%p\n", 2065 __FUNCTION__, 2066 (void *)port->ip_serial_regs, 2067 (void *)port->ip_uart_regs)); 2068 2069 /* setup ring buffers */ 2070 port->ip_cpu_ringbuf = pci_alloc_consistent(pdev, 2071 TOTAL_RING_BUF_SIZE, &port->ip_dma_ringbuf); 2072 2073 BUG_ON(!((((int64_t) port->ip_dma_ringbuf) & 2074 (TOTAL_RING_BUF_SIZE - 1)) == 0)); 2075 port->ip_inring = RING(port, RX_A); 2076 port->ip_outring = RING(port, TX_A); 2077 DPRINT_CONFIG(("%s : Port A ip_cpu_ringbuf 0x%p " 2078 "ip_dma_ringbuf 0x%p, ip_inring 0x%p " 2079 "ip_outring 0x%p\n", 2080 __FUNCTION__, 2081 (void *)port->ip_cpu_ringbuf, 2082 (void *)port->ip_dma_ringbuf, 2083 (void *)port->ip_inring, 2084 (void *)port->ip_outring)); 2085 } 2086 else { 2087 port->ip_serial_regs = &idd->vma->port_b; 2088 port->ip_uart_regs = &idd->vma->sregs.uartb; 2089 2090 DPRINT_CONFIG(("%s : Port B ip_serial_regs 0x%p " 2091 "ip_uart_regs 0x%p\n", 2092 __FUNCTION__, 2093 (void *)port->ip_serial_regs, 2094 (void *)port->ip_uart_regs)); 2095 2096 /* share the ring buffers */ 2097 port->ip_dma_ringbuf = 2098 ports[phys_port - 1]->ip_dma_ringbuf; 2099 port->ip_cpu_ringbuf = 2100 ports[phys_port - 1]->ip_cpu_ringbuf; 2101 port->ip_inring = RING(port, RX_B); 2102 port->ip_outring = RING(port, TX_B); 2103 DPRINT_CONFIG(("%s : Port B ip_cpu_ringbuf 0x%p " 2104 "ip_dma_ringbuf 0x%p, ip_inring 0x%p " 2105 "ip_outring 0x%p\n", 2106 __FUNCTION__, 2107 (void *)port->ip_cpu_ringbuf, 2108 (void *)port->ip_dma_ringbuf, 2109 (void *)port->ip_inring, 2110 (void *)port->ip_outring)); 2111 } 2112 2113 DPRINT_CONFIG(("%s : port %d [addr 0x%p] card_ptr 0x%p", 2114 __FUNCTION__, 2115 phys_port, (void *)port, (void *)card_ptr)); 2116 DPRINT_CONFIG((" ip_serial_regs 0x%p ip_uart_regs 0x%p\n", 2117 (void *)port->ip_serial_regs, 2118 (void *)port->ip_uart_regs)); 2119 2120 /* Initialize the hardware for IOC3 */ 2121 port_init(port); 2122 2123 DPRINT_CONFIG(("%s: phys_port %d port 0x%p inring 0x%p " 2124 "outring 0x%p\n", 2125 __FUNCTION__, 2126 phys_port, (void *)port, 2127 (void *)port->ip_inring, 2128 (void *)port->ip_outring)); 2129 2130 } 2131 2132 /* register port with the serial core */ 2133 2134 if ((ret = ioc3_serial_core_attach(is, idd))) 2135 goto out4; 2136 2137 Num_of_ioc3_cards++; 2138 2139 return ret; 2140 2141 /* error exits that give back resources */ 2142out4: 2143 kfree(card_ptr); 2144 return ret; 2145} 2146 2147static struct ioc3_submodule ioc3uart_submodule = { 2148 .name = "IOC3uart", 2149 .probe = ioc3uart_probe, 2150 .remove = ioc3uart_remove, 2151 /* call .intr for both ports initially */ 2152 .irq_mask = SIO_IR_SA | SIO_IR_SB, 2153 .intr = ioc3uart_intr, 2154 .owner = THIS_MODULE, 2155}; 2156 2157/** 2158 * ioc3_detect - module init called, 2159 */ 2160static int __devinit ioc3uart_init(void) 2161{ 2162 int ret; 2163 2164 /* register with serial core */ 2165 if ((ret = uart_register_driver(&ioc3_uart)) < 0) { 2166 printk(KERN_WARNING 2167 "%s: Couldn't register IOC3 uart serial driver\n", 2168 __FUNCTION__); 2169 return ret; 2170 } 2171 ret = ioc3_register_submodule(&ioc3uart_submodule); 2172 if (ret) 2173 uart_unregister_driver(&ioc3_uart); 2174 return ret; 2175} 2176 2177static void __devexit ioc3uart_exit(void) 2178{ 2179 ioc3_unregister_submodule(&ioc3uart_submodule); 2180 uart_unregister_driver(&ioc3_uart); 2181} 2182 2183module_init(ioc3uart_init); 2184module_exit(ioc3uart_exit); 2185 2186MODULE_AUTHOR("Pat Gefre - Silicon Graphics Inc. (SGI) <pfg@sgi.com>"); 2187MODULE_DESCRIPTION("Serial PCI driver module for SGI IOC3 card"); 2188MODULE_LICENSE("GPL"); 2189