1/*
2 * Oktagon_esp.c -- Driver for bsc Oktagon
3 *
4 * Written by Carsten Pluntke 1998
5 *
6 * Based on cyber_esp.c
7 */
8
9
10#if defined(CONFIG_AMIGA) || defined(CONFIG_APUS)
11#define USE_BOTTOM_HALF
12#endif
13
14#include <linux/module.h>
15
16#include <linux/kernel.h>
17#include <linux/delay.h>
18#include <linux/types.h>
19#include <linux/string.h>
20#include <linux/slab.h>
21#include <linux/blkdev.h>
22#include <linux/proc_fs.h>
23#include <linux/stat.h>
24#include <linux/reboot.h>
25#include <asm/system.h>
26#include <asm/ptrace.h>
27#include <asm/pgtable.h>
28
29
30#include "scsi.h"
31#include <scsi/scsi_host.h>
32#include "NCR53C9x.h"
33
34#include <linux/zorro.h>
35#include <asm/irq.h>
36#include <asm/amigaints.h>
37#include <asm/amigahw.h>
38
39#ifdef USE_BOTTOM_HALF
40#include <linux/workqueue.h>
41#include <linux/interrupt.h>
42#endif
43
44/* The controller registers can be found in the Z2 config area at these
45 * offsets:
46 */
47#define OKTAGON_ESP_ADDR 0x03000
48#define OKTAGON_DMA_ADDR 0x01000
49
50
51static int  dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
52static int  dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp);
53static void dma_dump_state(struct NCR_ESP *esp);
54static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
55static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
56static void dma_ints_off(struct NCR_ESP *esp);
57static void dma_ints_on(struct NCR_ESP *esp);
58static int  dma_irq_p(struct NCR_ESP *esp);
59static void dma_led_off(struct NCR_ESP *esp);
60static void dma_led_on(struct NCR_ESP *esp);
61static int  dma_ports_p(struct NCR_ESP *esp);
62static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
63
64static void dma_irq_exit(struct NCR_ESP *esp);
65static void dma_invalidate(struct NCR_ESP *esp);
66
67static void dma_mmu_get_scsi_one(struct NCR_ESP *,Scsi_Cmnd *);
68static void dma_mmu_get_scsi_sgl(struct NCR_ESP *,Scsi_Cmnd *);
69static void dma_mmu_release_scsi_one(struct NCR_ESP *,Scsi_Cmnd *);
70static void dma_mmu_release_scsi_sgl(struct NCR_ESP *,Scsi_Cmnd *);
71static void dma_advance_sg(Scsi_Cmnd *);
72static int  oktagon_notify_reboot(struct notifier_block *this, unsigned long code, void *x);
73
74#ifdef USE_BOTTOM_HALF
75static void dma_commit(struct work_struct *unused);
76
77long oktag_to_io(long *paddr, long *addr, long len);
78long oktag_from_io(long *addr, long *paddr, long len);
79
80static DECLARE_WORK(tq_fake_dma, dma_commit);
81
82#define DMA_MAXTRANSFER 0x8000
83
84#else
85
86/*
87 * No bottom half. Use transfer directly from IRQ. Find a narrow path
88 * between too much IRQ overhead and clogging the IRQ for too long.
89 */
90
91#define DMA_MAXTRANSFER 0x1000
92
93#endif
94
95static struct notifier_block oktagon_notifier = {
96	oktagon_notify_reboot,
97	NULL,
98	0
99};
100
101static long *paddress;
102static long *address;
103static long len;
104static long dma_on;
105static int direction;
106static struct NCR_ESP *current_esp;
107
108
109static volatile unsigned char cmd_buffer[16];
110				/* This is where all commands are put
111				 * before they are trasfered to the ESP chip
112				 * via PIO.
113				 */
114
115/***************************************************************** Detection */
116int oktagon_esp_detect(struct scsi_host_template *tpnt)
117{
118	struct NCR_ESP *esp;
119	struct zorro_dev *z = NULL;
120	unsigned long address;
121	struct ESP_regs *eregs;
122
123	while ((z = zorro_find_device(ZORRO_PROD_BSC_OKTAGON_2008, z))) {
124	    unsigned long board = z->resource.start;
125	    if (request_mem_region(board+OKTAGON_ESP_ADDR,
126				   sizeof(struct ESP_regs), "NCR53C9x")) {
127		/*
128		 * It is a SCSI controller.
129		 * Hardwire Host adapter to SCSI ID 7
130		 */
131
132		address = (unsigned long)ZTWO_VADDR(board);
133		eregs = (struct ESP_regs *)(address + OKTAGON_ESP_ADDR);
134
135		/* This line was 5 lines lower */
136		esp = esp_allocate(tpnt, (void *)board + OKTAGON_ESP_ADDR, 0);
137
138		/* we have to shift the registers only one bit for oktagon */
139		esp->shift = 1;
140
141		esp_write(eregs->esp_cfg1, (ESP_CONFIG1_PENABLE | 7));
142		udelay(5);
143		if (esp_read(eregs->esp_cfg1) != (ESP_CONFIG1_PENABLE | 7))
144			return 0; /* Bail out if address did not hold data */
145
146		/* Do command transfer with programmed I/O */
147		esp->do_pio_cmds = 1;
148
149		/* Required functions */
150		esp->dma_bytes_sent = &dma_bytes_sent;
151		esp->dma_can_transfer = &dma_can_transfer;
152		esp->dma_dump_state = &dma_dump_state;
153		esp->dma_init_read = &dma_init_read;
154		esp->dma_init_write = &dma_init_write;
155		esp->dma_ints_off = &dma_ints_off;
156		esp->dma_ints_on = &dma_ints_on;
157		esp->dma_irq_p = &dma_irq_p;
158		esp->dma_ports_p = &dma_ports_p;
159		esp->dma_setup = &dma_setup;
160
161		/* Optional functions */
162		esp->dma_barrier = 0;
163		esp->dma_drain = 0;
164		esp->dma_invalidate = &dma_invalidate;
165		esp->dma_irq_entry = 0;
166		esp->dma_irq_exit = &dma_irq_exit;
167		esp->dma_led_on = &dma_led_on;
168		esp->dma_led_off = &dma_led_off;
169		esp->dma_poll = 0;
170		esp->dma_reset = 0;
171
172		esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
173		esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
174		esp->dma_mmu_release_scsi_one = &dma_mmu_release_scsi_one;
175		esp->dma_mmu_release_scsi_sgl = &dma_mmu_release_scsi_sgl;
176		esp->dma_advance_sg = &dma_advance_sg;
177
178		/* SCSI chip speed */
179		/* Looking at the quartz of the SCSI board... */
180		esp->cfreq = 25000000;
181
182		/* The DMA registers on the CyberStorm are mapped
183		 * relative to the device (i.e. in the same Zorro
184		 * I/O block).
185		 */
186		esp->dregs = (void *)(address + OKTAGON_DMA_ADDR);
187
188		paddress = (long *) esp->dregs;
189
190		/* ESP register base */
191		esp->eregs = eregs;
192
193		/* Set the command buffer */
194		esp->esp_command = (volatile unsigned char*) cmd_buffer;
195
196		/* Yes, the virtual address. See below. */
197		esp->esp_command_dvma = (__u32) cmd_buffer;
198
199		esp->irq = IRQ_AMIGA_PORTS;
200		request_irq(IRQ_AMIGA_PORTS, esp_intr, IRQF_SHARED,
201			    "BSC Oktagon SCSI", esp->ehost);
202
203		/* Figure out our scsi ID on the bus */
204		esp->scsi_id = 7;
205
206		/* We don't have a differential SCSI-bus. */
207		esp->diff = 0;
208
209		esp_initialize(esp);
210
211		printk("ESP_Oktagon Driver 1.1"
212#ifdef USE_BOTTOM_HALF
213		       " [BOTTOM_HALF]"
214#else
215		       " [IRQ]"
216#endif
217		       " registered.\n");
218		printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,esps_in_use);
219		esps_running = esps_in_use;
220		current_esp = esp;
221		register_reboot_notifier(&oktagon_notifier);
222		return esps_in_use;
223	    }
224	}
225	return 0;
226}
227
228
229/*
230 * On certain configurations the SCSI equipment gets confused on reboot,
231 * so we have to reset it then.
232 */
233
234static int
235oktagon_notify_reboot(struct notifier_block *this, unsigned long code, void *x)
236{
237  struct NCR_ESP *esp;
238
239  if((code == SYS_DOWN || code == SYS_HALT) && (esp = current_esp))
240   {
241    esp_bootup_reset(esp,esp->eregs);
242    udelay(500); /* Settle time. Maybe unnecessary. */
243   }
244  return NOTIFY_DONE;
245}
246
247
248
249#ifdef USE_BOTTOM_HALF
250
251
252
253
254static void dma_commit(struct work_struct *unused)
255{
256    long wait,len2,pos;
257    struct NCR_ESP *esp;
258
259    ESPDATA(("Transfer: %ld bytes, Address 0x%08lX, Direction: %d\n",
260         len,(long) address,direction));
261    dma_ints_off(current_esp);
262
263    pos = 0;
264    wait = 1;
265    if(direction) /* write? (memory to device) */
266     {
267      while(len > 0)
268       {
269        len2 = oktag_to_io(paddress, address+pos, len);
270	if(!len2)
271	 {
272	  if(wait > 1000)
273	   {
274	    printk("Expedited DMA exit (writing) %ld\n",len);
275	    break;
276	   }
277	  mdelay(wait);
278	  wait *= 2;
279	 }
280	pos += len2;
281	len -= len2*sizeof(long);
282       }
283     } else {
284      while(len > 0)
285       {
286        len2 = oktag_from_io(address+pos, paddress, len);
287	if(!len2)
288	 {
289	  if(wait > 1000)
290	   {
291	    printk("Expedited DMA exit (reading) %ld\n",len);
292	    break;
293	   }
294	  mdelay(wait);
295	  wait *= 2;
296	 }
297	pos += len2;
298	len -= len2*sizeof(long);
299       }
300     }
301
302    /* to make esp->shift work */
303    esp=current_esp;
304
305
306    /*
307     * Normally we just need to exit and wait for the interrupt to come.
308     * But at least one device (my Microtek ScanMaker 630) regularly mis-
309     * calculates the bytes it should send which is really ugly because
310     * it locks up the SCSI bus if not accounted for.
311     */
312
313    if(!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR))
314     {
315      long len = 100;
316      long trash[10];
317
318      /*
319       * Interrupt bit was not set. Either the device is just plain lazy
320       * so we give it a 10 ms chance or...
321       */
322      while(len-- && (!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR)))
323        udelay(100);
324
325
326      if(!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR))
327       {
328        /*
329	 * So we think that the transfer count is out of sync. Since we
330	 * have all we want we are happy and can ditch the trash.
331	 */
332
333        len = DMA_MAXTRANSFER;
334
335        while(len-- && (!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR)))
336          oktag_from_io(trash,paddress,2);
337
338        if(!(esp_read(current_esp->eregs->esp_status) & ESP_STAT_INTR))
339         {
340          /*
341           * Things really have gone wrong. If we leave the system in that
342           * state, the SCSI bus is locked forever. I hope that this will
343           * turn the system in a more or less running state.
344           */
345          printk("Device is bolixed, trying bus reset...\n");
346	  esp_bootup_reset(current_esp,current_esp->eregs);
347         }
348       }
349     }
350
351    ESPDATA(("Transfer_finale: do_data_finale should come\n"));
352
353    len = 0;
354    dma_on = 0;
355    dma_ints_on(current_esp);
356}
357
358#endif
359
360/************************************************************* DMA Functions */
361static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
362{
363	return fifo_count;
364}
365
366static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp)
367{
368	unsigned long sz = sp->SCp.this_residual;
369	if(sz > DMA_MAXTRANSFER)
370		sz = DMA_MAXTRANSFER;
371	return sz;
372}
373
374static void dma_dump_state(struct NCR_ESP *esp)
375{
376}
377
378/*
379 * What the f$@& is this?
380 *
381 * Some SCSI devices (like my Microtek ScanMaker 630 scanner) want to transfer
382 * more data than requested. How much? Dunno. So ditch the bogus data into
383 * the sink, hoping the device will advance to the next phase sooner or later.
384 *
385 *                         -- Carsten
386 */
387
388static long oktag_eva_buffer[16]; /* The data sink */
389
390static void oktag_check_dma(void)
391{
392  struct NCR_ESP *esp;
393
394  esp=current_esp;
395  if(!len)
396   {
397    address = oktag_eva_buffer;
398    len = 2;
399    /* esp_do_data sets them to zero like len */
400    esp_write(current_esp->eregs->esp_tclow,2);
401    esp_write(current_esp->eregs->esp_tcmed,0);
402   }
403}
404
405static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
406{
407	/* Zorro is noncached, everything else done using processor. */
408	/* cache_clear(addr, length); */
409
410	if(dma_on)
411	  panic("dma_init_read while dma process is initialized/running!\n");
412	direction = 0;
413	address = (long *) vaddress;
414	current_esp = esp;
415	len = length;
416	oktag_check_dma();
417        dma_on = 1;
418}
419
420static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
421{
422	/* cache_push(addr, length); */
423
424	if(dma_on)
425	  panic("dma_init_write while dma process is initialized/running!\n");
426	direction = 1;
427	address = (long *) vaddress;
428	current_esp = esp;
429	len = length;
430	oktag_check_dma();
431	dma_on = 1;
432}
433
434static void dma_ints_off(struct NCR_ESP *esp)
435{
436	disable_irq(esp->irq);
437}
438
439static void dma_ints_on(struct NCR_ESP *esp)
440{
441	enable_irq(esp->irq);
442}
443
444static int dma_irq_p(struct NCR_ESP *esp)
445{
446	/* It's important to check the DMA IRQ bit in the correct way! */
447	return (esp_read(esp->eregs->esp_status) & ESP_STAT_INTR);
448}
449
450static void dma_led_off(struct NCR_ESP *esp)
451{
452}
453
454static void dma_led_on(struct NCR_ESP *esp)
455{
456}
457
458static int dma_ports_p(struct NCR_ESP *esp)
459{
460	return ((amiga_custom.intenar) & IF_PORTS);
461}
462
463static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
464{
465	/* On the Sparc, DMA_ST_WRITE means "move data from device to memory"
466	 * so when (write) is true, it actually means READ!
467	 */
468	if(write){
469		dma_init_read(esp, addr, count);
470	} else {
471		dma_init_write(esp, addr, count);
472	}
473}
474
475/*
476 * IRQ entry when DMA transfer is ready to be started
477 */
478
479static void dma_irq_exit(struct NCR_ESP *esp)
480{
481#ifdef USE_BOTTOM_HALF
482	if(dma_on)
483	 {
484	  schedule_work(&tq_fake_dma);
485	 }
486#else
487	while(len && !dma_irq_p(esp))
488	 {
489	  if(direction)
490	    *paddress = *address++;
491	   else
492	    *address++ = *paddress;
493	  len -= (sizeof(long));
494	 }
495	len = 0;
496        dma_on = 0;
497#endif
498}
499
500/*
501 * IRQ entry when DMA has just finished
502 */
503
504static void dma_invalidate(struct NCR_ESP *esp)
505{
506}
507
508/*
509 * Since the processor does the data transfer we have to use the custom
510 * mmu interface to pass the virtual address, not the physical.
511 */
512
513void dma_mmu_get_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd *sp)
514{
515        sp->SCp.ptr =
516                sp->request_buffer;
517}
518
519void dma_mmu_get_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd *sp)
520{
521        sp->SCp.ptr = page_address(sp->SCp.buffer->page)+
522		      sp->SCp.buffer->offset;
523}
524
525void dma_mmu_release_scsi_one(struct NCR_ESP *esp, Scsi_Cmnd *sp)
526{
527}
528
529void dma_mmu_release_scsi_sgl(struct NCR_ESP *esp, Scsi_Cmnd *sp)
530{
531}
532
533void dma_advance_sg(Scsi_Cmnd *sp)
534{
535	sp->SCp.ptr = page_address(sp->SCp.buffer->page)+
536		      sp->SCp.buffer->offset;
537}
538
539
540#define HOSTS_C
541
542int oktagon_esp_release(struct Scsi_Host *instance)
543{
544#ifdef MODULE
545	unsigned long address = (unsigned long)((struct NCR_ESP *)instance->hostdata)->edev;
546	esp_release();
547	release_mem_region(address, sizeof(struct ESP_regs));
548	free_irq(IRQ_AMIGA_PORTS, esp_intr);
549	unregister_reboot_notifier(&oktagon_notifier);
550#endif
551	return 1;
552}
553
554
555static struct scsi_host_template driver_template = {
556	.proc_name		= "esp-oktagon",
557	.proc_info		= &esp_proc_info,
558	.name			= "BSC Oktagon SCSI",
559	.detect			= oktagon_esp_detect,
560	.slave_alloc		= esp_slave_alloc,
561	.slave_destroy		= esp_slave_destroy,
562	.release		= oktagon_esp_release,
563	.queuecommand		= esp_queue,
564	.eh_abort_handler	= esp_abort,
565	.eh_bus_reset_handler	= esp_reset,
566	.can_queue		= 7,
567	.this_id		= 7,
568	.sg_tablesize		= SG_ALL,
569	.cmd_per_lun		= 1,
570	.use_clustering		= ENABLE_CLUSTERING
571};
572
573
574#include "scsi_module.c"
575
576MODULE_LICENSE("GPL");
577