1/*
2 *  NCR53c406.c
3 *  Low-level SCSI driver for NCR53c406a chip.
4 *  Copyright (C) 1994, 1995, 1996 Normunds Saumanis (normunds@fi.ibm.com)
5 *
6 *  LILO command line usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]
7 *  Specify IRQ = 0 for non-interrupt driven mode.
8 *  FASTPIO = 1 for fast pio mode, 0 for slow mode.
9 *
10 *  This program is free software; you can redistribute it and/or modify it
11 *  under the terms of the GNU General Public License as published by the
12 *  Free Software Foundation; either version 2, or (at your option) any
13 *  later version.
14 *
15 *  This program is distributed in the hope that it will be useful, but
16 *  WITHOUT ANY WARRANTY; without even the implied warranty of
17 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18 *  General Public License for more details.
19 *
20 */
21
22#define NCR53C406A_DEBUG 0
23#define VERBOSE_NCR53C406A_DEBUG 0
24
25/* Set this to 1 for PIO mode (recommended) or to 0 for DMA mode */
26#define USE_PIO 1
27
28#define USE_BIOS 0
29				/* #define BIOS_ADDR 0xD8000 *//* define this if autoprobe fails */
30				/* #define PORT_BASE 0x330 *//* define this if autoprobe fails */
31				/* #define IRQ_LEV   0	*//* define this if autoprobe fails */
32#define DMA_CHAN  5		/* this is ignored if DMA is disabled */
33
34/* Set this to 0 if you encounter kernel lockups while transferring
35 * data in PIO mode */
36#define USE_FAST_PIO 1
37
38/* ============= End of user configurable parameters ============= */
39
40#include <linux/module.h>
41
42#include <linux/errno.h>
43#include <linux/ioport.h>
44#include <linux/interrupt.h>
45#include <linux/proc_fs.h>
46#include <linux/stat.h>
47#include <linux/init.h>
48#include <linux/bitops.h>
49#include <asm/io.h>
50#include <asm/dma.h>
51#include <asm/irq.h>
52
53#include <linux/blkdev.h>
54#include <linux/spinlock.h>
55#include "scsi.h"
56#include <scsi/scsi_host.h>
57
58/* ============================================================= */
59
60#define WATCHDOG 5000000
61
62#define SYNC_MODE 0		/* Synchronous transfer mode */
63
64#ifdef DEBUG
65#undef NCR53C406A_DEBUG
66#define NCR53C406A_DEBUG 1
67#endif
68
69#if USE_PIO
70#define USE_DMA 0
71#else
72#define USE_DMA 1
73#endif
74
75/* Default configuration */
76#define C1_IMG   0x07		/* ID=7 */
77#define C2_IMG   0x48		/* FE SCSI2 */
78#if USE_DMA
79#define C3_IMG   0x21		/* CDB TE */
80#else
81#define C3_IMG   0x20		/* CDB */
82#endif
83#define C4_IMG   0x04		/* ANE */
84#define C5_IMG   0xb6		/* AA PI SIE POL */
85
86#define REG0 (outb(C4_IMG, CONFIG4))
87#define REG1 (outb(C5_IMG, CONFIG5))
88
89#if NCR53C406A_DEBUG
90#define DEB(x) x
91#else
92#define DEB(x)
93#endif
94
95#if VERBOSE_NCR53C406A_DEBUG
96#define VDEB(x) x
97#else
98#define VDEB(x)
99#endif
100
101#define LOAD_DMA_COUNT(count) \
102  outb(count & 0xff, TC_LSB); \
103  outb((count >> 8) & 0xff, TC_MSB); \
104  outb((count >> 16) & 0xff, TC_HIGH);
105
106/* Chip commands */
107#define DMA_OP               0x80
108
109#define SCSI_NOP             0x00
110#define FLUSH_FIFO           0x01
111#define CHIP_RESET           0x02
112#define SCSI_RESET           0x03
113#define RESELECT             0x40
114#define SELECT_NO_ATN        0x41
115#define SELECT_ATN           0x42
116#define SELECT_ATN_STOP      0x43
117#define ENABLE_SEL           0x44
118#define DISABLE_SEL          0x45
119#define SELECT_ATN3          0x46
120#define RESELECT3            0x47
121#define TRANSFER_INFO        0x10
122#define INIT_CMD_COMPLETE    0x11
123#define MSG_ACCEPT           0x12
124#define TRANSFER_PAD         0x18
125#define SET_ATN              0x1a
126#define RESET_ATN            0x1b
127#define SEND_MSG             0x20
128#define SEND_STATUS          0x21
129#define SEND_DATA            0x22
130#define DISCONN_SEQ          0x23
131#define TERMINATE_SEQ        0x24
132#define TARG_CMD_COMPLETE    0x25
133#define DISCONN              0x27
134#define RECV_MSG             0x28
135#define RECV_CMD             0x29
136#define RECV_DATA            0x2a
137#define RECV_CMD_SEQ         0x2b
138#define TARGET_ABORT_DMA     0x04
139
140/*----------------------------------------------------------------*/
141/* the following will set the monitor border color (useful to find
142   where something crashed or gets stuck at */
143/* 1 = blue
144   2 = green
145   3 = cyan
146   4 = red
147   5 = magenta
148   6 = yellow
149   7 = white
150*/
151
152#if NCR53C406A_DEBUG
153#define rtrc(i) {inb(0x3da);outb(0x31,0x3c0);outb((i),0x3c0);}
154#else
155#define rtrc(i) {}
156#endif
157/*----------------------------------------------------------------*/
158
159enum Phase {
160	idle,
161	data_out,
162	data_in,
163	command_ph,
164	status_ph,
165	message_out,
166	message_in
167};
168
169/* Static function prototypes */
170static void NCR53c406a_intr(void *);
171static irqreturn_t do_NCR53c406a_intr(int, void *);
172static void chip_init(void);
173static void calc_port_addr(void);
174#ifndef IRQ_LEV
175static int irq_probe(void);
176#endif
177
178/* ================================================================= */
179
180#if USE_BIOS
181static void *bios_base;
182#endif
183
184#ifdef PORT_BASE
185static int port_base = PORT_BASE;
186#else
187static int port_base;
188#endif
189
190#ifdef IRQ_LEV
191static int irq_level = IRQ_LEV;
192#else
193static int irq_level = -1;	/* 0 is 'no irq', so use -1 for 'uninitialized' */
194#endif
195
196#if USE_DMA
197static int dma_chan;
198#endif
199
200#if USE_PIO
201static int fast_pio = USE_FAST_PIO;
202#endif
203
204static Scsi_Cmnd *current_SC;
205static char info_msg[256];
206
207/* ================================================================= */
208
209/* possible BIOS locations */
210#if USE_BIOS
211static void *addresses[] = {
212	(void *) 0xd8000,
213	(void *) 0xc8000
214};
215#define ADDRESS_COUNT ARRAY_SIZE(addresses)
216#endif				/* USE_BIOS */
217
218/* possible i/o port addresses */
219static unsigned short ports[] = { 0x230, 0x330, 0x280, 0x290, 0x330, 0x340, 0x300, 0x310, 0x348, 0x350 };
220#define PORT_COUNT ARRAY_SIZE(ports)
221
222#ifndef MODULE
223/* possible interrupt channels */
224static unsigned short intrs[] = { 10, 11, 12, 15 };
225#define INTR_COUNT ARRAY_SIZE(intrs)
226#endif /* !MODULE */
227
228/* signatures for NCR 53c406a based controllers */
229#if USE_BIOS
230struct signature {
231	char *signature;
232	int sig_offset;
233	int sig_length;
234} signatures[] __initdata = {
235	/*          1         2         3         4         5         6 */
236	/* 123456789012345678901234567890123456789012345678901234567890 */
237	{
238"Copyright (C) Acculogic, Inc.\r\n2.8M Diskette Extension Bios ver 4.04.03 03/01/1993", 61, 82},};
239
240#define SIGNATURE_COUNT ARRAY_SIZE(signatures)
241#endif				/* USE_BIOS */
242
243/* ============================================================ */
244
245/* Control Register Set 0 */
246static int TC_LSB;		/* transfer counter lsb         */
247static int TC_MSB;		/* transfer counter msb */
248static int SCSI_FIFO;		/* scsi fifo register   */
249static int CMD_REG;		/* command register             */
250static int STAT_REG;		/* status register              */
251static int DEST_ID;		/* selection/reselection bus id */
252static int INT_REG;		/* interrupt status register    */
253static int SRTIMOUT;		/* select/reselect timeout reg  */
254static int SEQ_REG;		/* sequence step register       */
255static int SYNCPRD;		/* synchronous transfer period  */
256static int FIFO_FLAGS;		/* indicates # of bytes in fifo */
257static int SYNCOFF;		/* synchronous offset register  */
258static int CONFIG1;		/* configuration register       */
259static int CLKCONV;		/* clock conversion reg */
260				/*static int TESTREG;*//* test mode register           */
261static int CONFIG2;		/* Configuration 2 Register     */
262static int CONFIG3;		/* Configuration 3 Register     */
263static int CONFIG4;		/* Configuration 4 Register     */
264static int TC_HIGH;		/* Transfer Counter High */
265				/*static int FIFO_BOTTOM;*//* Reserve FIFO byte register   */
266
267/* Control Register Set 1 */
268				/*static int JUMPER_SENSE;*//* Jumper sense port reg (r/w) */
269				/*static int SRAM_PTR;*//* SRAM address pointer reg (r/w) */
270				/*static int SRAM_DATA;*//* SRAM data register (r/w) */
271static int PIO_FIFO;		/* PIO FIFO registers (r/w) */
272				/*static int PIO_FIFO1;*//*  */
273				/*static int PIO_FIFO2;*//*  */
274				/*static int PIO_FIFO3;*//*  */
275static int PIO_STATUS;		/* PIO status (r/w) */
276				/*static int ATA_CMD;*//* ATA command/status reg (r/w) */
277				/*static int ATA_ERR;*//* ATA features/error register (r/w) */
278static int PIO_FLAG;		/* PIO flag interrupt enable (r/w) */
279static int CONFIG5;		/* Configuration 5 register (r/w) */
280				/*static int SIGNATURE;*//* Signature Register (r) */
281				/*static int CONFIG6;*//* Configuration 6 register (r) */
282
283/* ============================================================== */
284
285#if USE_DMA
286static __inline__ int NCR53c406a_dma_setup(unsigned char *ptr, unsigned int count, unsigned char mode)
287{
288	unsigned limit;
289	unsigned long flags = 0;
290
291	VDEB(printk("dma: before count=%d   ", count));
292	if (dma_chan <= 3) {
293		if (count > 65536)
294			count = 65536;
295		limit = 65536 - (((unsigned) ptr) & 0xFFFF);
296	} else {
297		if (count > (65536 << 1))
298			count = (65536 << 1);
299		limit = (65536 << 1) - (((unsigned) ptr) & 0x1FFFF);
300	}
301
302	if (count > limit)
303		count = limit;
304
305	VDEB(printk("after count=%d\n", count));
306	if ((count & 1) || (((unsigned) ptr) & 1))
307		panic("NCR53c406a: attempted unaligned DMA transfer\n");
308
309	flags = claim_dma_lock();
310	disable_dma(dma_chan);
311	clear_dma_ff(dma_chan);
312	set_dma_addr(dma_chan, (long) ptr);
313	set_dma_count(dma_chan, count);
314	set_dma_mode(dma_chan, mode);
315	enable_dma(dma_chan);
316	release_dma_lock(flags);
317
318	return count;
319}
320
321static __inline__ int NCR53c406a_dma_write(unsigned char *src, unsigned int count)
322{
323	return NCR53c406a_dma_setup(src, count, DMA_MODE_WRITE);
324}
325
326static __inline__ int NCR53c406a_dma_read(unsigned char *src, unsigned int count)
327{
328	return NCR53c406a_dma_setup(src, count, DMA_MODE_READ);
329}
330
331static __inline__ int NCR53c406a_dma_residual(void)
332{
333	register int tmp;
334	unsigned long flags;
335
336	flags = claim_dma_lock();
337	clear_dma_ff(dma_chan);
338	tmp = get_dma_residue(dma_chan);
339	release_dma_lock(flags);
340
341	return tmp;
342}
343#endif				/* USE_DMA */
344
345#if USE_PIO
346static __inline__ int NCR53c406a_pio_read(unsigned char *request, unsigned int reqlen)
347{
348	int i;
349	int len;		/* current scsi fifo size */
350
351	REG1;
352	while (reqlen) {
353		i = inb(PIO_STATUS);
354		/*    VDEB(printk("pio_status=%x\n", i)); */
355		if (i & 0x80)
356			return 0;
357
358		switch (i & 0x1e) {
359		default:
360		case 0x10:
361			len = 0;
362			break;
363		case 0x0:
364			len = 1;
365			break;
366		case 0x8:
367			len = 42;
368			break;
369		case 0xc:
370			len = 84;
371			break;
372		case 0xe:
373			len = 128;
374			break;
375		}
376
377		if ((i & 0x40) && len == 0) {	/* fifo empty and interrupt occurred */
378			return 0;
379		}
380
381		if (len) {
382			if (len > reqlen)
383				len = reqlen;
384
385			if (fast_pio && len > 3) {
386				insl(PIO_FIFO, request, len >> 2);
387				request += len & 0xfc;
388				reqlen -= len & 0xfc;
389			} else {
390				while (len--) {
391					*request++ = inb(PIO_FIFO);
392					reqlen--;
393				}
394			}
395		}
396	}
397	return 0;
398}
399
400static __inline__ int NCR53c406a_pio_write(unsigned char *request, unsigned int reqlen)
401{
402	int i = 0;
403	int len;		/* current scsi fifo size */
404
405	REG1;
406	while (reqlen && !(i & 0x40)) {
407		i = inb(PIO_STATUS);
408		/*    VDEB(printk("pio_status=%x\n", i)); */
409		if (i & 0x80)	/* error */
410			return 0;
411
412		switch (i & 0x1e) {
413		case 0x10:
414			len = 128;
415			break;
416		case 0x0:
417			len = 84;
418			break;
419		case 0x8:
420			len = 42;
421			break;
422		case 0xc:
423			len = 1;
424			break;
425		default:
426		case 0xe:
427			len = 0;
428			break;
429		}
430
431		if (len) {
432			if (len > reqlen)
433				len = reqlen;
434
435			if (fast_pio && len > 3) {
436				outsl(PIO_FIFO, request, len >> 2);
437				request += len & 0xfc;
438				reqlen -= len & 0xfc;
439			} else {
440				while (len--) {
441					outb(*request++, PIO_FIFO);
442					reqlen--;
443				}
444			}
445		}
446	}
447	return 0;
448}
449#endif				/* USE_PIO */
450
451static int __init NCR53c406a_detect(struct scsi_host_template * tpnt)
452{
453	int present = 0;
454	struct Scsi_Host *shpnt = NULL;
455#ifndef PORT_BASE
456	int i;
457#endif
458
459#if USE_BIOS
460	int ii, jj;
461	bios_base = 0;
462	/* look for a valid signature */
463	for (ii = 0; ii < ADDRESS_COUNT && !bios_base; ii++)
464		for (jj = 0; (jj < SIGNATURE_COUNT) && !bios_base; jj++)
465			if (!memcmp((void *) addresses[ii] + signatures[jj].sig_offset, (void *) signatures[jj].signature, (int) signatures[jj].sig_length))
466				bios_base = addresses[ii];
467
468	if (!bios_base) {
469		printk("NCR53c406a: BIOS signature not found\n");
470		return 0;
471	}
472
473	DEB(printk("NCR53c406a BIOS found at 0x%x\n", (unsigned int) bios_base);
474	    );
475#endif				/* USE_BIOS */
476
477#ifdef PORT_BASE
478	if (!request_region(port_base, 0x10, "NCR53c406a"))	/* ports already snatched */
479		port_base = 0;
480
481#else				/* autodetect */
482	if (port_base) {	/* LILO override */
483		if (!request_region(port_base, 0x10, "NCR53c406a"))
484			port_base = 0;
485	} else {
486		for (i = 0; i < PORT_COUNT && !port_base; i++) {
487			if (!request_region(ports[i], 0x10, "NCR53c406a")) {
488				DEB(printk("NCR53c406a: port 0x%x in use\n", ports[i]));
489			} else {
490				VDEB(printk("NCR53c406a: port 0x%x available\n", ports[i]));
491				outb(C5_IMG, ports[i] + 0x0d);	/* reg set 1 */
492				if ((inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) & 0xf8) == 0x58) {
493					port_base = ports[i];
494					VDEB(printk("NCR53c406a: Sig register valid\n"));
495					VDEB(printk("port_base=0x%x\n", port_base));
496					break;
497				}
498				release_region(ports[i], 0x10);
499			}
500		}
501	}
502#endif				/* PORT_BASE */
503
504	if (!port_base) {	/* no ports found */
505		printk("NCR53c406a: no available ports found\n");
506		return 0;
507	}
508
509	DEB(printk("NCR53c406a detected\n"));
510
511	calc_port_addr();
512	chip_init();
513
514#ifndef IRQ_LEV
515	if (irq_level < 0) {	/* LILO override if >= 0 */
516		irq_level = irq_probe();
517		if (irq_level < 0) {	/* Trouble */
518			printk("NCR53c406a: IRQ problem, irq_level=%d, giving up\n", irq_level);
519			goto err_release;
520		}
521	}
522#endif
523
524	DEB(printk("NCR53c406a: using port_base 0x%x\n", port_base));
525
526	present = 1;
527	tpnt->proc_name = "NCR53c406a";
528
529	shpnt = scsi_register(tpnt, 0);
530	if (!shpnt) {
531		printk("NCR53c406a: Unable to register host, giving up.\n");
532		goto err_release;
533	}
534
535	if (irq_level > 0) {
536		if (request_irq(irq_level, do_NCR53c406a_intr, 0, "NCR53c406a", shpnt)) {
537			printk("NCR53c406a: unable to allocate IRQ %d\n", irq_level);
538			goto err_free_scsi;
539		}
540		tpnt->can_queue = 1;
541		DEB(printk("NCR53c406a: allocated IRQ %d\n", irq_level));
542	} else if (irq_level == 0) {
543		tpnt->can_queue = 0;
544		DEB(printk("NCR53c406a: No interrupts detected\n"));
545		printk("NCR53c406a driver no longer supports polling interface\n");
546		printk("Please email linux-scsi@vger.kernel.org\n");
547
548#if USE_DMA
549		printk("NCR53c406a: No interrupts found and DMA mode defined. Giving up.\n");
550#endif				/* USE_DMA */
551		goto err_free_scsi;
552	} else {
553		DEB(printk("NCR53c406a: Shouldn't get here!\n"));
554		goto err_free_scsi;
555	}
556
557#if USE_DMA
558	dma_chan = DMA_CHAN;
559	if (request_dma(dma_chan, "NCR53c406a") != 0) {
560		printk("NCR53c406a: unable to allocate DMA channel %d\n", dma_chan);
561		goto err_free_irq;
562	}
563
564	DEB(printk("Allocated DMA channel %d\n", dma_chan));
565#endif				/* USE_DMA */
566
567	shpnt->irq = irq_level;
568	shpnt->io_port = port_base;
569	shpnt->n_io_port = 0x10;
570#if USE_DMA
571	shpnt->dma = dma_chan;
572#endif
573
574#if USE_DMA
575	sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, DMA channel %d.", port_base, irq_level, dma_chan);
576#else
577	sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, %s PIO mode.", port_base, irq_level, fast_pio ? "fast" : "slow");
578#endif
579
580	return (present);
581
582#if USE_DMA
583      err_free_irq:
584	if (irq_level)
585		free_irq(irq_level, shpnt);
586#endif
587      err_free_scsi:
588	scsi_unregister(shpnt);
589      err_release:
590	release_region(port_base, 0x10);
591	return 0;
592}
593
594static int NCR53c406a_release(struct Scsi_Host *shost)
595{
596	if (shost->irq)
597		free_irq(shost->irq, NULL);
598#ifdef USE_DMA
599	if (shost->dma_channel != 0xff)
600		free_dma(shost->dma_channel);
601#endif
602	if (shost->io_port && shost->n_io_port)
603		release_region(shost->io_port, shost->n_io_port);
604
605	scsi_unregister(shost);
606	return 0;
607}
608
609#ifndef MODULE
610/* called from init/main.c */
611static int __init NCR53c406a_setup(char *str)
612{
613	static size_t setup_idx = 0;
614	size_t i;
615	int ints[4];
616
617	DEB(printk("NCR53c406a: Setup called\n");
618	    );
619
620	if (setup_idx >= PORT_COUNT - 1) {
621		printk("NCR53c406a: Setup called too many times.  Bad LILO params?\n");
622		return 0;
623	}
624	get_options(str, 4, ints);
625	if (ints[0] < 1 || ints[0] > 3) {
626		printk("NCR53c406a: Malformed command line\n");
627		printk("NCR53c406a: Usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]\n");
628		return 0;
629	}
630	for (i = 0; i < PORT_COUNT && !port_base; i++)
631		if (ports[i] == ints[1]) {
632			port_base = ints[1];
633			DEB(printk("NCR53c406a: Specified port_base 0x%x\n", port_base);
634			    )
635		}
636	if (!port_base) {
637		printk("NCR53c406a: Invalid PORTBASE 0x%x specified\n", ints[1]);
638		return 0;
639	}
640
641	if (ints[0] > 1) {
642		if (ints[2] == 0) {
643			irq_level = 0;
644			DEB(printk("NCR53c406a: Specified irq %d\n", irq_level);
645			    )
646		} else
647			for (i = 0; i < INTR_COUNT && irq_level < 0; i++)
648				if (intrs[i] == ints[2]) {
649					irq_level = ints[2];
650					DEB(printk("NCR53c406a: Specified irq %d\n", port_base);
651					    )
652				}
653		if (irq_level < 0)
654			printk("NCR53c406a: Invalid IRQ %d specified\n", ints[2]);
655	}
656
657	if (ints[0] > 2)
658		fast_pio = ints[3];
659
660	DEB(printk("NCR53c406a: port_base=0x%x, irq=%d, fast_pio=%d\n", port_base, irq_level, fast_pio);)
661	return 1;
662}
663
664__setup("ncr53c406a=", NCR53c406a_setup);
665
666#endif /* !MODULE */
667
668static const char *NCR53c406a_info(struct Scsi_Host *SChost)
669{
670	DEB(printk("NCR53c406a_info called\n"));
671	return (info_msg);
672}
673
674
675static int NCR53c406a_queue(Scsi_Cmnd * SCpnt, void (*done) (Scsi_Cmnd *))
676{
677	int i;
678
679	VDEB(printk("NCR53c406a_queue called\n"));
680	DEB(printk("cmd=%02x, cmd_len=%02x, target=%02x, lun=%02x, bufflen=%d\n", SCpnt->cmnd[0], SCpnt->cmd_len, SCpnt->target, SCpnt->lun, SCpnt->request_bufflen));
681
682
683	current_SC = SCpnt;
684	current_SC->scsi_done = done;
685	current_SC->SCp.phase = command_ph;
686	current_SC->SCp.Status = 0;
687	current_SC->SCp.Message = 0;
688
689	/* We are locked here already by the mid layer */
690	REG0;
691	outb(scmd_id(SCpnt), DEST_ID);	/* set destination */
692	outb(FLUSH_FIFO, CMD_REG);	/* reset the fifos */
693
694	for (i = 0; i < SCpnt->cmd_len; i++) {
695		outb(SCpnt->cmnd[i], SCSI_FIFO);
696	}
697	outb(SELECT_NO_ATN, CMD_REG);
698
699	rtrc(1);
700	return 0;
701}
702
703static int NCR53c406a_host_reset(Scsi_Cmnd * SCpnt)
704{
705	DEB(printk("NCR53c406a_reset called\n"));
706
707	spin_lock_irq(SCpnt->device->host->host_lock);
708
709	outb(C4_IMG, CONFIG4);	/* Select reg set 0 */
710	outb(CHIP_RESET, CMD_REG);
711	outb(SCSI_NOP, CMD_REG);	/* required after reset */
712	outb(SCSI_RESET, CMD_REG);
713	chip_init();
714
715	rtrc(2);
716
717	spin_unlock_irq(SCpnt->device->host->host_lock);
718
719	return SUCCESS;
720}
721
722static int NCR53c406a_biosparm(struct scsi_device *disk,
723                               struct block_device *dev,
724			       sector_t capacity, int *info_array)
725{
726	int size;
727
728	DEB(printk("NCR53c406a_biosparm called\n"));
729
730	size = capacity;
731	info_array[0] = 64;	/* heads */
732	info_array[1] = 32;	/* sectors */
733	info_array[2] = size >> 11;	/* cylinders */
734	if (info_array[2] > 1024) {	/* big disk */
735		info_array[0] = 255;
736		info_array[1] = 63;
737		info_array[2] = size / (255 * 63);
738	}
739	return 0;
740}
741
742static irqreturn_t do_NCR53c406a_intr(int unused, void *dev_id)
743{
744	unsigned long flags;
745	struct Scsi_Host *dev = dev_id;
746
747	spin_lock_irqsave(dev->host_lock, flags);
748	NCR53c406a_intr(dev_id);
749	spin_unlock_irqrestore(dev->host_lock, flags);
750	return IRQ_HANDLED;
751}
752
753static void NCR53c406a_intr(void *dev_id)
754{
755	DEB(unsigned char fifo_size;
756	    )
757	    DEB(unsigned char seq_reg;
758	    )
759	unsigned char status, int_reg;
760#if USE_PIO
761	unsigned char pio_status;
762	struct scatterlist *sglist;
763	unsigned int sgcount;
764#endif
765
766	VDEB(printk("NCR53c406a_intr called\n"));
767
768#if USE_PIO
769	REG1;
770	pio_status = inb(PIO_STATUS);
771#endif
772	REG0;
773	status = inb(STAT_REG);
774	DEB(seq_reg = inb(SEQ_REG));
775	int_reg = inb(INT_REG);
776	DEB(fifo_size = inb(FIFO_FLAGS) & 0x1f);
777
778#if NCR53C406A_DEBUG
779	printk("status=%02x, seq_reg=%02x, int_reg=%02x, fifo_size=%02x", status, seq_reg, int_reg, fifo_size);
780#if USE_DMA
781	printk("\n");
782#else
783	printk(", pio=%02x\n", pio_status);
784#endif				/* USE_DMA */
785#endif				/* NCR53C406A_DEBUG */
786
787	if (int_reg & 0x80) {	/* SCSI reset intr */
788		rtrc(3);
789		DEB(printk("NCR53c406a: reset intr received\n"));
790		current_SC->SCp.phase = idle;
791		current_SC->result = DID_RESET << 16;
792		current_SC->scsi_done(current_SC);
793		return;
794	}
795#if USE_PIO
796	if (pio_status & 0x80) {
797		printk("NCR53C406A: Warning: PIO error!\n");
798		current_SC->SCp.phase = idle;
799		current_SC->result = DID_ERROR << 16;
800		current_SC->scsi_done(current_SC);
801		return;
802	}
803#endif				/* USE_PIO */
804
805	if (status & 0x20) {	/* Parity error */
806		printk("NCR53c406a: Warning: parity error!\n");
807		current_SC->SCp.phase = idle;
808		current_SC->result = DID_PARITY << 16;
809		current_SC->scsi_done(current_SC);
810		return;
811	}
812
813	if (status & 0x40) {	/* Gross error */
814		printk("NCR53c406a: Warning: gross error!\n");
815		current_SC->SCp.phase = idle;
816		current_SC->result = DID_ERROR << 16;
817		current_SC->scsi_done(current_SC);
818		return;
819	}
820
821	if (int_reg & 0x20) {	/* Disconnect */
822		DEB(printk("NCR53c406a: disconnect intr received\n"));
823		if (current_SC->SCp.phase != message_in) {	/* Unexpected disconnect */
824			current_SC->result = DID_NO_CONNECT << 16;
825		} else {	/* Command complete, return status and message */
826			current_SC->result = (current_SC->SCp.Status & 0xff)
827			    | ((current_SC->SCp.Message & 0xff) << 8) | (DID_OK << 16);
828		}
829
830		rtrc(0);
831		current_SC->SCp.phase = idle;
832		current_SC->scsi_done(current_SC);
833		return;
834	}
835
836	switch (status & 0x07) {	/* scsi phase */
837	case 0x00:		/* DATA-OUT */
838		if (int_reg & 0x10) {	/* Target requesting info transfer */
839			rtrc(5);
840			current_SC->SCp.phase = data_out;
841			VDEB(printk("NCR53c406a: Data-Out phase\n"));
842			outb(FLUSH_FIFO, CMD_REG);
843			LOAD_DMA_COUNT(current_SC->request_bufflen);	/* Max transfer size */
844#if USE_DMA			    /* No s/g support for DMA */
845			NCR53c406a_dma_write(current_SC->request_buffer, current_SC->request_bufflen);
846#endif				/* USE_DMA */
847			outb(TRANSFER_INFO | DMA_OP, CMD_REG);
848#if USE_PIO
849			if (!current_SC->use_sg)	/* Don't use scatter-gather */
850				NCR53c406a_pio_write(current_SC->request_buffer, current_SC->request_bufflen);
851			else {	/* use scatter-gather */
852				sgcount = current_SC->use_sg;
853				sglist = current_SC->request_buffer;
854				while (sgcount--) {
855					NCR53c406a_pio_write(page_address(sglist->page) + sglist->offset, sglist->length);
856					sglist++;
857				}
858			}
859			REG0;
860#endif				/* USE_PIO */
861		}
862		break;
863
864	case 0x01:		/* DATA-IN */
865		if (int_reg & 0x10) {	/* Target requesting info transfer */
866			rtrc(6);
867			current_SC->SCp.phase = data_in;
868			VDEB(printk("NCR53c406a: Data-In phase\n"));
869			outb(FLUSH_FIFO, CMD_REG);
870			LOAD_DMA_COUNT(current_SC->request_bufflen);	/* Max transfer size */
871#if USE_DMA			    /* No s/g support for DMA */
872			NCR53c406a_dma_read(current_SC->request_buffer, current_SC->request_bufflen);
873#endif				/* USE_DMA */
874			outb(TRANSFER_INFO | DMA_OP, CMD_REG);
875#if USE_PIO
876			if (!current_SC->use_sg)	/* Don't use scatter-gather */
877				NCR53c406a_pio_read(current_SC->request_buffer, current_SC->request_bufflen);
878			else {	/* Use scatter-gather */
879				sgcount = current_SC->use_sg;
880				sglist = current_SC->request_buffer;
881				while (sgcount--) {
882					NCR53c406a_pio_read(page_address(sglist->page) + sglist->offset, sglist->length);
883					sglist++;
884				}
885			}
886			REG0;
887#endif				/* USE_PIO */
888		}
889		break;
890
891	case 0x02:		/* COMMAND */
892		current_SC->SCp.phase = command_ph;
893		printk("NCR53c406a: Warning: Unknown interrupt occurred in command phase!\n");
894		break;
895
896	case 0x03:		/* STATUS */
897		rtrc(7);
898		current_SC->SCp.phase = status_ph;
899		VDEB(printk("NCR53c406a: Status phase\n"));
900		outb(FLUSH_FIFO, CMD_REG);
901		outb(INIT_CMD_COMPLETE, CMD_REG);
902		break;
903
904	case 0x04:		/* Reserved */
905	case 0x05:		/* Reserved */
906		printk("NCR53c406a: WARNING: Reserved phase!!!\n");
907		break;
908
909	case 0x06:		/* MESSAGE-OUT */
910		DEB(printk("NCR53c406a: Message-Out phase\n"));
911		current_SC->SCp.phase = message_out;
912		outb(SET_ATN, CMD_REG);	/* Reject the message */
913		outb(MSG_ACCEPT, CMD_REG);
914		break;
915
916	case 0x07:		/* MESSAGE-IN */
917		rtrc(4);
918		VDEB(printk("NCR53c406a: Message-In phase\n"));
919		current_SC->SCp.phase = message_in;
920
921		current_SC->SCp.Status = inb(SCSI_FIFO);
922		current_SC->SCp.Message = inb(SCSI_FIFO);
923
924		VDEB(printk("SCSI FIFO size=%d\n", inb(FIFO_FLAGS) & 0x1f));
925		DEB(printk("Status = %02x  Message = %02x\n", current_SC->SCp.Status, current_SC->SCp.Message));
926
927		if (current_SC->SCp.Message == SAVE_POINTERS || current_SC->SCp.Message == DISCONNECT) {
928			outb(SET_ATN, CMD_REG);	/* Reject message */
929			DEB(printk("Discarding SAVE_POINTERS message\n"));
930		}
931		outb(MSG_ACCEPT, CMD_REG);
932		break;
933	}
934}
935
936#ifndef IRQ_LEV
937static int irq_probe(void)
938{
939	int irqs, irq;
940	unsigned long i;
941
942	inb(INT_REG);		/* clear the interrupt register */
943	irqs = probe_irq_on();
944
945	/* Invalid command will cause an interrupt */
946	REG0;
947	outb(0xff, CMD_REG);
948
949	/* Wait for the interrupt to occur */
950	i = jiffies + WATCHDOG;
951	while (time_after(i, jiffies) && !(inb(STAT_REG) & 0x80))
952		barrier();
953	if (time_before_eq(i, jiffies)) {	/* Timed out, must be hardware trouble */
954		probe_irq_off(irqs);
955		return -1;
956	}
957
958	irq = probe_irq_off(irqs);
959
960	/* Kick the chip */
961	outb(CHIP_RESET, CMD_REG);
962	outb(SCSI_NOP, CMD_REG);
963	chip_init();
964
965	return irq;
966}
967#endif				/* IRQ_LEV */
968
969static void chip_init(void)
970{
971	REG1;
972#if USE_DMA
973	outb(0x00, PIO_STATUS);
974#else				/* USE_PIO */
975	outb(0x01, PIO_STATUS);
976#endif
977	outb(0x00, PIO_FLAG);
978
979	outb(C4_IMG, CONFIG4);	/* REG0; */
980	outb(C3_IMG, CONFIG3);
981	outb(C2_IMG, CONFIG2);
982	outb(C1_IMG, CONFIG1);
983
984	outb(0x05, CLKCONV);	/* clock conversion factor */
985	outb(0x9C, SRTIMOUT);	/* Selection timeout */
986	outb(0x05, SYNCPRD);	/* Synchronous transfer period */
987	outb(SYNC_MODE, SYNCOFF);	/* synchronous mode */
988}
989
990static void __init calc_port_addr(void)
991{
992	/* Control Register Set 0 */
993	TC_LSB = (port_base + 0x00);
994	TC_MSB = (port_base + 0x01);
995	SCSI_FIFO = (port_base + 0x02);
996	CMD_REG = (port_base + 0x03);
997	STAT_REG = (port_base + 0x04);
998	DEST_ID = (port_base + 0x04);
999	INT_REG = (port_base + 0x05);
1000	SRTIMOUT = (port_base + 0x05);
1001	SEQ_REG = (port_base + 0x06);
1002	SYNCPRD = (port_base + 0x06);
1003	FIFO_FLAGS = (port_base + 0x07);
1004	SYNCOFF = (port_base + 0x07);
1005	CONFIG1 = (port_base + 0x08);
1006	CLKCONV = (port_base + 0x09);
1007	/* TESTREG          = (port_base+0x0A); */
1008	CONFIG2 = (port_base + 0x0B);
1009	CONFIG3 = (port_base + 0x0C);
1010	CONFIG4 = (port_base + 0x0D);
1011	TC_HIGH = (port_base + 0x0E);
1012	/* FIFO_BOTTOM      = (port_base+0x0F); */
1013
1014	/* Control Register Set 1 */
1015	/* JUMPER_SENSE     = (port_base+0x00); */
1016	/* SRAM_PTR         = (port_base+0x01); */
1017	/* SRAM_DATA        = (port_base+0x02); */
1018	PIO_FIFO = (port_base + 0x04);
1019	/* PIO_FIFO1        = (port_base+0x05); */
1020	/* PIO_FIFO2        = (port_base+0x06); */
1021	/* PIO_FIFO3        = (port_base+0x07); */
1022	PIO_STATUS = (port_base + 0x08);
1023	/* ATA_CMD          = (port_base+0x09); */
1024	/* ATA_ERR          = (port_base+0x0A); */
1025	PIO_FLAG = (port_base + 0x0B);
1026	CONFIG5 = (port_base + 0x0D);
1027	/* SIGNATURE        = (port_base+0x0E); */
1028	/* CONFIG6          = (port_base+0x0F); */
1029}
1030
1031MODULE_LICENSE("GPL");
1032
1033/* NOTE:  scatter-gather support only works in PIO mode.
1034 * Use SG_NONE if DMA mode is enabled!
1035 */
1036
1037static struct scsi_host_template driver_template =
1038{
1039     .proc_name         	= "NCR53c406a"		/* proc_name */,
1040     .name              	= "NCR53c406a"		/* name */,
1041     .detect            	= NCR53c406a_detect	/* detect */,
1042     .release            	= NCR53c406a_release,
1043     .info              	= NCR53c406a_info		/* info */,
1044     .queuecommand      	= NCR53c406a_queue	/* queuecommand */,
1045     .eh_host_reset_handler     = NCR53c406a_host_reset	/* reset */,
1046     .bios_param        	= NCR53c406a_biosparm	/* biosparm */,
1047     .can_queue         	= 1			/* can_queue */,
1048     .this_id           	= 7			/* SCSI ID of the chip */,
1049     .sg_tablesize      	= 32			/*SG_ALL*/ /*SG_NONE*/,
1050     .cmd_per_lun       	= 1			/* commands per lun */,
1051     .unchecked_isa_dma 	= 1			/* unchecked_isa_dma */,
1052     .use_clustering    	= ENABLE_CLUSTERING
1053};
1054
1055#include "scsi_module.c"
1056
1057/*
1058 * Overrides for Emacs so that we get a uniform tabbing style.
1059 * Emacs will notice this stuff at the end of the file and automatically
1060 * adjust the settings for this buffer only.  This must remain at the end
1061 * of the file.
1062 * ---------------------------------------------------------------------------
1063 * Local variables:
1064 * c-indent-level: 4
1065 * c-brace-imaginary-offset: 0
1066 * c-brace-offset: -4
1067 * c-argdecl-indent: 4
1068 * c-label-offset: -4
1069 * c-continued-statement-offset: 4
1070 * c-continued-brace-offset: 0
1071 * indent-tabs-mode: nil
1072 * tab-width: 8
1073 * End:
1074 */
1075