1/*
2 * cardbus.c -- 16-bit PCMCIA core support
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * The initial developer of the original code is David A. Hinds
9 * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
10 * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
11 *
12 * (C) 1999		David A. Hinds
13 */
14
15/*
16 * Cardbus handling has been re-written to be more of a PCI bridge thing,
17 * and the PCI code basically does all the resource handling.
18 *
19 *		Linus, Jan 2000
20 */
21
22
23#include <linux/module.h>
24#include <linux/kernel.h>
25#include <linux/string.h>
26#include <linux/slab.h>
27#include <linux/mm.h>
28#include <linux/pci.h>
29#include <linux/ioport.h>
30#include <asm/irq.h>
31#include <asm/io.h>
32
33#define IN_CARD_SERVICES
34#include <pcmcia/cs_types.h>
35#include <pcmcia/ss.h>
36#include <pcmcia/cs.h>
37#include <pcmcia/bulkmem.h>
38#include <pcmcia/cistpl.h>
39#include "cs_internal.h"
40
41/*====================================================================*/
42
43/* Offsets in the Expansion ROM Image Header */
44#define ROM_SIGNATURE		0x0000	/* 2 bytes */
45#define ROM_DATA_PTR		0x0018	/* 2 bytes */
46
47/* Offsets in the CardBus PC Card Data Structure */
48#define PCDATA_SIGNATURE	0x0000	/* 4 bytes */
49#define PCDATA_VPD_PTR		0x0008	/* 2 bytes */
50#define PCDATA_LENGTH		0x000a	/* 2 bytes */
51#define PCDATA_REVISION		0x000c
52#define PCDATA_IMAGE_SZ		0x0010	/* 2 bytes */
53#define PCDATA_ROM_LEVEL	0x0012	/* 2 bytes */
54#define PCDATA_CODE_TYPE	0x0014
55#define PCDATA_INDICATOR	0x0015
56
57/*=====================================================================
58
59    Expansion ROM's have a special layout, and pointers specify an
60    image number and an offset within that image.  xlate_rom_addr()
61    converts an image/offset address to an absolute offset from the
62    ROM's base address.
63
64=====================================================================*/
65
66static u_int xlate_rom_addr(void __iomem *b, u_int addr)
67{
68	u_int img = 0, ofs = 0, sz;
69	u_short data;
70	while ((readb(b) == 0x55) && (readb(b + 1) == 0xaa)) {
71		if (img == (addr >> 28))
72			return (addr & 0x0fffffff) + ofs;
73		data = readb(b + ROM_DATA_PTR) + (readb(b + ROM_DATA_PTR + 1) << 8);
74		sz = 512 * (readb(b + data + PCDATA_IMAGE_SZ) +
75			    (readb(b + data + PCDATA_IMAGE_SZ + 1) << 8));
76		if ((sz == 0) || (readb(b + data + PCDATA_INDICATOR) & 0x80))
77			break;
78		b += sz;
79		ofs += sz;
80		img++;
81	}
82	return 0;
83}
84
85/*=====================================================================
86
87    These are similar to setup_cis_mem and release_cis_mem for 16-bit
88    cards.  The "result" that is used externally is the cb_cis_virt
89    pointer in the struct pcmcia_socket structure.
90
91=====================================================================*/
92
93static void cb_release_cis_mem(struct pcmcia_socket * s)
94{
95	if (s->cb_cis_virt) {
96		cs_dbg(s, 1, "cb_release_cis_mem()\n");
97		iounmap(s->cb_cis_virt);
98		s->cb_cis_virt = NULL;
99		s->cb_cis_res = NULL;
100	}
101}
102
103static int cb_setup_cis_mem(struct pcmcia_socket * s, struct resource *res)
104{
105	unsigned int start, size;
106
107	if (res == s->cb_cis_res)
108		return 0;
109
110	if (s->cb_cis_res)
111		cb_release_cis_mem(s);
112
113	start = res->start;
114	size = res->end - start + 1;
115	s->cb_cis_virt = ioremap(start, size);
116
117	if (!s->cb_cis_virt)
118		return -1;
119
120	s->cb_cis_res = res;
121
122	return 0;
123}
124
125/*=====================================================================
126
127    This is used by the CIS processing code to read CIS information
128    from a CardBus device.
129
130=====================================================================*/
131
132int read_cb_mem(struct pcmcia_socket * s, int space, u_int addr, u_int len, void *ptr)
133{
134	struct pci_dev *dev;
135	struct resource *res;
136
137	cs_dbg(s, 3, "read_cb_mem(%d, %#x, %u)\n", space, addr, len);
138
139	dev = pci_get_slot(s->cb_dev->subordinate, 0);
140	if (!dev)
141		goto fail;
142
143	/* Config space? */
144	if (space == 0) {
145		if (addr + len > 0x100)
146			goto fail;
147		for (; len; addr++, ptr++, len--)
148			pci_read_config_byte(dev, addr, ptr);
149		return 0;
150	}
151
152	res = dev->resource + space - 1;
153
154	pci_dev_put(dev);
155
156	if (!res->flags)
157		goto fail;
158
159	if (cb_setup_cis_mem(s, res) != 0)
160		goto fail;
161
162	if (space == 7) {
163		addr = xlate_rom_addr(s->cb_cis_virt, addr);
164		if (addr == 0)
165			goto fail;
166	}
167
168	if (addr + len > res->end - res->start)
169		goto fail;
170
171	memcpy_fromio(ptr, s->cb_cis_virt + addr, len);
172	return 0;
173
174fail:
175	memset(ptr, 0xff, len);
176	return -1;
177}
178
179/*=====================================================================
180
181    cb_alloc() and cb_free() allocate and free the kernel data
182    structures for a Cardbus device, and handle the lowest level PCI
183    device setup issues.
184
185=====================================================================*/
186
187/*
188 * Since there is only one interrupt available to CardBus
189 * devices, all devices downstream of this device must
190 * be using this IRQ.
191 */
192static void cardbus_assign_irqs(struct pci_bus *bus, int irq)
193{
194	struct pci_dev *dev;
195
196	list_for_each_entry(dev, &bus->devices, bus_list) {
197		u8 irq_pin;
198
199		pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
200		if (irq_pin) {
201			dev->irq = irq;
202			pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
203		}
204
205		if (dev->subordinate)
206			cardbus_assign_irqs(dev->subordinate, irq);
207	}
208}
209
210int cb_alloc(struct pcmcia_socket * s)
211{
212	struct pci_bus *bus = s->cb_dev->subordinate;
213	struct pci_dev *dev;
214	unsigned int max, pass;
215
216	s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
217//	pcibios_fixup_bus(bus);
218
219	max = bus->secondary;
220	for (pass = 0; pass < 2; pass++)
221		list_for_each_entry(dev, &bus->devices, bus_list)
222			if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
223			    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
224				max = pci_scan_bridge(bus, dev, max, pass);
225
226	/*
227	 * Size all resources below the CardBus controller.
228	 */
229	pci_bus_size_bridges(bus);
230	pci_bus_assign_resources(bus);
231	cardbus_assign_irqs(bus, s->pci_irq);
232
233	/* socket specific tune function */
234	if (s->tune_bridge)
235		s->tune_bridge(s, bus);
236
237	pci_enable_bridges(bus);
238	pci_bus_add_devices(bus);
239
240	s->irq.AssignedIRQ = s->pci_irq;
241	return CS_SUCCESS;
242}
243
244void cb_free(struct pcmcia_socket * s)
245{
246	struct pci_dev *bridge = s->cb_dev;
247
248	cb_release_cis_mem(s);
249
250	if (bridge)
251		pci_remove_behind_bridge(bridge);
252}
253