1/* 2 * wanXL serial card driver for Linux 3 * host part 4 * 5 * Copyright (C) 2003 Krzysztof Halasa <khc@pm.waw.pl> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of version 2 of the GNU General Public License 9 * as published by the Free Software Foundation. 10 * 11 * Status: 12 * - Only DTE (external clock) support with NRZ and NRZI encodings 13 * - wanXL100 will require minor driver modifications, no access to hw 14 */ 15 16#include <linux/module.h> 17#include <linux/kernel.h> 18#include <linux/slab.h> 19#include <linux/sched.h> 20#include <linux/types.h> 21#include <linux/fcntl.h> 22#include <linux/string.h> 23#include <linux/errno.h> 24#include <linux/init.h> 25#include <linux/ioport.h> 26#include <linux/netdevice.h> 27#include <linux/hdlc.h> 28#include <linux/pci.h> 29#include <linux/dma-mapping.h> 30#include <linux/delay.h> 31#include <asm/io.h> 32 33#include "wanxl.h" 34 35static const char* version = "wanXL serial card driver version: 0.48"; 36 37#define PLX_CTL_RESET 0x40000000 /* adapter reset */ 38 39#undef DEBUG_PKT 40#undef DEBUG_PCI 41 42/* MAILBOX #1 - PUTS COMMANDS */ 43#define MBX1_CMD_ABORTJ 0x85000000 /* Abort and Jump */ 44#ifdef __LITTLE_ENDIAN 45#define MBX1_CMD_BSWAP 0x8C000001 /* little-endian Byte Swap Mode */ 46#else 47#define MBX1_CMD_BSWAP 0x8C000000 /* big-endian Byte Swap Mode */ 48#endif 49 50/* MAILBOX #2 - DRAM SIZE */ 51#define MBX2_MEMSZ_MASK 0xFFFF0000 /* PUTS Memory Size Register mask */ 52 53 54typedef struct { 55 struct net_device *dev; 56 struct card_t *card; 57 spinlock_t lock; /* for wanxl_xmit */ 58 int node; /* physical port #0 - 3 */ 59 unsigned int clock_type; 60 int tx_in, tx_out; 61 struct sk_buff *tx_skbs[TX_BUFFERS]; 62}port_t; 63 64 65typedef struct { 66 desc_t rx_descs[RX_QUEUE_LENGTH]; 67 port_status_t port_status[4]; 68}card_status_t; 69 70 71typedef struct card_t { 72 int n_ports; /* 1, 2 or 4 ports */ 73 u8 irq; 74 75 u8 __iomem *plx; /* PLX PCI9060 virtual base address */ 76 struct pci_dev *pdev; /* for pci_name(pdev) */ 77 int rx_in; 78 struct sk_buff *rx_skbs[RX_QUEUE_LENGTH]; 79 card_status_t *status; /* shared between host and card */ 80 dma_addr_t status_address; 81 port_t ports[0]; /* 1 - 4 port_t structures follow */ 82}card_t; 83 84 85 86static inline port_t* dev_to_port(struct net_device *dev) 87{ 88 return (port_t *)dev_to_hdlc(dev)->priv; 89} 90 91 92static inline port_status_t* get_status(port_t *port) 93{ 94 return &port->card->status->port_status[port->node]; 95} 96 97 98#ifdef DEBUG_PCI 99static inline dma_addr_t pci_map_single_debug(struct pci_dev *pdev, void *ptr, 100 size_t size, int direction) 101{ 102 dma_addr_t addr = pci_map_single(pdev, ptr, size, direction); 103 if (addr + size > 0x100000000LL) 104 printk(KERN_CRIT "wanXL %s: pci_map_single() returned memory" 105 " at 0x%LX!\n", pci_name(pdev), 106 (unsigned long long)addr); 107 return addr; 108} 109 110#undef pci_map_single 111#define pci_map_single pci_map_single_debug 112#endif 113 114 115/* Cable and/or personality module change interrupt service */ 116static inline void wanxl_cable_intr(port_t *port) 117{ 118 u32 value = get_status(port)->cable; 119 int valid = 1; 120 const char *cable, *pm, *dte = "", *dsr = "", *dcd = ""; 121 122 switch(value & 0x7) { 123 case STATUS_CABLE_V35: cable = "V.35"; break; 124 case STATUS_CABLE_X21: cable = "X.21"; break; 125 case STATUS_CABLE_V24: cable = "V.24"; break; 126 case STATUS_CABLE_EIA530: cable = "EIA530"; break; 127 case STATUS_CABLE_NONE: cable = "no"; break; 128 default: cable = "invalid"; 129 } 130 131 switch((value >> STATUS_CABLE_PM_SHIFT) & 0x7) { 132 case STATUS_CABLE_V35: pm = "V.35"; break; 133 case STATUS_CABLE_X21: pm = "X.21"; break; 134 case STATUS_CABLE_V24: pm = "V.24"; break; 135 case STATUS_CABLE_EIA530: pm = "EIA530"; break; 136 case STATUS_CABLE_NONE: pm = "no personality"; valid = 0; break; 137 default: pm = "invalid personality"; valid = 0; 138 } 139 140 if (valid) { 141 if ((value & 7) == ((value >> STATUS_CABLE_PM_SHIFT) & 7)) { 142 dsr = (value & STATUS_CABLE_DSR) ? ", DSR ON" : 143 ", DSR off"; 144 dcd = (value & STATUS_CABLE_DCD) ? ", carrier ON" : 145 ", carrier off"; 146 } 147 dte = (value & STATUS_CABLE_DCE) ? " DCE" : " DTE"; 148 } 149 printk(KERN_INFO "%s: %s%s module, %s cable%s%s\n", 150 port->dev->name, pm, dte, cable, dsr, dcd); 151 152 if (value & STATUS_CABLE_DCD) 153 netif_carrier_on(port->dev); 154 else 155 netif_carrier_off(port->dev); 156} 157 158 159 160/* Transmit complete interrupt service */ 161static inline void wanxl_tx_intr(port_t *port) 162{ 163 struct net_device *dev = port->dev; 164 struct net_device_stats *stats = hdlc_stats(dev); 165 while (1) { 166 desc_t *desc = &get_status(port)->tx_descs[port->tx_in]; 167 struct sk_buff *skb = port->tx_skbs[port->tx_in]; 168 169 switch (desc->stat) { 170 case PACKET_FULL: 171 case PACKET_EMPTY: 172 netif_wake_queue(dev); 173 return; 174 175 case PACKET_UNDERRUN: 176 stats->tx_errors++; 177 stats->tx_fifo_errors++; 178 break; 179 180 default: 181 stats->tx_packets++; 182 stats->tx_bytes += skb->len; 183 } 184 desc->stat = PACKET_EMPTY; /* Free descriptor */ 185 pci_unmap_single(port->card->pdev, desc->address, skb->len, 186 PCI_DMA_TODEVICE); 187 dev_kfree_skb_irq(skb); 188 port->tx_in = (port->tx_in + 1) % TX_BUFFERS; 189 } 190} 191 192 193 194/* Receive complete interrupt service */ 195static inline void wanxl_rx_intr(card_t *card) 196{ 197 desc_t *desc; 198 while (desc = &card->status->rx_descs[card->rx_in], 199 desc->stat != PACKET_EMPTY) { 200 if ((desc->stat & PACKET_PORT_MASK) > card->n_ports) 201 printk(KERN_CRIT "wanXL %s: received packet for" 202 " nonexistent port\n", pci_name(card->pdev)); 203 else { 204 struct sk_buff *skb = card->rx_skbs[card->rx_in]; 205 port_t *port = &card->ports[desc->stat & 206 PACKET_PORT_MASK]; 207 struct net_device *dev = port->dev; 208 struct net_device_stats *stats = hdlc_stats(dev); 209 210 if (!skb) 211 stats->rx_dropped++; 212 else { 213 pci_unmap_single(card->pdev, desc->address, 214 BUFFER_LENGTH, 215 PCI_DMA_FROMDEVICE); 216 skb_put(skb, desc->length); 217 218#ifdef DEBUG_PKT 219 printk(KERN_DEBUG "%s RX(%i):", dev->name, 220 skb->len); 221 debug_frame(skb); 222#endif 223 stats->rx_packets++; 224 stats->rx_bytes += skb->len; 225 dev->last_rx = jiffies; 226 skb->protocol = hdlc_type_trans(skb, dev); 227 netif_rx(skb); 228 skb = NULL; 229 } 230 231 if (!skb) { 232 skb = dev_alloc_skb(BUFFER_LENGTH); 233 desc->address = skb ? 234 pci_map_single(card->pdev, skb->data, 235 BUFFER_LENGTH, 236 PCI_DMA_FROMDEVICE) : 0; 237 card->rx_skbs[card->rx_in] = skb; 238 } 239 } 240 desc->stat = PACKET_EMPTY; /* Free descriptor */ 241 card->rx_in = (card->rx_in + 1) % RX_QUEUE_LENGTH; 242 } 243} 244 245 246 247static irqreturn_t wanxl_intr(int irq, void* dev_id) 248{ 249 card_t *card = dev_id; 250 int i; 251 u32 stat; 252 int handled = 0; 253 254 255 while((stat = readl(card->plx + PLX_DOORBELL_FROM_CARD)) != 0) { 256 handled = 1; 257 writel(stat, card->plx + PLX_DOORBELL_FROM_CARD); 258 259 for (i = 0; i < card->n_ports; i++) { 260 if (stat & (1 << (DOORBELL_FROM_CARD_TX_0 + i))) 261 wanxl_tx_intr(&card->ports[i]); 262 if (stat & (1 << (DOORBELL_FROM_CARD_CABLE_0 + i))) 263 wanxl_cable_intr(&card->ports[i]); 264 } 265 if (stat & (1 << DOORBELL_FROM_CARD_RX)) 266 wanxl_rx_intr(card); 267 } 268 269 return IRQ_RETVAL(handled); 270} 271 272 273 274static int wanxl_xmit(struct sk_buff *skb, struct net_device *dev) 275{ 276 port_t *port = dev_to_port(dev); 277 desc_t *desc; 278 279 spin_lock(&port->lock); 280 281 desc = &get_status(port)->tx_descs[port->tx_out]; 282 if (desc->stat != PACKET_EMPTY) { 283 /* should never happen - previous xmit should stop queue */ 284#ifdef DEBUG_PKT 285 printk(KERN_DEBUG "%s: transmitter buffer full\n", dev->name); 286#endif 287 netif_stop_queue(dev); 288 spin_unlock_irq(&port->lock); 289 return 1; /* request packet to be queued */ 290 } 291 292#ifdef DEBUG_PKT 293 printk(KERN_DEBUG "%s TX(%i):", dev->name, skb->len); 294 debug_frame(skb); 295#endif 296 297 port->tx_skbs[port->tx_out] = skb; 298 desc->address = pci_map_single(port->card->pdev, skb->data, skb->len, 299 PCI_DMA_TODEVICE); 300 desc->length = skb->len; 301 desc->stat = PACKET_FULL; 302 writel(1 << (DOORBELL_TO_CARD_TX_0 + port->node), 303 port->card->plx + PLX_DOORBELL_TO_CARD); 304 dev->trans_start = jiffies; 305 306 port->tx_out = (port->tx_out + 1) % TX_BUFFERS; 307 308 if (get_status(port)->tx_descs[port->tx_out].stat != PACKET_EMPTY) { 309 netif_stop_queue(dev); 310#ifdef DEBUG_PKT 311 printk(KERN_DEBUG "%s: transmitter buffer full\n", dev->name); 312#endif 313 } 314 315 spin_unlock(&port->lock); 316 return 0; 317} 318 319 320 321static int wanxl_attach(struct net_device *dev, unsigned short encoding, 322 unsigned short parity) 323{ 324 port_t *port = dev_to_port(dev); 325 326 if (encoding != ENCODING_NRZ && 327 encoding != ENCODING_NRZI) 328 return -EINVAL; 329 330 if (parity != PARITY_NONE && 331 parity != PARITY_CRC32_PR1_CCITT && 332 parity != PARITY_CRC16_PR1_CCITT && 333 parity != PARITY_CRC32_PR0_CCITT && 334 parity != PARITY_CRC16_PR0_CCITT) 335 return -EINVAL; 336 337 get_status(port)->encoding = encoding; 338 get_status(port)->parity = parity; 339 return 0; 340} 341 342 343 344static int wanxl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 345{ 346 const size_t size = sizeof(sync_serial_settings); 347 sync_serial_settings line; 348 port_t *port = dev_to_port(dev); 349 350 if (cmd != SIOCWANDEV) 351 return hdlc_ioctl(dev, ifr, cmd); 352 353 switch (ifr->ifr_settings.type) { 354 case IF_GET_IFACE: 355 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL; 356 if (ifr->ifr_settings.size < size) { 357 ifr->ifr_settings.size = size; /* data size wanted */ 358 return -ENOBUFS; 359 } 360 line.clock_type = get_status(port)->clocking; 361 line.clock_rate = 0; 362 line.loopback = 0; 363 364 if (copy_to_user(ifr->ifr_settings.ifs_ifsu.sync, &line, size)) 365 return -EFAULT; 366 return 0; 367 368 case IF_IFACE_SYNC_SERIAL: 369 if (!capable(CAP_NET_ADMIN)) 370 return -EPERM; 371 if (dev->flags & IFF_UP) 372 return -EBUSY; 373 374 if (copy_from_user(&line, ifr->ifr_settings.ifs_ifsu.sync, 375 size)) 376 return -EFAULT; 377 378 if (line.clock_type != CLOCK_EXT && 379 line.clock_type != CLOCK_TXFROMRX) 380 return -EINVAL; /* No such clock setting */ 381 382 if (line.loopback != 0) 383 return -EINVAL; 384 385 get_status(port)->clocking = line.clock_type; 386 return 0; 387 388 default: 389 return hdlc_ioctl(dev, ifr, cmd); 390 } 391} 392 393 394 395static int wanxl_open(struct net_device *dev) 396{ 397 port_t *port = dev_to_port(dev); 398 u8 __iomem *dbr = port->card->plx + PLX_DOORBELL_TO_CARD; 399 unsigned long timeout; 400 int i; 401 402 if (get_status(port)->open) { 403 printk(KERN_ERR "%s: port already open\n", dev->name); 404 return -EIO; 405 } 406 if ((i = hdlc_open(dev)) != 0) 407 return i; 408 409 port->tx_in = port->tx_out = 0; 410 for (i = 0; i < TX_BUFFERS; i++) 411 get_status(port)->tx_descs[i].stat = PACKET_EMPTY; 412 /* signal the card */ 413 writel(1 << (DOORBELL_TO_CARD_OPEN_0 + port->node), dbr); 414 415 timeout = jiffies + HZ; 416 do 417 if (get_status(port)->open) { 418 netif_start_queue(dev); 419 return 0; 420 } 421 while (time_after(timeout, jiffies)); 422 423 printk(KERN_ERR "%s: unable to open port\n", dev->name); 424 /* ask the card to close the port, should it be still alive */ 425 writel(1 << (DOORBELL_TO_CARD_CLOSE_0 + port->node), dbr); 426 return -EFAULT; 427} 428 429 430 431static int wanxl_close(struct net_device *dev) 432{ 433 port_t *port = dev_to_port(dev); 434 unsigned long timeout; 435 int i; 436 437 hdlc_close(dev); 438 /* signal the card */ 439 writel(1 << (DOORBELL_TO_CARD_CLOSE_0 + port->node), 440 port->card->plx + PLX_DOORBELL_TO_CARD); 441 442 timeout = jiffies + HZ; 443 do 444 if (!get_status(port)->open) 445 break; 446 while (time_after(timeout, jiffies)); 447 448 if (get_status(port)->open) 449 printk(KERN_ERR "%s: unable to close port\n", dev->name); 450 451 netif_stop_queue(dev); 452 453 for (i = 0; i < TX_BUFFERS; i++) { 454 desc_t *desc = &get_status(port)->tx_descs[i]; 455 456 if (desc->stat != PACKET_EMPTY) { 457 desc->stat = PACKET_EMPTY; 458 pci_unmap_single(port->card->pdev, desc->address, 459 port->tx_skbs[i]->len, 460 PCI_DMA_TODEVICE); 461 dev_kfree_skb(port->tx_skbs[i]); 462 } 463 } 464 return 0; 465} 466 467 468 469static struct net_device_stats *wanxl_get_stats(struct net_device *dev) 470{ 471 struct net_device_stats *stats = hdlc_stats(dev); 472 port_t *port = dev_to_port(dev); 473 474 stats->rx_over_errors = get_status(port)->rx_overruns; 475 stats->rx_frame_errors = get_status(port)->rx_frame_errors; 476 stats->rx_errors = stats->rx_over_errors + stats->rx_frame_errors; 477 return stats; 478} 479 480 481 482static int wanxl_puts_command(card_t *card, u32 cmd) 483{ 484 unsigned long timeout = jiffies + 5 * HZ; 485 486 writel(cmd, card->plx + PLX_MAILBOX_1); 487 do { 488 if (readl(card->plx + PLX_MAILBOX_1) == 0) 489 return 0; 490 491 schedule(); 492 }while (time_after(timeout, jiffies)); 493 494 return -1; 495} 496 497 498 499static void wanxl_reset(card_t *card) 500{ 501 u32 old_value = readl(card->plx + PLX_CONTROL) & ~PLX_CTL_RESET; 502 503 writel(0x80, card->plx + PLX_MAILBOX_0); 504 writel(old_value | PLX_CTL_RESET, card->plx + PLX_CONTROL); 505 readl(card->plx + PLX_CONTROL); /* wait for posted write */ 506 udelay(1); 507 writel(old_value, card->plx + PLX_CONTROL); 508 readl(card->plx + PLX_CONTROL); /* wait for posted write */ 509} 510 511 512 513static void wanxl_pci_remove_one(struct pci_dev *pdev) 514{ 515 card_t *card = pci_get_drvdata(pdev); 516 int i; 517 518 for (i = 0; i < card->n_ports; i++) { 519 unregister_hdlc_device(card->ports[i].dev); 520 free_netdev(card->ports[i].dev); 521 } 522 523 /* unregister and free all host resources */ 524 if (card->irq) 525 free_irq(card->irq, card); 526 527 wanxl_reset(card); 528 529 for (i = 0; i < RX_QUEUE_LENGTH; i++) 530 if (card->rx_skbs[i]) { 531 pci_unmap_single(card->pdev, 532 card->status->rx_descs[i].address, 533 BUFFER_LENGTH, PCI_DMA_FROMDEVICE); 534 dev_kfree_skb(card->rx_skbs[i]); 535 } 536 537 if (card->plx) 538 iounmap(card->plx); 539 540 if (card->status) 541 pci_free_consistent(pdev, sizeof(card_status_t), 542 card->status, card->status_address); 543 544 pci_release_regions(pdev); 545 pci_disable_device(pdev); 546 pci_set_drvdata(pdev, NULL); 547 kfree(card); 548} 549 550 551#include "wanxlfw.inc" 552 553static int __devinit wanxl_pci_init_one(struct pci_dev *pdev, 554 const struct pci_device_id *ent) 555{ 556 card_t *card; 557 u32 ramsize, stat; 558 unsigned long timeout; 559 u32 plx_phy; /* PLX PCI base address */ 560 u32 mem_phy; /* memory PCI base addr */ 561 u8 __iomem *mem; /* memory virtual base addr */ 562 int i, ports, alloc_size; 563 564#ifndef MODULE 565 static int printed_version; 566 if (!printed_version) { 567 printed_version++; 568 printk(KERN_INFO "%s\n", version); 569 } 570#endif 571 572 i = pci_enable_device(pdev); 573 if (i) 574 return i; 575 576 /* QUICC can only access first 256 MB of host RAM directly, 577 but PLX9060 DMA does 32-bits for actual packet data transfers */ 578 579 if (pci_set_consistent_dma_mask(pdev, DMA_28BIT_MASK) || 580 pci_set_dma_mask(pdev, DMA_28BIT_MASK)) { 581 printk(KERN_ERR "wanXL: No usable DMA configuration\n"); 582 return -EIO; 583 } 584 585 i = pci_request_regions(pdev, "wanXL"); 586 if (i) { 587 pci_disable_device(pdev); 588 return i; 589 } 590 591 switch (pdev->device) { 592 case PCI_DEVICE_ID_SBE_WANXL100: ports = 1; break; 593 case PCI_DEVICE_ID_SBE_WANXL200: ports = 2; break; 594 default: ports = 4; 595 } 596 597 alloc_size = sizeof(card_t) + ports * sizeof(port_t); 598 card = kmalloc(alloc_size, GFP_KERNEL); 599 if (card == NULL) { 600 printk(KERN_ERR "wanXL %s: unable to allocate memory\n", 601 pci_name(pdev)); 602 pci_release_regions(pdev); 603 pci_disable_device(pdev); 604 return -ENOBUFS; 605 } 606 memset(card, 0, alloc_size); 607 608 pci_set_drvdata(pdev, card); 609 card->pdev = pdev; 610 611 card->status = pci_alloc_consistent(pdev, sizeof(card_status_t), 612 &card->status_address); 613 if (card->status == NULL) { 614 wanxl_pci_remove_one(pdev); 615 return -ENOBUFS; 616 } 617 618#ifdef DEBUG_PCI 619 printk(KERN_DEBUG "wanXL %s: pci_alloc_consistent() returned memory" 620 " at 0x%LX\n", pci_name(pdev), 621 (unsigned long long)card->status_address); 622#endif 623 624 if (pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK) || 625 pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { 626 printk(KERN_ERR "wanXL: No usable DMA configuration\n"); 627 wanxl_pci_remove_one(pdev); 628 return -EIO; 629 } 630 631 /* set up PLX mapping */ 632 plx_phy = pci_resource_start(pdev, 0); 633 634 card->plx = ioremap_nocache(plx_phy, 0x70); 635 if (!card->plx) { 636 printk(KERN_ERR "wanxl: ioremap() failed\n"); 637 wanxl_pci_remove_one(pdev); 638 return -EFAULT; 639 } 640 641#if RESET_WHILE_LOADING 642 wanxl_reset(card); 643#endif 644 645 timeout = jiffies + 20 * HZ; 646 while ((stat = readl(card->plx + PLX_MAILBOX_0)) != 0) { 647 if (time_before(timeout, jiffies)) { 648 printk(KERN_WARNING "wanXL %s: timeout waiting for" 649 " PUTS to complete\n", pci_name(pdev)); 650 wanxl_pci_remove_one(pdev); 651 return -ENODEV; 652 } 653 654 switch(stat & 0xC0) { 655 case 0x00: /* hmm - PUTS completed with non-zero code? */ 656 case 0x80: /* PUTS still testing the hardware */ 657 break; 658 659 default: 660 printk(KERN_WARNING "wanXL %s: PUTS test 0x%X" 661 " failed\n", pci_name(pdev), stat & 0x30); 662 wanxl_pci_remove_one(pdev); 663 return -ENODEV; 664 } 665 666 schedule(); 667 } 668 669 /* get on-board memory size (PUTS detects no more than 4 MB) */ 670 ramsize = readl(card->plx + PLX_MAILBOX_2) & MBX2_MEMSZ_MASK; 671 672 /* set up on-board RAM mapping */ 673 mem_phy = pci_resource_start(pdev, 2); 674 675 676 /* sanity check the board's reported memory size */ 677 if (ramsize < BUFFERS_ADDR + 678 (TX_BUFFERS + RX_BUFFERS) * BUFFER_LENGTH * ports) { 679 printk(KERN_WARNING "wanXL %s: no enough on-board RAM" 680 " (%u bytes detected, %u bytes required)\n", 681 pci_name(pdev), ramsize, BUFFERS_ADDR + 682 (TX_BUFFERS + RX_BUFFERS) * BUFFER_LENGTH * ports); 683 wanxl_pci_remove_one(pdev); 684 return -ENODEV; 685 } 686 687 if (wanxl_puts_command(card, MBX1_CMD_BSWAP)) { 688 printk(KERN_WARNING "wanXL %s: unable to Set Byte Swap" 689 " Mode\n", pci_name(pdev)); 690 wanxl_pci_remove_one(pdev); 691 return -ENODEV; 692 } 693 694 for (i = 0; i < RX_QUEUE_LENGTH; i++) { 695 struct sk_buff *skb = dev_alloc_skb(BUFFER_LENGTH); 696 card->rx_skbs[i] = skb; 697 if (skb) 698 card->status->rx_descs[i].address = 699 pci_map_single(card->pdev, skb->data, 700 BUFFER_LENGTH, 701 PCI_DMA_FROMDEVICE); 702 } 703 704 mem = ioremap_nocache(mem_phy, PDM_OFFSET + sizeof(firmware)); 705 if (!mem) { 706 printk(KERN_ERR "wanxl: ioremap() failed\n"); 707 wanxl_pci_remove_one(pdev); 708 return -EFAULT; 709 } 710 711 for (i = 0; i < sizeof(firmware); i += 4) 712 writel(htonl(*(u32*)(firmware + i)), mem + PDM_OFFSET + i); 713 714 for (i = 0; i < ports; i++) 715 writel(card->status_address + 716 (void *)&card->status->port_status[i] - 717 (void *)card->status, mem + PDM_OFFSET + 4 + i * 4); 718 writel(card->status_address, mem + PDM_OFFSET + 20); 719 writel(PDM_OFFSET, mem); 720 iounmap(mem); 721 722 writel(0, card->plx + PLX_MAILBOX_5); 723 724 if (wanxl_puts_command(card, MBX1_CMD_ABORTJ)) { 725 printk(KERN_WARNING "wanXL %s: unable to Abort and Jump\n", 726 pci_name(pdev)); 727 wanxl_pci_remove_one(pdev); 728 return -ENODEV; 729 } 730 731 stat = 0; 732 timeout = jiffies + 5 * HZ; 733 do { 734 if ((stat = readl(card->plx + PLX_MAILBOX_5)) != 0) 735 break; 736 schedule(); 737 }while (time_after(timeout, jiffies)); 738 739 if (!stat) { 740 printk(KERN_WARNING "wanXL %s: timeout while initializing card" 741 "firmware\n", pci_name(pdev)); 742 wanxl_pci_remove_one(pdev); 743 return -ENODEV; 744 } 745 746#if DETECT_RAM 747 ramsize = stat; 748#endif 749 750 printk(KERN_INFO "wanXL %s: at 0x%X, %u KB of RAM at 0x%X, irq %u\n", 751 pci_name(pdev), plx_phy, ramsize / 1024, mem_phy, pdev->irq); 752 753 /* Allocate IRQ */ 754 if (request_irq(pdev->irq, wanxl_intr, IRQF_SHARED, "wanXL", card)) { 755 printk(KERN_WARNING "wanXL %s: could not allocate IRQ%i.\n", 756 pci_name(pdev), pdev->irq); 757 wanxl_pci_remove_one(pdev); 758 return -EBUSY; 759 } 760 card->irq = pdev->irq; 761 762 for (i = 0; i < ports; i++) { 763 hdlc_device *hdlc; 764 port_t *port = &card->ports[i]; 765 struct net_device *dev = alloc_hdlcdev(port); 766 if (!dev) { 767 printk(KERN_ERR "wanXL %s: unable to allocate" 768 " memory\n", pci_name(pdev)); 769 wanxl_pci_remove_one(pdev); 770 return -ENOMEM; 771 } 772 773 port->dev = dev; 774 hdlc = dev_to_hdlc(dev); 775 spin_lock_init(&port->lock); 776 SET_MODULE_OWNER(dev); 777 dev->tx_queue_len = 50; 778 dev->do_ioctl = wanxl_ioctl; 779 dev->open = wanxl_open; 780 dev->stop = wanxl_close; 781 hdlc->attach = wanxl_attach; 782 hdlc->xmit = wanxl_xmit; 783 dev->get_stats = wanxl_get_stats; 784 port->card = card; 785 port->node = i; 786 get_status(port)->clocking = CLOCK_EXT; 787 if (register_hdlc_device(dev)) { 788 printk(KERN_ERR "wanXL %s: unable to register hdlc" 789 " device\n", pci_name(pdev)); 790 free_netdev(dev); 791 wanxl_pci_remove_one(pdev); 792 return -ENOBUFS; 793 } 794 card->n_ports++; 795 } 796 797 printk(KERN_INFO "wanXL %s: port", pci_name(pdev)); 798 for (i = 0; i < ports; i++) 799 printk("%s #%i: %s", i ? "," : "", i, 800 card->ports[i].dev->name); 801 printk("\n"); 802 803 for (i = 0; i < ports; i++) 804 wanxl_cable_intr(&card->ports[i]); /* get carrier status etc.*/ 805 806 return 0; 807} 808 809static struct pci_device_id wanxl_pci_tbl[] __devinitdata = { 810 { PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_SBE_WANXL100, PCI_ANY_ID, 811 PCI_ANY_ID, 0, 0, 0 }, 812 { PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_SBE_WANXL200, PCI_ANY_ID, 813 PCI_ANY_ID, 0, 0, 0 }, 814 { PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_SBE_WANXL400, PCI_ANY_ID, 815 PCI_ANY_ID, 0, 0, 0 }, 816 { 0, } 817}; 818 819 820static struct pci_driver wanxl_pci_driver = { 821 .name = "wanXL", 822 .id_table = wanxl_pci_tbl, 823 .probe = wanxl_pci_init_one, 824 .remove = wanxl_pci_remove_one, 825}; 826 827 828static int __init wanxl_init_module(void) 829{ 830#ifdef MODULE 831 printk(KERN_INFO "%s\n", version); 832#endif 833 return pci_register_driver(&wanxl_pci_driver); 834} 835 836static void __exit wanxl_cleanup_module(void) 837{ 838 pci_unregister_driver(&wanxl_pci_driver); 839} 840 841 842MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>"); 843MODULE_DESCRIPTION("SBE Inc. wanXL serial port driver"); 844MODULE_LICENSE("GPL v2"); 845MODULE_DEVICE_TABLE(pci, wanxl_pci_tbl); 846 847module_init(wanxl_init_module); 848module_exit(wanxl_cleanup_module); 849