1/* 2 * FarSync X21 driver for Linux 3 * 4 * Actually sync driver for X.21, V.35 and V.24 on FarSync T-series cards 5 * 6 * Copyright (C) 2001 FarSite Communications Ltd. 7 * www.farsite.co.uk 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 12 * 2 of the License, or (at your option) any later version. 13 * 14 * Author: R.J.Dunlop <bob.dunlop@farsite.co.uk> 15 * 16 * For the most part this file only contains structures and information 17 * that is visible to applications outside the driver. Shared memory 18 * layout etc is internal to the driver and described within farsync.c. 19 * Overlap exists in that the values used for some fields within the 20 * ioctl interface extend into the cards firmware interface so values in 21 * this file may not be changed arbitrarily. 22 */ 23 24/* What's in a name 25 * 26 * The project name for this driver is Oscar. The driver is intended to be 27 * used with the FarSite T-Series cards (T2P & T4P) running in the high 28 * speed frame shifter mode. This is sometimes referred to as X.21 mode 29 * which is a complete misnomer as the card continues to support V.24 and 30 * V.35 as well as X.21. 31 * 32 * A short common prefix is useful for routines within the driver to avoid 33 * conflict with other similar drivers and I chosen to use "fst_" for this 34 * purpose (FarSite T-series). 35 * 36 * Finally the device driver needs a short network interface name. Since 37 * "hdlc" is already in use I've chosen the even less informative "sync" 38 * for the present. 39 */ 40#define FST_NAME "fst" /* In debug/info etc */ 41#define FST_NDEV_NAME "sync" /* For net interface */ 42#define FST_DEV_NAME "farsync" /* For misc interfaces */ 43 44 45/* User version number 46 * 47 * This version number is incremented with each official release of the 48 * package and is a simplified number for normal user reference. 49 * Individual files are tracked by the version control system and may 50 * have individual versions (or IDs) that move much faster than the 51 * the release version as individual updates are tracked. 52 */ 53#define FST_USER_VERSION "1.04" 54 55 56/* Ioctl call command values 57 * 58 * The first three private ioctls are used by the sync-PPP module, 59 * allowing a little room for expansion we start our numbering at 10. 60 */ 61#define FSTWRITE (SIOCDEVPRIVATE+10) 62#define FSTCPURESET (SIOCDEVPRIVATE+11) 63#define FSTCPURELEASE (SIOCDEVPRIVATE+12) 64#define FSTGETCONF (SIOCDEVPRIVATE+13) 65#define FSTSETCONF (SIOCDEVPRIVATE+14) 66 67 68/* FSTWRITE 69 * 70 * Used to write a block of data (firmware etc) before the card is running 71 */ 72struct fstioc_write { 73 unsigned int size; 74 unsigned int offset; 75 unsigned char data[0]; 76}; 77 78 79/* FSTCPURESET and FSTCPURELEASE 80 * 81 * These take no additional data. 82 * FSTCPURESET forces the cards CPU into a reset state and holds it there. 83 * FSTCPURELEASE releases the CPU from this reset state allowing it to run, 84 * the reset vector should be setup before this ioctl is run. 85 */ 86 87/* FSTGETCONF and FSTSETCONF 88 * 89 * Get and set a card/ports configuration. 90 * In order to allow selective setting of items and for the kernel to 91 * indicate a partial status response the first field "valid" is a bitmask 92 * indicating which other fields in the structure are valid. 93 * Many of the field names in this structure match those used in the 94 * firmware shared memory configuration interface and come originally from 95 * the NT header file Smc.h 96 * 97 * When used with FSTGETCONF this structure should be zeroed before use. 98 * This is to allow for possible future expansion when some of the fields 99 * might be used to indicate a different (expanded) structure. 100 */ 101struct fstioc_info { 102 unsigned int valid; /* Bits of structure that are valid */ 103 unsigned int nports; /* Number of serial ports */ 104 unsigned int type; /* Type index of card */ 105 unsigned int state; /* State of card */ 106 unsigned int index; /* Index of port ioctl was issued on */ 107 unsigned int smcFirmwareVersion; 108 unsigned long kernelVersion; /* What Kernel version we are working with */ 109 unsigned short lineInterface; /* Physical interface type */ 110 unsigned char proto; /* Line protocol */ 111 unsigned char internalClock; /* 1 => internal clock, 0 => external */ 112 unsigned int lineSpeed; /* Speed in bps */ 113 unsigned int v24IpSts; /* V.24 control input status */ 114 unsigned int v24OpSts; /* V.24 control output status */ 115 unsigned short clockStatus; /* lsb: 0=> present, 1=> absent */ 116 unsigned short cableStatus; /* lsb: 0=> present, 1=> absent */ 117 unsigned short cardMode; /* lsb: LED id mode */ 118 unsigned short debug; /* Debug flags */ 119 unsigned char transparentMode; /* Not used always 0 */ 120 unsigned char invertClock; /* Invert clock feature for syncing */ 121 unsigned char startingSlot; /* Time slot to use for start of tx */ 122 unsigned char clockSource; /* External or internal */ 123 unsigned char framing; /* E1, T1 or J1 */ 124 unsigned char structure; /* unframed, double, crc4, f4, f12, */ 125 /* f24 f72 */ 126 unsigned char interface; /* rj48c or bnc */ 127 unsigned char coding; /* hdb3 b8zs */ 128 unsigned char lineBuildOut; /* 0, -7.5, -15, -22 */ 129 unsigned char equalizer; /* short or lon haul settings */ 130 unsigned char loopMode; /* various loopbacks */ 131 unsigned char range; /* cable lengths */ 132 unsigned char txBufferMode; /* tx elastic buffer depth */ 133 unsigned char rxBufferMode; /* rx elastic buffer depth */ 134 unsigned char losThreshold; /* Attenuation on LOS signal */ 135 unsigned char idleCode; /* Value to send as idle timeslot */ 136 unsigned int receiveBufferDelay; /* delay thro rx buffer timeslots */ 137 unsigned int framingErrorCount; /* framing errors */ 138 unsigned int codeViolationCount; /* code violations */ 139 unsigned int crcErrorCount; /* CRC errors */ 140 int lineAttenuation; /* in dB*/ 141 unsigned short lossOfSignal; 142 unsigned short receiveRemoteAlarm; 143 unsigned short alarmIndicationSignal; 144}; 145 146/* "valid" bitmask */ 147#define FSTVAL_NONE 0x00000000 /* Nothing valid (firmware not running). 148 * Slight misnomer. In fact nports, 149 * type, state and index will be set 150 * based on hardware detected. 151 */ 152#define FSTVAL_OMODEM 0x0000001F /* First 5 bits correspond to the 153 * output status bits defined for 154 * v24OpSts 155 */ 156#define FSTVAL_SPEED 0x00000020 /* internalClock, lineSpeed, clockStatus 157 */ 158#define FSTVAL_CABLE 0x00000040 /* lineInterface, cableStatus */ 159#define FSTVAL_IMODEM 0x00000080 /* v24IpSts */ 160#define FSTVAL_CARD 0x00000100 /* nports, type, state, index, 161 * smcFirmwareVersion 162 */ 163#define FSTVAL_PROTO 0x00000200 /* proto */ 164#define FSTVAL_MODE 0x00000400 /* cardMode */ 165#define FSTVAL_PHASE 0x00000800 /* Clock phase */ 166#define FSTVAL_TE1 0x00001000 /* T1E1 Configuration */ 167#define FSTVAL_DEBUG 0x80000000 /* debug */ 168#define FSTVAL_ALL 0x00001FFF /* Note: does not include DEBUG flag */ 169 170/* "type" */ 171#define FST_TYPE_NONE 0 /* Probably should never happen */ 172#define FST_TYPE_T2P 1 /* T2P X21 2 port card */ 173#define FST_TYPE_T4P 2 /* T4P X21 4 port card */ 174#define FST_TYPE_T1U 3 /* T1U X21 1 port card */ 175#define FST_TYPE_T2U 4 /* T2U X21 2 port card */ 176#define FST_TYPE_T4U 5 /* T4U X21 4 port card */ 177#define FST_TYPE_TE1 6 /* T1E1 X21 1 port card */ 178 179/* "family" */ 180#define FST_FAMILY_TXP 0 /* T2P or T4P */ 181#define FST_FAMILY_TXU 1 /* T1U or T2U or T4U */ 182 183/* "state" */ 184#define FST_UNINIT 0 /* Raw uninitialised state following 185 * system startup */ 186#define FST_RESET 1 /* Processor held in reset state */ 187#define FST_DOWNLOAD 2 /* Card being downloaded */ 188#define FST_STARTING 3 /* Released following download */ 189#define FST_RUNNING 4 /* Processor running */ 190#define FST_BADVERSION 5 /* Bad shared memory version detected */ 191#define FST_HALTED 6 /* Processor flagged a halt */ 192#define FST_IFAILED 7 /* Firmware issued initialisation failed 193 * interrupt 194 */ 195/* "lineInterface" */ 196#define V24 1 197#define X21 2 198#define V35 3 199#define X21D 4 200#define T1 5 201#define E1 6 202#define J1 7 203 204/* "proto" */ 205#define FST_HDLC 1 /* Cisco compatible HDLC */ 206#define FST_PPP 2 /* Sync PPP */ 207#define FST_MONITOR 3 /* Monitor only (raw packet reception) */ 208#define FST_RAW 4 /* Two way raw packets */ 209#define FST_GEN_HDLC 5 /* Using "Generic HDLC" module */ 210 211/* "internalClock" */ 212#define INTCLK 1 213#define EXTCLK 0 214 215/* "v24IpSts" bitmask */ 216#define IPSTS_CTS 0x00000001 /* Clear To Send (Indicate for X.21) */ 217#define IPSTS_INDICATE IPSTS_CTS 218#define IPSTS_DSR 0x00000002 /* Data Set Ready (T2P Port A) */ 219#define IPSTS_DCD 0x00000004 /* Data Carrier Detect */ 220#define IPSTS_RI 0x00000008 /* Ring Indicator (T2P Port A) */ 221#define IPSTS_TMI 0x00000010 /* Test Mode Indicator (Not Supported)*/ 222 223/* "v24OpSts" bitmask */ 224#define OPSTS_RTS 0x00000001 /* Request To Send (Control for X.21) */ 225#define OPSTS_CONTROL OPSTS_RTS 226#define OPSTS_DTR 0x00000002 /* Data Terminal Ready */ 227#define OPSTS_DSRS 0x00000004 /* Data Signalling Rate Select (Not 228 * Supported) */ 229#define OPSTS_SS 0x00000008 /* Select Standby (Not Supported) */ 230#define OPSTS_LL 0x00000010 /* Maintenance Test (Not Supported) */ 231 232/* "cardMode" bitmask */ 233#define CARD_MODE_IDENTIFY 0x0001 234 235/* 236 * Constants for T1/E1 configuration 237 */ 238 239/* 240 * Clock source 241 */ 242#define CLOCKING_SLAVE 0 243#define CLOCKING_MASTER 1 244 245/* 246 * Framing 247 */ 248#define FRAMING_E1 0 249#define FRAMING_J1 1 250#define FRAMING_T1 2 251 252/* 253 * Structure 254 */ 255#define STRUCTURE_UNFRAMED 0 256#define STRUCTURE_E1_DOUBLE 1 257#define STRUCTURE_E1_CRC4 2 258#define STRUCTURE_E1_CRC4M 3 259#define STRUCTURE_T1_4 4 260#define STRUCTURE_T1_12 5 261#define STRUCTURE_T1_24 6 262#define STRUCTURE_T1_72 7 263 264/* 265 * Interface 266 */ 267#define INTERFACE_RJ48C 0 268#define INTERFACE_BNC 1 269 270/* 271 * Coding 272 */ 273 274#define CODING_HDB3 0 275#define CODING_NRZ 1 276#define CODING_CMI 2 277#define CODING_CMI_HDB3 3 278#define CODING_CMI_B8ZS 4 279#define CODING_AMI 5 280#define CODING_AMI_ZCS 6 281#define CODING_B8ZS 7 282 283/* 284 * Line Build Out 285 */ 286#define LBO_0dB 0 287#define LBO_7dB5 1 288#define LBO_15dB 2 289#define LBO_22dB5 3 290 291/* 292 * Range for long haul t1 > 655ft 293 */ 294#define RANGE_0_133_FT 0 295#define RANGE_0_40_M RANGE_0_133_FT 296#define RANGE_133_266_FT 1 297#define RANGE_40_81_M RANGE_133_266_FT 298#define RANGE_266_399_FT 2 299#define RANGE_81_122_M RANGE_266_399_FT 300#define RANGE_399_533_FT 3 301#define RANGE_122_162_M RANGE_399_533_FT 302#define RANGE_533_655_FT 4 303#define RANGE_162_200_M RANGE_533_655_FT 304/* 305 * Receive Equaliser 306 */ 307#define EQUALIZER_SHORT 0 308#define EQUALIZER_LONG 1 309 310/* 311 * Loop modes 312 */ 313#define LOOP_NONE 0 314#define LOOP_LOCAL 1 315#define LOOP_PAYLOAD_EXC_TS0 2 316#define LOOP_PAYLOAD_INC_TS0 3 317#define LOOP_REMOTE 4 318 319/* 320 * Buffer modes 321 */ 322#define BUFFER_2_FRAME 0 323#define BUFFER_1_FRAME 1 324#define BUFFER_96_BIT 2 325#define BUFFER_NONE 3 326 327/* Debug support 328 * 329 * These should only be enabled for development kernels, production code 330 * should define FST_DEBUG=0 in order to exclude the code. 331 * Setting FST_DEBUG=1 will include all the debug code but in a disabled 332 * state, use the FSTSETCONF ioctl to enable specific debug actions, or 333 * FST_DEBUG can be set to prime the debug selection. 334 */ 335#define FST_DEBUG 0x0000 336#if FST_DEBUG 337 338extern int fst_debug_mask; /* Bit mask of actions to debug, bits 339 * listed below. Note: Bit 0 is used 340 * to trigger the inclusion of this 341 * code, without enabling any actions. 342 */ 343#define DBG_INIT 0x0002 /* Card detection and initialisation */ 344#define DBG_OPEN 0x0004 /* Open and close sequences */ 345#define DBG_PCI 0x0008 /* PCI config operations */ 346#define DBG_IOCTL 0x0010 /* Ioctls and other config */ 347#define DBG_INTR 0x0020 /* Interrupt routines (be careful) */ 348#define DBG_TX 0x0040 /* Packet transmission */ 349#define DBG_RX 0x0080 /* Packet reception */ 350#define DBG_CMD 0x0100 /* Port command issuing */ 351 352#define DBG_ASS 0xFFFF /* Assert like statements. Code that 353 * should never be reached, if you see 354 * one of these then I've been an ass 355 */ 356#endif /* FST_DEBUG */ 357