1/* 2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33#include <linux/init.h> 34#include <linux/errno.h> 35#include <linux/pci.h> 36#include <linux/delay.h> 37#include <linux/slab.h> 38#include <linux/jiffies.h> 39 40#include "mlx4.h" 41 42int mlx4_reset(struct mlx4_dev *dev) 43{ 44 void __iomem *reset; 45 u32 *hca_header = NULL; 46 int pcie_cap; 47 u16 devctl; 48 u16 linkctl; 49 u16 vendor; 50 unsigned long end; 51 u32 sem; 52 int i; 53 int err = 0; 54 55#define MLX4_RESET_BASE 0xf0000 56#define MLX4_RESET_SIZE 0x400 57#define MLX4_SEM_OFFSET 0x3fc 58#define MLX4_RESET_OFFSET 0x10 59#define MLX4_RESET_VALUE swab32(1) 60 61#define MLX4_SEM_TIMEOUT_JIFFIES (10 * HZ) 62#define MLX4_RESET_TIMEOUT_JIFFIES (2 * HZ) 63 64 /* 65 * Reset the chip. This is somewhat ugly because we have to 66 * save off the PCI header before reset and then restore it 67 * after the chip reboots. We skip config space offsets 22 68 * and 23 since those have a special meaning. 69 */ 70 71 /* Do we need to save off the full 4K PCI Express header?? */ 72 hca_header = kmalloc(256, GFP_KERNEL); 73 if (!hca_header) { 74 err = -ENOMEM; 75 mlx4_err(dev, "Couldn't allocate memory to save HCA " 76 "PCI header, aborting.\n"); 77 goto out; 78 } 79 80 pcie_cap = pci_find_capability(dev->pdev, PCI_CAP_ID_EXP); 81 82 for (i = 0; i < 64; ++i) { 83 if (i == 22 || i == 23) 84 continue; 85 if (pci_read_config_dword(dev->pdev, i * 4, hca_header + i)) { 86 err = -ENODEV; 87 mlx4_err(dev, "Couldn't save HCA " 88 "PCI header, aborting.\n"); 89 goto out; 90 } 91 } 92 93 reset = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_RESET_BASE, 94 MLX4_RESET_SIZE); 95 if (!reset) { 96 err = -ENOMEM; 97 mlx4_err(dev, "Couldn't map HCA reset register, aborting.\n"); 98 goto out; 99 } 100 101 /* grab HW semaphore to lock out flash updates */ 102 end = jiffies + MLX4_SEM_TIMEOUT_JIFFIES; 103 do { 104 sem = readl(reset + MLX4_SEM_OFFSET); 105 if (!sem) 106 break; 107 108 msleep(1); 109 } while (time_before(jiffies, end)); 110 111 if (sem) { 112 mlx4_err(dev, "Failed to obtain HW semaphore, aborting\n"); 113 err = -EAGAIN; 114 iounmap(reset); 115 goto out; 116 } 117 118 /* actually hit reset */ 119 writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET); 120 iounmap(reset); 121 122 end = jiffies + MLX4_RESET_TIMEOUT_JIFFIES; 123 do { 124 if (!pci_read_config_word(dev->pdev, PCI_VENDOR_ID, &vendor) && 125 vendor != 0xffff) 126 break; 127 128 msleep(1); 129 } while (time_before(jiffies, end)); 130 131 if (vendor == 0xffff) { 132 err = -ENODEV; 133 mlx4_err(dev, "PCI device did not come back after reset, " 134 "aborting.\n"); 135 goto out; 136 } 137 138 /* Now restore the PCI headers */ 139 if (pcie_cap) { 140 devctl = hca_header[(pcie_cap + PCI_EXP_DEVCTL) / 4]; 141 if (pci_write_config_word(dev->pdev, pcie_cap + PCI_EXP_DEVCTL, 142 devctl)) { 143 err = -ENODEV; 144 mlx4_err(dev, "Couldn't restore HCA PCI Express " 145 "Device Control register, aborting.\n"); 146 goto out; 147 } 148 linkctl = hca_header[(pcie_cap + PCI_EXP_LNKCTL) / 4]; 149 if (pci_write_config_word(dev->pdev, pcie_cap + PCI_EXP_LNKCTL, 150 linkctl)) { 151 err = -ENODEV; 152 mlx4_err(dev, "Couldn't restore HCA PCI Express " 153 "Link control register, aborting.\n"); 154 goto out; 155 } 156 } 157 158 for (i = 0; i < 16; ++i) { 159 if (i * 4 == PCI_COMMAND) 160 continue; 161 162 if (pci_write_config_dword(dev->pdev, i * 4, hca_header[i])) { 163 err = -ENODEV; 164 mlx4_err(dev, "Couldn't restore HCA reg %x, " 165 "aborting.\n", i); 166 goto out; 167 } 168 } 169 170 if (pci_write_config_dword(dev->pdev, PCI_COMMAND, 171 hca_header[PCI_COMMAND / 4])) { 172 err = -ENODEV; 173 mlx4_err(dev, "Couldn't restore HCA COMMAND, " 174 "aborting.\n"); 175 goto out; 176 } 177 178out: 179 kfree(hca_header); 180 181 return err; 182} 183