1/* 2 * ck804xrom.c 3 * 4 * Normal mappings of chips in physical memory 5 * 6 * Dave Olsen <dolsen@lnxi.com> 7 * Ryan Jackson <rjackson@lnxi.com> 8 */ 9 10#include <linux/module.h> 11#include <linux/types.h> 12#include <linux/version.h> 13#include <linux/kernel.h> 14#include <linux/init.h> 15#include <asm/io.h> 16#include <linux/mtd/mtd.h> 17#include <linux/mtd/map.h> 18#include <linux/mtd/cfi.h> 19#include <linux/mtd/flashchip.h> 20#include <linux/pci.h> 21#include <linux/pci_ids.h> 22#include <linux/list.h> 23 24 25#define MOD_NAME KBUILD_BASENAME 26 27#define ADDRESS_NAME_LEN 18 28 29#define ROM_PROBE_STEP_SIZE (64*1024) 30 31struct ck804xrom_window { 32 void __iomem *virt; 33 unsigned long phys; 34 unsigned long size; 35 struct list_head maps; 36 struct resource rsrc; 37 struct pci_dev *pdev; 38}; 39 40struct ck804xrom_map_info { 41 struct list_head list; 42 struct map_info map; 43 struct mtd_info *mtd; 44 struct resource rsrc; 45 char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN]; 46}; 47 48 49/* The 2 bits controlling the window size are often set to allow reading 50 * the BIOS, but too small to allow writing, since the lock registers are 51 * 4MiB lower in the address space than the data. 52 * 53 * This is intended to prevent flashing the bios, perhaps accidentally. 54 * 55 * This parameter allows the normal driver to override the BIOS settings. 56 * 57 * The bits are 6 and 7. If both bits are set, it is a 5MiB window. 58 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a 59 * 64KiB window. 60 * 61 */ 62static uint win_size_bits = 0; 63module_param(win_size_bits, uint, 0); 64MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x88 byte, normally set by BIOS."); 65 66static struct ck804xrom_window ck804xrom_window = { 67 .maps = LIST_HEAD_INIT(ck804xrom_window.maps), 68}; 69 70static void ck804xrom_cleanup(struct ck804xrom_window *window) 71{ 72 struct ck804xrom_map_info *map, *scratch; 73 u8 byte; 74 75 if (window->pdev) { 76 /* Disable writes through the rom window */ 77 pci_read_config_byte(window->pdev, 0x6d, &byte); 78 pci_write_config_byte(window->pdev, 0x6d, byte & ~1); 79 } 80 81 /* Free all of the mtd devices */ 82 list_for_each_entry_safe(map, scratch, &window->maps, list) { 83 if (map->rsrc.parent) 84 release_resource(&map->rsrc); 85 86 del_mtd_device(map->mtd); 87 map_destroy(map->mtd); 88 list_del(&map->list); 89 kfree(map); 90 } 91 if (window->rsrc.parent) 92 release_resource(&window->rsrc); 93 94 if (window->virt) { 95 iounmap(window->virt); 96 window->virt = NULL; 97 window->phys = 0; 98 window->size = 0; 99 } 100 pci_dev_put(window->pdev); 101} 102 103 104static int __devinit ck804xrom_init_one (struct pci_dev *pdev, 105 const struct pci_device_id *ent) 106{ 107 static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL }; 108 u8 byte; 109 struct ck804xrom_window *window = &ck804xrom_window; 110 struct ck804xrom_map_info *map = NULL; 111 unsigned long map_top; 112 113 /* Remember the pci dev I find the window in */ 114 window->pdev = pci_dev_get(pdev); 115 116 /* Enable the selected rom window. This is often incorrectly 117 * set up by the BIOS, and the 4MiB offset for the lock registers 118 * requires the full 5MiB of window space. 119 * 120 * This 'write, then read' approach leaves the bits for 121 * other uses of the hardware info. 122 */ 123 pci_read_config_byte(pdev, 0x88, &byte); 124 pci_write_config_byte(pdev, 0x88, byte | win_size_bits ); 125 126 127 /* Assume the rom window is properly setup, and find it's size */ 128 pci_read_config_byte(pdev, 0x88, &byte); 129 130 if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6))) 131 window->phys = 0xffb00000; /* 5MiB */ 132 else if ((byte & (1<<7)) == (1<<7)) 133 window->phys = 0xffc00000; /* 4MiB */ 134 else 135 window->phys = 0xffff0000; /* 64KiB */ 136 137 window->size = 0xffffffffUL - window->phys + 1UL; 138 139 /* 140 * Try to reserve the window mem region. If this fails then 141 * it is likely due to a fragment of the window being 142 * "reserved" by the BIOS. In the case that the 143 * request_mem_region() fails then once the rom size is 144 * discovered we will try to reserve the unreserved fragment. 145 */ 146 window->rsrc.name = MOD_NAME; 147 window->rsrc.start = window->phys; 148 window->rsrc.end = window->phys + window->size - 1; 149 window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; 150 if (request_resource(&iomem_resource, &window->rsrc)) { 151 window->rsrc.parent = NULL; 152 printk(KERN_ERR MOD_NAME 153 " %s(): Unable to register resource" 154 " 0x%.016llx-0x%.016llx - kernel bug?\n", 155 __func__, 156 (unsigned long long)window->rsrc.start, 157 (unsigned long long)window->rsrc.end); 158 } 159 160 161 /* Enable writes through the rom window */ 162 pci_read_config_byte(pdev, 0x6d, &byte); 163 pci_write_config_byte(pdev, 0x6d, byte | 1); 164 165 166 /* For write accesses caches are useless */ 167 window->virt = ioremap_nocache(window->phys, window->size); 168 if (!window->virt) { 169 printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n", 170 window->phys, window->size); 171 goto out; 172 } 173 174 /* Get the first address to look for a rom chip at */ 175 map_top = window->phys; 176 /* The probe sequence run over the firmware hub lock 177 * registers sets them to 0x7 (no access). 178 * Probe at most the last 4MiB of the address space. 179 */ 180 if (map_top < 0xffc00000) 181 map_top = 0xffc00000; 182 /* Loop through and look for rom chips. Since we don't know the 183 * starting address for each chip, probe every ROM_PROBE_STEP_SIZE 184 * bytes from the starting address of the window. 185 */ 186 while((map_top - 1) < 0xffffffffUL) { 187 struct cfi_private *cfi; 188 unsigned long offset; 189 int i; 190 191 if (!map) 192 map = kmalloc(sizeof(*map), GFP_KERNEL); 193 194 if (!map) { 195 printk(KERN_ERR MOD_NAME ": kmalloc failed"); 196 goto out; 197 } 198 memset(map, 0, sizeof(*map)); 199 INIT_LIST_HEAD(&map->list); 200 map->map.name = map->map_name; 201 map->map.phys = map_top; 202 offset = map_top - window->phys; 203 map->map.virt = (void __iomem *) 204 (((unsigned long)(window->virt)) + offset); 205 map->map.size = 0xffffffffUL - map_top + 1UL; 206 /* Set the name of the map to the address I am trying */ 207 sprintf(map->map_name, "%s @%08Lx", 208 MOD_NAME, (unsigned long long)map->map.phys); 209 210 /* There is no generic VPP support */ 211 for(map->map.bankwidth = 32; map->map.bankwidth; 212 map->map.bankwidth >>= 1) 213 { 214 char **probe_type; 215 /* Skip bankwidths that are not supported */ 216 if (!map_bankwidth_supported(map->map.bankwidth)) 217 continue; 218 219 /* Setup the map methods */ 220 simple_map_init(&map->map); 221 222 /* Try all of the probe methods */ 223 probe_type = rom_probe_types; 224 for(; *probe_type; probe_type++) { 225 map->mtd = do_map_probe(*probe_type, &map->map); 226 if (map->mtd) 227 goto found; 228 } 229 } 230 map_top += ROM_PROBE_STEP_SIZE; 231 continue; 232 found: 233 /* Trim the size if we are larger than the map */ 234 if (map->mtd->size > map->map.size) { 235 printk(KERN_WARNING MOD_NAME 236 " rom(%u) larger than window(%lu). fixing...\n", 237 map->mtd->size, map->map.size); 238 map->mtd->size = map->map.size; 239 } 240 if (window->rsrc.parent) { 241 /* 242 * Registering the MTD device in iomem may not be possible 243 * if there is a BIOS "reserved" and BUSY range. If this 244 * fails then continue anyway. 245 */ 246 map->rsrc.name = map->map_name; 247 map->rsrc.start = map->map.phys; 248 map->rsrc.end = map->map.phys + map->mtd->size - 1; 249 map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; 250 if (request_resource(&window->rsrc, &map->rsrc)) { 251 printk(KERN_ERR MOD_NAME 252 ": cannot reserve MTD resource\n"); 253 map->rsrc.parent = NULL; 254 } 255 } 256 257 /* Make the whole region visible in the map */ 258 map->map.virt = window->virt; 259 map->map.phys = window->phys; 260 cfi = map->map.fldrv_priv; 261 for(i = 0; i < cfi->numchips; i++) 262 cfi->chips[i].start += offset; 263 264 /* Now that the mtd devices is complete claim and export it */ 265 map->mtd->owner = THIS_MODULE; 266 if (add_mtd_device(map->mtd)) { 267 map_destroy(map->mtd); 268 map->mtd = NULL; 269 goto out; 270 } 271 272 273 /* Calculate the new value of map_top */ 274 map_top += map->mtd->size; 275 276 /* File away the map structure */ 277 list_add(&map->list, &window->maps); 278 map = NULL; 279 } 280 281 out: 282 /* Free any left over map structures */ 283 if (map) 284 kfree(map); 285 286 /* See if I have any map structures */ 287 if (list_empty(&window->maps)) { 288 ck804xrom_cleanup(window); 289 return -ENODEV; 290 } 291 return 0; 292} 293 294 295static void __devexit ck804xrom_remove_one (struct pci_dev *pdev) 296{ 297 struct ck804xrom_window *window = &ck804xrom_window; 298 299 ck804xrom_cleanup(window); 300} 301 302static struct pci_device_id ck804xrom_pci_tbl[] = { 303 { PCI_VENDOR_ID_NVIDIA, 0x0051, 304 PCI_ANY_ID, PCI_ANY_ID, }, /* nvidia ck804 */ 305 { 0, } 306}; 307 308MODULE_DEVICE_TABLE(pci, ck804xrom_pci_tbl); 309 310 311static int __init init_ck804xrom(void) 312{ 313 struct pci_dev *pdev; 314 struct pci_device_id *id; 315 int retVal; 316 pdev = NULL; 317 318 for(id = ck804xrom_pci_tbl; id->vendor; id++) { 319 pdev = pci_get_device(id->vendor, id->device, NULL); 320 if (pdev) 321 break; 322 } 323 if (pdev) { 324 retVal = ck804xrom_init_one(pdev, &ck804xrom_pci_tbl[0]); 325 pci_dev_put(pdev); 326 return retVal; 327 } 328 return -ENXIO; 329} 330 331static void __exit cleanup_ck804xrom(void) 332{ 333 ck804xrom_remove_one(ck804xrom_window.pdev); 334} 335 336module_init(init_ck804xrom); 337module_exit(cleanup_ck804xrom); 338 339MODULE_LICENSE("GPL"); 340MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>, Dave Olsen <dolsen@lnxi.com>"); 341MODULE_DESCRIPTION("MTD map driver for BIOS chips on the Nvidia ck804 southbridge"); 342