1/* 2 * Support for the Broadcom BCM3510 ATSC demodulator (1st generation Air2PC) 3 * 4 * Copyright (C) 2001-5, B2C2 inc. 5 * 6 * GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@desy.de> 7 * 8 * This driver is "hard-coded" to be used with the 1st generation of 9 * Technisat/B2C2's Air2PC ATSC PCI/USB cards/boxes. The pll-programming 10 * (Panasonic CT10S) is located here, which is actually wrong. Unless there is 11 * another device with a BCM3510, this is no problem. 12 * 13 * The driver works also with QAM64 DVB-C, but had an unreasonable high 14 * UNC. (Tested with the Air2PC ATSC 1st generation) 15 * 16 * You'll need a firmware for this driver in order to get it running. It is 17 * called "dvb-fe-bcm3510-01.fw". 18 * 19 * This program is free software; you can redistribute it and/or modify it 20 * under the terms of the GNU General Public License as published by the Free 21 * Software Foundation; either version 2 of the License, or (at your option) 22 * any later version. 23 * 24 * This program is distributed in the hope that it will be useful, but WITHOUT 25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 27 * more details. 28 * 29 * You should have received a copy of the GNU General Public License along with 30 * this program; if not, write to the Free Software Foundation, Inc., 675 Mass 31 * Ave, Cambridge, MA 02139, USA. 32 */ 33 34#include <linux/init.h> 35#include <linux/module.h> 36#include <linux/moduleparam.h> 37#include <linux/device.h> 38#include <linux/firmware.h> 39#include <linux/jiffies.h> 40#include <linux/string.h> 41#include <linux/slab.h> 42#include <linux/mutex.h> 43 44#include "dvb_frontend.h" 45#include "bcm3510.h" 46#include "bcm3510_priv.h" 47 48struct bcm3510_state { 49 50 struct i2c_adapter* i2c; 51 const struct bcm3510_config* config; 52 struct dvb_frontend frontend; 53 54 /* demodulator private data */ 55 struct mutex hab_mutex; 56 u8 firmware_loaded:1; 57 58 unsigned long next_status_check; 59 unsigned long status_check_interval; 60 struct bcm3510_hab_cmd_status1 status1; 61 struct bcm3510_hab_cmd_status2 status2; 62}; 63 64static int debug; 65module_param(debug, int, 0644); 66MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c (|-able))."); 67 68#define dprintk(level,x...) if (level & debug) printk(x) 69#define dbufout(b,l,m) {\ 70 int i; \ 71 for (i = 0; i < l; i++) \ 72 m("%02x ",b[i]); \ 73} 74#define deb_info(args...) dprintk(0x01,args) 75#define deb_i2c(args...) dprintk(0x02,args) 76#define deb_hab(args...) dprintk(0x04,args) 77 78/* transfer functions */ 79static int bcm3510_writebytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len) 80{ 81 u8 b[256]; 82 int err; 83 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b, .len = len + 1 }; 84 85 b[0] = reg; 86 memcpy(&b[1],buf,len); 87 88 deb_i2c("i2c wr %02x: ",reg); 89 dbufout(buf,len,deb_i2c); 90 deb_i2c("\n"); 91 92 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { 93 94 deb_info("%s: i2c write error (addr %02x, reg %02x, err == %i)\n", 95 __FUNCTION__, state->config->demod_address, reg, err); 96 return -EREMOTEIO; 97 } 98 99 return 0; 100} 101 102static int bcm3510_readbytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len) 103{ 104 struct i2c_msg msg[] = { 105 { .addr = state->config->demod_address, .flags = 0, .buf = ®, .len = 1 }, 106 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } 107 }; 108 int err; 109 110 memset(buf,0,len); 111 112 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) { 113 deb_info("%s: i2c read error (addr %02x, reg %02x, err == %i)\n", 114 __FUNCTION__, state->config->demod_address, reg, err); 115 return -EREMOTEIO; 116 } 117 deb_i2c("i2c rd %02x: ",reg); 118 dbufout(buf,len,deb_i2c); 119 deb_i2c("\n"); 120 121 return 0; 122} 123 124static int bcm3510_writeB(struct bcm3510_state *state, u8 reg, bcm3510_register_value v) 125{ 126 return bcm3510_writebytes(state,reg,&v.raw,1); 127} 128 129static int bcm3510_readB(struct bcm3510_state *state, u8 reg, bcm3510_register_value *v) 130{ 131 return bcm3510_readbytes(state,reg,&v->raw,1); 132} 133 134/* Host Access Buffer transfers */ 135static int bcm3510_hab_get_response(struct bcm3510_state *st, u8 *buf, int len) 136{ 137 bcm3510_register_value v; 138 int ret,i; 139 140 v.HABADR_a6.HABADR = 0; 141 if ((ret = bcm3510_writeB(st,0xa6,v)) < 0) 142 return ret; 143 144 for (i = 0; i < len; i++) { 145 if ((ret = bcm3510_readB(st,0xa7,&v)) < 0) 146 return ret; 147 buf[i] = v.HABDATA_a7; 148 } 149 return 0; 150} 151 152static int bcm3510_hab_send_request(struct bcm3510_state *st, u8 *buf, int len) 153{ 154 bcm3510_register_value v,hab; 155 int ret,i; 156 unsigned long t; 157 158/* Check if any previous HAB request still needs to be serviced by the 159 * Aquisition Processor before sending new request */ 160 if ((ret = bcm3510_readB(st,0xa8,&v)) < 0) 161 return ret; 162 if (v.HABSTAT_a8.HABR) { 163 deb_info("HAB is running already - clearing it.\n"); 164 v.HABSTAT_a8.HABR = 0; 165 bcm3510_writeB(st,0xa8,v); 166// return -EBUSY; 167 } 168 169/* Send the start HAB Address (automatically incremented after write of 170 * HABDATA) and write the HAB Data */ 171 hab.HABADR_a6.HABADR = 0; 172 if ((ret = bcm3510_writeB(st,0xa6,hab)) < 0) 173 return ret; 174 175 for (i = 0; i < len; i++) { 176 hab.HABDATA_a7 = buf[i]; 177 if ((ret = bcm3510_writeB(st,0xa7,hab)) < 0) 178 return ret; 179 } 180 181/* Set the HABR bit to indicate AP request in progress (LBHABR allows HABR to 182 * be written) */ 183 v.raw = 0; v.HABSTAT_a8.HABR = 1; v.HABSTAT_a8.LDHABR = 1; 184 if ((ret = bcm3510_writeB(st,0xa8,v)) < 0) 185 return ret; 186 187/* Polling method: Wait until the AP finishes processing the HAB request */ 188 t = jiffies + 1*HZ; 189 while (time_before(jiffies, t)) { 190 deb_info("waiting for HAB to complete\n"); 191 msleep(10); 192 if ((ret = bcm3510_readB(st,0xa8,&v)) < 0) 193 return ret; 194 195 if (!v.HABSTAT_a8.HABR) 196 return 0; 197 } 198 199 deb_info("send_request execution timed out.\n"); 200 return -ETIMEDOUT; 201} 202 203static int bcm3510_do_hab_cmd(struct bcm3510_state *st, u8 cmd, u8 msgid, u8 *obuf, u8 olen, u8 *ibuf, u8 ilen) 204{ 205 u8 ob[olen+2],ib[ilen+2]; 206 int ret = 0; 207 208 ob[0] = cmd; 209 ob[1] = msgid; 210 memcpy(&ob[2],obuf,olen); 211 212 deb_hab("hab snd: "); 213 dbufout(ob,olen+2,deb_hab); 214 deb_hab("\n"); 215 216 if (mutex_lock_interruptible(&st->hab_mutex) < 0) 217 return -EAGAIN; 218 219 if ((ret = bcm3510_hab_send_request(st, ob, olen+2)) < 0 || 220 (ret = bcm3510_hab_get_response(st, ib, ilen+2)) < 0) 221 goto error; 222 223 deb_hab("hab get: "); 224 dbufout(ib,ilen+2,deb_hab); 225 deb_hab("\n"); 226 227 memcpy(ibuf,&ib[2],ilen); 228error: 229 mutex_unlock(&st->hab_mutex); 230 return ret; 231} 232 233 234static int bcm3510_bert_reset(struct bcm3510_state *st) 235{ 236 bcm3510_register_value b; 237 int ret; 238 239 if ((ret = bcm3510_readB(st,0xfa,&b)) < 0) 240 return ret; 241 242 b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b); 243 b.BERCTL_fa.RESYNC = 1; bcm3510_writeB(st,0xfa,b); 244 b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b); 245 b.BERCTL_fa.CNTCTL = 1; b.BERCTL_fa.BITCNT = 1; bcm3510_writeB(st,0xfa,b); 246 247 /* clear residual bit counter TODO */ 248 return 0; 249} 250 251static int bcm3510_refresh_state(struct bcm3510_state *st) 252{ 253 if (time_after(jiffies,st->next_status_check)) { 254 bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS1, NULL,0, (u8 *)&st->status1, sizeof(st->status1)); 255 bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS2, NULL,0, (u8 *)&st->status2, sizeof(st->status2)); 256 st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000; 257 } 258 return 0; 259} 260 261static int bcm3510_read_status(struct dvb_frontend *fe, fe_status_t *status) 262{ 263 struct bcm3510_state* st = fe->demodulator_priv; 264 bcm3510_refresh_state(st); 265 266 *status = 0; 267 if (st->status1.STATUS1.RECEIVER_LOCK) 268 *status |= FE_HAS_LOCK | FE_HAS_SYNC; 269 270 if (st->status1.STATUS1.FEC_LOCK) 271 *status |= FE_HAS_VITERBI; 272 273 if (st->status1.STATUS1.OUT_PLL_LOCK) 274 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER; 275 276 if (*status & FE_HAS_LOCK) 277 st->status_check_interval = 1500; 278 else /* more frequently checks if no lock has been achieved yet */ 279 st->status_check_interval = 500; 280 281 deb_info("real_status: %02x\n",*status); 282 return 0; 283} 284 285static int bcm3510_read_ber(struct dvb_frontend* fe, u32* ber) 286{ 287 struct bcm3510_state* st = fe->demodulator_priv; 288 bcm3510_refresh_state(st); 289 290 *ber = (st->status2.LDBER0 << 16) | (st->status2.LDBER1 << 8) | st->status2.LDBER2; 291 return 0; 292} 293 294static int bcm3510_read_unc(struct dvb_frontend* fe, u32* unc) 295{ 296 struct bcm3510_state* st = fe->demodulator_priv; 297 bcm3510_refresh_state(st); 298 *unc = (st->status2.LDUERC0 << 8) | st->status2.LDUERC1; 299 return 0; 300} 301 302static int bcm3510_read_signal_strength(struct dvb_frontend* fe, u16* strength) 303{ 304 struct bcm3510_state* st = fe->demodulator_priv; 305 s32 t; 306 307 bcm3510_refresh_state(st); 308 t = st->status2.SIGNAL; 309 310 if (t > 190) 311 t = 190; 312 if (t < 90) 313 t = 90; 314 315 t -= 90; 316 t = t * 0xff / 100; 317 /* normalize if necessary */ 318 *strength = (t << 8) | t; 319 return 0; 320} 321 322static int bcm3510_read_snr(struct dvb_frontend* fe, u16* snr) 323{ 324 struct bcm3510_state* st = fe->demodulator_priv; 325 bcm3510_refresh_state(st); 326 327 *snr = st->status1.SNR_EST0*1000 + ((st->status1.SNR_EST1*1000) >> 8); 328 return 0; 329} 330 331/* tuner frontend programming */ 332static int bcm3510_tuner_cmd(struct bcm3510_state* st,u8 bc, u16 n, u8 a) 333{ 334 struct bcm3510_hab_cmd_tune c; 335 memset(&c,0,sizeof(struct bcm3510_hab_cmd_tune)); 336 337/* I2C Mode disabled, set 16 control / Data pairs */ 338 c.length = 0x10; 339 c.clock_width = 0; 340/* CS1, CS0, DATA, CLK bits control the tuner RF_AGC_SEL pin is set to 341 * logic high (as Configuration) */ 342 c.misc = 0x10; 343/* Set duration of the initial state of TUNCTL = 3.34 micro Sec */ 344 c.TUNCTL_state = 0x40; 345 346/* PRESCALER DEVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */ 347 c.ctl_dat[0].ctrl.size = BITS_8; 348 c.ctl_dat[0].data = 0x80 | bc; 349 350/* Control DATA pin, 1stosc REFERENCE COUNTER REF_S10 to REF_S3 */ 351 c.ctl_dat[1].ctrl.size = BITS_8; 352 c.ctl_dat[1].data = 4; 353 354/* set CONTROL BIT 1 to 1, 1stosc REFERENCE COUNTER REF_S2 to REF_S1 */ 355 c.ctl_dat[2].ctrl.size = BITS_3; 356 c.ctl_dat[2].data = 0x20; 357 358/* control CS0 pin, pulse byte ? */ 359 c.ctl_dat[3].ctrl.size = BITS_3; 360 c.ctl_dat[3].ctrl.clk_off = 1; 361 c.ctl_dat[3].ctrl.cs0 = 1; 362 c.ctl_dat[3].data = 0x40; 363 364/* PGM_S18 to PGM_S11 */ 365 c.ctl_dat[4].ctrl.size = BITS_8; 366 c.ctl_dat[4].data = n >> 3; 367 368/* PGM_S10 to PGM_S8, SWL_S7 to SWL_S3 */ 369 c.ctl_dat[5].ctrl.size = BITS_8; 370 c.ctl_dat[5].data = ((n & 0x7) << 5) | (a >> 2); 371 372/* SWL_S2 and SWL_S1, set CONTROL BIT 2 to 0 */ 373 c.ctl_dat[6].ctrl.size = BITS_3; 374 c.ctl_dat[6].data = (a << 6) & 0xdf; 375 376/* control CS0 pin, pulse byte ? */ 377 c.ctl_dat[7].ctrl.size = BITS_3; 378 c.ctl_dat[7].ctrl.clk_off = 1; 379 c.ctl_dat[7].ctrl.cs0 = 1; 380 c.ctl_dat[7].data = 0x40; 381 382/* PRESCALER DEVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */ 383 c.ctl_dat[8].ctrl.size = BITS_8; 384 c.ctl_dat[8].data = 0x80; 385 386/* 2ndosc REFERENCE COUNTER REF_S10 to REF_S3 */ 387 c.ctl_dat[9].ctrl.size = BITS_8; 388 c.ctl_dat[9].data = 0x10; 389 390/* set CONTROL BIT 1 to 1, 2ndosc REFERENCE COUNTER REF_S2 to REF_S1 */ 391 c.ctl_dat[10].ctrl.size = BITS_3; 392 c.ctl_dat[10].data = 0x20; 393 394/* pulse byte */ 395 c.ctl_dat[11].ctrl.size = BITS_3; 396 c.ctl_dat[11].ctrl.clk_off = 1; 397 c.ctl_dat[11].ctrl.cs1 = 1; 398 c.ctl_dat[11].data = 0x40; 399 400/* PGM_S18 to PGM_S11 */ 401 c.ctl_dat[12].ctrl.size = BITS_8; 402 c.ctl_dat[12].data = 0x2a; 403 404/* PGM_S10 to PGM_S8 and SWL_S7 to SWL_S3 */ 405 c.ctl_dat[13].ctrl.size = BITS_8; 406 c.ctl_dat[13].data = 0x8e; 407 408/* SWL_S2 and SWL_S1 and set CONTROL BIT 2 to 0 */ 409 c.ctl_dat[14].ctrl.size = BITS_3; 410 c.ctl_dat[14].data = 0; 411 412/* Pulse Byte */ 413 c.ctl_dat[15].ctrl.size = BITS_3; 414 c.ctl_dat[15].ctrl.clk_off = 1; 415 c.ctl_dat[15].ctrl.cs1 = 1; 416 c.ctl_dat[15].data = 0x40; 417 418 return bcm3510_do_hab_cmd(st,CMD_TUNE, MSGID_TUNE,(u8 *) &c,sizeof(c), NULL, 0); 419} 420 421static int bcm3510_set_freq(struct bcm3510_state* st,u32 freq) 422{ 423 u8 bc,a; 424 u16 n; 425 s32 YIntercept,Tfvco1; 426 427 freq /= 1000; 428 429 deb_info("%dkHz:",freq); 430 /* set Band Switch */ 431 if (freq <= 168000) 432 bc = 0x1c; 433 else if (freq <= 378000) 434 bc = 0x2c; 435 else 436 bc = 0x30; 437 438 if (freq >= 470000) { 439 freq -= 470001; 440 YIntercept = 18805; 441 } else if (freq >= 90000) { 442 freq -= 90001; 443 YIntercept = 15005; 444 } else if (freq >= 76000){ 445 freq -= 76001; 446 YIntercept = 14865; 447 } else { 448 freq -= 54001; 449 YIntercept = 14645; 450 } 451 452 Tfvco1 = (((freq/6000)*60 + YIntercept)*4)/10; 453 454 n = Tfvco1 >> 6; 455 a = Tfvco1 & 0x3f; 456 457 deb_info(" BC1_2_3_4: %x, N: %x A: %x\n", bc, n, a); 458 if (n >= 16 && n <= 2047) 459 return bcm3510_tuner_cmd(st,bc,n,a); 460 461 return -EINVAL; 462} 463 464static int bcm3510_set_frontend(struct dvb_frontend* fe, 465 struct dvb_frontend_parameters *p) 466{ 467 struct bcm3510_state* st = fe->demodulator_priv; 468 struct bcm3510_hab_cmd_ext_acquire cmd; 469 struct bcm3510_hab_cmd_bert_control bert; 470 int ret; 471 472 memset(&cmd,0,sizeof(cmd)); 473 switch (p->u.vsb.modulation) { 474 case QAM_256: 475 cmd.ACQUIRE0.MODE = 0x1; 476 cmd.ACQUIRE1.SYM_RATE = 0x1; 477 cmd.ACQUIRE1.IF_FREQ = 0x1; 478 break; 479 case QAM_64: 480 cmd.ACQUIRE0.MODE = 0x2; 481 cmd.ACQUIRE1.SYM_RATE = 0x2; 482 cmd.ACQUIRE1.IF_FREQ = 0x1; 483 break; 484/* case QAM_256: 485 cmd.ACQUIRE0.MODE = 0x3; 486 break; 487 case QAM_128: 488 cmd.ACQUIRE0.MODE = 0x4; 489 break; 490 case QAM_64: 491 cmd.ACQUIRE0.MODE = 0x5; 492 break; 493 case QAM_32: 494 cmd.ACQUIRE0.MODE = 0x6; 495 break; 496 case QAM_16: 497 cmd.ACQUIRE0.MODE = 0x7; 498 break;*/ 499 case VSB_8: 500 cmd.ACQUIRE0.MODE = 0x8; 501 cmd.ACQUIRE1.SYM_RATE = 0x0; 502 cmd.ACQUIRE1.IF_FREQ = 0x0; 503 break; 504 case VSB_16: 505 cmd.ACQUIRE0.MODE = 0x9; 506 cmd.ACQUIRE1.SYM_RATE = 0x0; 507 cmd.ACQUIRE1.IF_FREQ = 0x0; 508 default: 509 return -EINVAL; 510 }; 511 cmd.ACQUIRE0.OFFSET = 0; 512 cmd.ACQUIRE0.NTSCSWEEP = 1; 513 cmd.ACQUIRE0.FA = 1; 514 cmd.ACQUIRE0.BW = 0; 515 516/* if (enableOffset) { 517 cmd.IF_OFFSET0 = xx; 518 cmd.IF_OFFSET1 = xx; 519 520 cmd.SYM_OFFSET0 = xx; 521 cmd.SYM_OFFSET1 = xx; 522 if (enableNtscSweep) { 523 cmd.NTSC_OFFSET0; 524 cmd.NTSC_OFFSET1; 525 } 526 } */ 527 bcm3510_do_hab_cmd(st, CMD_ACQUIRE, MSGID_EXT_TUNER_ACQUIRE, (u8 *) &cmd, sizeof(cmd), NULL, 0); 528 529/* doing it with different MSGIDs, data book and source differs */ 530 bert.BE = 0; 531 bert.unused = 0; 532 bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_CONTROL, (u8 *) &bert, sizeof(bert), NULL, 0); 533 bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_SET, (u8 *) &bert, sizeof(bert), NULL, 0); 534 535 bcm3510_bert_reset(st); 536 537 if ((ret = bcm3510_set_freq(st,p->frequency)) < 0) 538 return ret; 539 540 memset(&st->status1,0,sizeof(st->status1)); 541 memset(&st->status2,0,sizeof(st->status2)); 542 st->status_check_interval = 500; 543 544/* Give the AP some time */ 545 msleep(200); 546 547 return 0; 548} 549 550static int bcm3510_sleep(struct dvb_frontend* fe) 551{ 552 return 0; 553} 554 555static int bcm3510_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *s) 556{ 557 s->min_delay_ms = 1000; 558 s->step_size = 0; 559 s->max_drift = 0; 560 return 0; 561} 562 563static void bcm3510_release(struct dvb_frontend* fe) 564{ 565 struct bcm3510_state* state = fe->demodulator_priv; 566 kfree(state); 567} 568 569/* firmware download: 570 * firmware file is build up like this: 571 * 16bit addr, 16bit length, 8byte of length 572 */ 573#define BCM3510_DEFAULT_FIRMWARE "dvb-fe-bcm3510-01.fw" 574 575static int bcm3510_write_ram(struct bcm3510_state *st, u16 addr, u8 *b, u16 len) 576{ 577 int ret = 0,i; 578 bcm3510_register_value vH, vL,vD; 579 580 vH.MADRH_a9 = addr >> 8; 581 vL.MADRL_aa = addr; 582 if ((ret = bcm3510_writeB(st,0xa9,vH)) < 0) return ret; 583 if ((ret = bcm3510_writeB(st,0xaa,vL)) < 0) return ret; 584 585 for (i = 0; i < len; i++) { 586 vD.MDATA_ab = b[i]; 587 if ((ret = bcm3510_writeB(st,0xab,vD)) < 0) 588 return ret; 589 } 590 591 return 0; 592} 593 594static int bcm3510_download_firmware(struct dvb_frontend* fe) 595{ 596 struct bcm3510_state* st = fe->demodulator_priv; 597 const struct firmware *fw; 598 u16 addr,len; 599 u8 *b; 600 int ret,i; 601 602 deb_info("requesting firmware\n"); 603 if ((ret = st->config->request_firmware(fe, &fw, BCM3510_DEFAULT_FIRMWARE)) < 0) { 604 err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE,ret); 605 return ret; 606 } 607 deb_info("got firmware: %zd\n",fw->size); 608 609 b = fw->data; 610 for (i = 0; i < fw->size;) { 611 addr = le16_to_cpu( *( (u16 *)&b[i] ) ); 612 len = le16_to_cpu( *( (u16 *)&b[i+2] ) ); 613 deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04zx\n",addr,len,fw->size); 614 if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) { 615 err("firmware download failed: %d\n",ret); 616 return ret; 617 } 618 i += 4 + len; 619 } 620 release_firmware(fw); 621 deb_info("firmware download successfully completed\n"); 622 return 0; 623} 624 625static int bcm3510_check_firmware_version(struct bcm3510_state *st) 626{ 627 struct bcm3510_hab_cmd_get_version_info ver; 628 bcm3510_do_hab_cmd(st,CMD_GET_VERSION_INFO,MSGID_GET_VERSION_INFO,NULL,0,(u8*)&ver,sizeof(ver)); 629 630 deb_info("Version information: 0x%02x 0x%02x 0x%02x 0x%02x\n", 631 ver.microcode_version, ver.script_version, ver.config_version, ver.demod_version); 632 633 if (ver.script_version == BCM3510_DEF_SCRIPT_VERSION && 634 ver.config_version == BCM3510_DEF_CONFIG_VERSION && 635 ver.demod_version == BCM3510_DEF_DEMOD_VERSION) 636 return 0; 637 638 deb_info("version check failed\n"); 639 return -ENODEV; 640} 641 642/* (un)resetting the AP */ 643static int bcm3510_reset(struct bcm3510_state *st) 644{ 645 int ret; 646 unsigned long t; 647 bcm3510_register_value v; 648 649 bcm3510_readB(st,0xa0,&v); v.HCTL1_a0.RESET = 1; 650 if ((ret = bcm3510_writeB(st,0xa0,v)) < 0) 651 return ret; 652 653 t = jiffies + 3*HZ; 654 while (time_before(jiffies, t)) { 655 msleep(10); 656 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0) 657 return ret; 658 659 if (v.APSTAT1_a2.RESET) 660 return 0; 661 } 662 deb_info("reset timed out\n"); 663 return -ETIMEDOUT; 664} 665 666static int bcm3510_clear_reset(struct bcm3510_state *st) 667{ 668 bcm3510_register_value v; 669 int ret; 670 unsigned long t; 671 672 v.raw = 0; 673 if ((ret = bcm3510_writeB(st,0xa0,v)) < 0) 674 return ret; 675 676 t = jiffies + 3*HZ; 677 while (time_before(jiffies, t)) { 678 msleep(10); 679 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0) 680 return ret; 681 682 /* verify that reset is cleared */ 683 if (!v.APSTAT1_a2.RESET) 684 return 0; 685 } 686 deb_info("reset clear timed out\n"); 687 return -ETIMEDOUT; 688} 689 690static int bcm3510_init_cold(struct bcm3510_state *st) 691{ 692 int ret; 693 bcm3510_register_value v; 694 695 /* read Acquisation Processor status register and check it is not in RUN mode */ 696 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0) 697 return ret; 698 if (v.APSTAT1_a2.RUN) { 699 deb_info("AP is already running - firmware already loaded.\n"); 700 return 0; 701 } 702 703 deb_info("reset?\n"); 704 if ((ret = bcm3510_reset(st)) < 0) 705 return ret; 706 707 deb_info("tristate?\n"); 708 /* tri-state */ 709 v.TSTCTL_2e.CTL = 0; 710 if ((ret = bcm3510_writeB(st,0x2e,v)) < 0) 711 return ret; 712 713 deb_info("firmware?\n"); 714 if ((ret = bcm3510_download_firmware(&st->frontend)) < 0 || 715 (ret = bcm3510_clear_reset(st)) < 0) 716 return ret; 717 718 /* anything left here to Let the acquisition processor begin execution at program counter 0000 ??? */ 719 720 return 0; 721} 722 723static int bcm3510_init(struct dvb_frontend* fe) 724{ 725 struct bcm3510_state* st = fe->demodulator_priv; 726 bcm3510_register_value j; 727 struct bcm3510_hab_cmd_set_agc c; 728 int ret; 729 730 if ((ret = bcm3510_readB(st,0xca,&j)) < 0) 731 return ret; 732 733 deb_info("JDEC: %02x\n",j.raw); 734 735 switch (j.JDEC_ca.JDEC) { 736 case JDEC_WAIT_AT_RAM: 737 deb_info("attempting to download firmware\n"); 738 if ((ret = bcm3510_init_cold(st)) < 0) 739 return ret; 740 case JDEC_EEPROM_LOAD_WAIT: /* fall-through is wanted */ 741 deb_info("firmware is loaded\n"); 742 bcm3510_check_firmware_version(st); 743 break; 744 default: 745 return -ENODEV; 746 } 747 748 memset(&c,0,1); 749 c.SEL = 1; 750 bcm3510_do_hab_cmd(st,CMD_AUTO_PARAM,MSGID_SET_RF_AGC_SEL,(u8 *)&c,sizeof(c),NULL,0); 751 752 return 0; 753} 754 755 756static struct dvb_frontend_ops bcm3510_ops; 757 758struct dvb_frontend* bcm3510_attach(const struct bcm3510_config *config, 759 struct i2c_adapter *i2c) 760{ 761 struct bcm3510_state* state = NULL; 762 int ret; 763 bcm3510_register_value v; 764 765 /* allocate memory for the internal state */ 766 state = kzalloc(sizeof(struct bcm3510_state), GFP_KERNEL); 767 if (state == NULL) 768 goto error; 769 770 /* setup the state */ 771 772 state->config = config; 773 state->i2c = i2c; 774 775 /* create dvb_frontend */ 776 memcpy(&state->frontend.ops, &bcm3510_ops, sizeof(struct dvb_frontend_ops)); 777 state->frontend.demodulator_priv = state; 778 779 mutex_init(&state->hab_mutex); 780 781 if ((ret = bcm3510_readB(state,0xe0,&v)) < 0) 782 goto error; 783 784 deb_info("Revision: 0x%1x, Layer: 0x%1x.\n",v.REVID_e0.REV,v.REVID_e0.LAYER); 785 786 if ((v.REVID_e0.REV != 0x1 && v.REVID_e0.LAYER != 0xb) && /* cold */ 787 (v.REVID_e0.REV != 0x8 && v.REVID_e0.LAYER != 0x0)) /* warm */ 788 goto error; 789 790 info("Revision: 0x%1x, Layer: 0x%1x.",v.REVID_e0.REV,v.REVID_e0.LAYER); 791 792 bcm3510_reset(state); 793 794 return &state->frontend; 795 796error: 797 kfree(state); 798 return NULL; 799} 800EXPORT_SYMBOL(bcm3510_attach); 801 802static struct dvb_frontend_ops bcm3510_ops = { 803 804 .info = { 805 .name = "Broadcom BCM3510 VSB/QAM frontend", 806 .type = FE_ATSC, 807 .frequency_min = 54000000, 808 .frequency_max = 803000000, 809 /* stepsize is just a guess */ 810 .frequency_stepsize = 0, 811 .caps = 812 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 813 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 814 FE_CAN_8VSB | FE_CAN_16VSB | 815 FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_128 | FE_CAN_QAM_256 816 }, 817 818 .release = bcm3510_release, 819 820 .init = bcm3510_init, 821 .sleep = bcm3510_sleep, 822 823 .set_frontend = bcm3510_set_frontend, 824 .get_tune_settings = bcm3510_get_tune_settings, 825 826 .read_status = bcm3510_read_status, 827 .read_ber = bcm3510_read_ber, 828 .read_signal_strength = bcm3510_read_signal_strength, 829 .read_snr = bcm3510_read_snr, 830 .read_ucblocks = bcm3510_read_unc, 831}; 832 833MODULE_DESCRIPTION("Broadcom BCM3510 ATSC (8VSB/16VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver"); 834MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>"); 835MODULE_LICENSE("GPL"); 836