1/* $Id: boardergo.h,v 1.1.1.1 2007/08/03 18:52:36 Exp $ 2 * 3 * Linux driver for HYSDN cards, definitions for ergo type boards (buffers..). 4 * 5 * Author Werner Cornelius (werner@titro.de) for Hypercope GmbH 6 * Copyright 1999 by Werner Cornelius (werner@titro.de) 7 * 8 * This software may be used and distributed according to the terms 9 * of the GNU General Public License, incorporated herein by reference. 10 * 11 */ 12 13 14/************************************************/ 15/* defines for the dual port memory of the card */ 16/************************************************/ 17#define ERG_DPRAM_PAGE_SIZE 0x2000 /* DPRAM occupies a 8K page */ 18#define BOOT_IMG_SIZE 4096 19#define ERG_DPRAM_FILL_SIZE (ERG_DPRAM_PAGE_SIZE - BOOT_IMG_SIZE) 20 21#define ERG_TO_HY_BUF_SIZE 0x0E00 /* 3072 bytes buffer size to card */ 22#define ERG_TO_PC_BUF_SIZE 0x0E00 /* 3072 bytes to PC, too */ 23 24/* following DPRAM layout copied from OS2-driver boarderg.h */ 25typedef struct ErgDpram_tag { 26/*0000 */ unsigned char ToHyBuf[ERG_TO_HY_BUF_SIZE]; 27/*0E00 */ unsigned char ToPcBuf[ERG_TO_PC_BUF_SIZE]; 28 29 /*1C00 */ unsigned char bSoftUart[SIZE_RSV_SOFT_UART]; 30 /* size 0x1B0 */ 31 32 /*1DB0 *//* tErrLogEntry */ unsigned char volatile ErrLogMsg[64]; 33 /* size 64 bytes */ 34 /*1DB0 unsigned long ulErrType; */ 35 /*1DB4 unsigned long ulErrSubtype; */ 36 /*1DB8 unsigned long ucTextSize; */ 37 /*1DB9 unsigned long ucText[ERRLOG_TEXT_SIZE]; *//* ASCIIZ of len ucTextSize-1 */ 38 /*1DF0 */ 39 40/*1DF0 */ unsigned short volatile ToHyChannel; 41/*1DF2 */ unsigned short volatile ToHySize; 42 /*1DF4 */ unsigned char volatile ToHyFlag; 43 /* !=0: msg for Hy waiting */ 44 /*1DF5 */ unsigned char volatile ToPcFlag; 45 /* !=0: msg for PC waiting */ 46/*1DF6 */ unsigned short volatile ToPcChannel; 47/*1DF8 */ unsigned short volatile ToPcSize; 48 /*1DFA */ unsigned char bRes1DBA[0x1E00 - 0x1DFA]; 49 /* 6 bytes */ 50 51/*1E00 */ unsigned char bRestOfEntryTbl[0x1F00 - 0x1E00]; 52/*1F00 */ unsigned long TrapTable[62]; 53 /*1FF8 */ unsigned char bRes1FF8[0x1FFB - 0x1FF8]; 54 /* low part of reset vetor */ 55/*1FFB */ unsigned char ToPcIntMetro; 56 /* notes: 57 * - metro has 32-bit boot ram - accessing 58 * ToPcInt and ToHyInt would be the same; 59 * so we moved ToPcInt to 1FFB. 60 * Because on the PC side both vars are 61 * readonly (reseting on int from E1 to PC), 62 * we can read both vars on both cards 63 * without destroying anything. 64 * - 1FFB is the high byte of the reset vector, 65 * so E1 side should NOT change this byte 66 * when writing! 67 */ 68/*1FFC */ unsigned char volatile ToHyNoDpramErrLog; 69 /* note: ToHyNoDpramErrLog is used to inform 70 * boot loader, not to use DPRAM based 71 * ErrLog; when DOS driver is rewritten 72 * this becomes obsolete 73 */ 74/*1FFD */ unsigned char bRes1FFD; 75 /*1FFE */ unsigned char ToPcInt; 76 /* E1_intclear; on CHAMP2: E1_intset */ 77 /*1FFF */ unsigned char ToHyInt; 78 /* E1_intset; on CHAMP2: E1_intclear */ 79} tErgDpram; 80 81/**********************************************/ 82/* PCI9050 controller local register offsets: */ 83/* copied from boarderg.c */ 84/**********************************************/ 85#define PCI9050_INTR_REG 0x4C /* Interrupt register */ 86#define PCI9050_USER_IO 0x51 /* User I/O register */ 87 88 /* bitmask for PCI9050_INTR_REG: */ 89#define PCI9050_INTR_REG_EN1 0x01 /* 1= enable (def.), 0= disable */ 90#define PCI9050_INTR_REG_POL1 0x02 /* 1= active high (def.), 0= active low */ 91#define PCI9050_INTR_REG_STAT1 0x04 /* 1= intr. active, 0= intr. not active (def.) */ 92#define PCI9050_INTR_REG_ENPCI 0x40 /* 1= PCI interrupts enable (def.) */ 93 94 /* bitmask for PCI9050_USER_IO: */ 95#define PCI9050_USER_IO_EN3 0x02 /* 1= disable , 0= enable (def.) */ 96#define PCI9050_USER_IO_DIR3 0x04 /* 1= output (def.), 0= input */ 97#define PCI9050_USER_IO_DAT3 0x08 /* 1= high (def.) , 0= low */ 98 99#define PCI9050_E1_RESET ( PCI9050_USER_IO_DIR3) /* 0x04 */ 100#define PCI9050_E1_RUN (PCI9050_USER_IO_DAT3|PCI9050_USER_IO_DIR3) /* 0x0C */ 101