1/* 2 * i8042 keyboard and mouse controller driver for Linux 3 * 4 * Copyright (c) 1999-2004 Vojtech Pavlik 5 */ 6 7/* 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License version 2 as published by 10 * the Free Software Foundation. 11 */ 12 13#include <linux/delay.h> 14#include <linux/module.h> 15#include <linux/moduleparam.h> 16#include <linux/interrupt.h> 17#include <linux/ioport.h> 18#include <linux/init.h> 19#include <linux/serio.h> 20#include <linux/err.h> 21#include <linux/rcupdate.h> 22#include <linux/platform_device.h> 23 24#include <asm/io.h> 25 26MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>"); 27MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver"); 28MODULE_LICENSE("GPL"); 29 30static unsigned int i8042_nokbd; 31module_param_named(nokbd, i8042_nokbd, bool, 0); 32MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port."); 33 34static unsigned int i8042_noaux; 35module_param_named(noaux, i8042_noaux, bool, 0); 36MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port."); 37 38static unsigned int i8042_nomux; 39module_param_named(nomux, i8042_nomux, bool, 0); 40MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present."); 41 42static unsigned int i8042_unlock; 43module_param_named(unlock, i8042_unlock, bool, 0); 44MODULE_PARM_DESC(unlock, "Ignore keyboard lock."); 45 46static unsigned int i8042_reset; 47module_param_named(reset, i8042_reset, bool, 0); 48MODULE_PARM_DESC(reset, "Reset controller during init and cleanup."); 49 50static unsigned int i8042_direct; 51module_param_named(direct, i8042_direct, bool, 0); 52MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode."); 53 54static unsigned int i8042_dumbkbd; 55module_param_named(dumbkbd, i8042_dumbkbd, bool, 0); 56MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard"); 57 58static unsigned int i8042_noloop; 59module_param_named(noloop, i8042_noloop, bool, 0); 60MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port"); 61 62static unsigned int i8042_blink_frequency = 500; 63module_param_named(panicblink, i8042_blink_frequency, uint, 0600); 64MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics"); 65 66#ifdef CONFIG_PNP 67static int i8042_nopnp; 68module_param_named(nopnp, i8042_nopnp, bool, 0); 69MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings"); 70#endif 71 72#define DEBUG 73#ifdef DEBUG 74static int i8042_debug; 75module_param_named(debug, i8042_debug, bool, 0600); 76MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off"); 77#endif 78 79#include "i8042.h" 80 81static DEFINE_SPINLOCK(i8042_lock); 82 83struct i8042_port { 84 struct serio *serio; 85 int irq; 86 unsigned char exists; 87 signed char mux; 88}; 89 90#define I8042_KBD_PORT_NO 0 91#define I8042_AUX_PORT_NO 1 92#define I8042_MUX_PORT_NO 2 93#define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2) 94 95static struct i8042_port i8042_ports[I8042_NUM_PORTS]; 96 97static unsigned char i8042_initial_ctr; 98static unsigned char i8042_ctr; 99static unsigned char i8042_mux_present; 100static unsigned char i8042_kbd_irq_registered; 101static unsigned char i8042_aux_irq_registered; 102static unsigned char i8042_suppress_kbd_ack; 103static struct platform_device *i8042_platform_device; 104 105static irqreturn_t i8042_interrupt(int irq, void *dev_id); 106 107/* 108 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to 109 * be ready for reading values from it / writing values to it. 110 * Called always with i8042_lock held. 111 */ 112 113static int i8042_wait_read(void) 114{ 115 int i = 0; 116 117 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) { 118 udelay(50); 119 i++; 120 } 121 return -(i == I8042_CTL_TIMEOUT); 122} 123 124static int i8042_wait_write(void) 125{ 126 int i = 0; 127 128 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) { 129 udelay(50); 130 i++; 131 } 132 return -(i == I8042_CTL_TIMEOUT); 133} 134 135/* 136 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers 137 * of the i8042 down the toilet. 138 */ 139 140static int i8042_flush(void) 141{ 142 unsigned long flags; 143 unsigned char data, str; 144 int i = 0; 145 146 spin_lock_irqsave(&i8042_lock, flags); 147 148 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) { 149 udelay(50); 150 data = i8042_read_data(); 151 i++; 152 dbg("%02x <- i8042 (flush, %s)", data, 153 str & I8042_STR_AUXDATA ? "aux" : "kbd"); 154 } 155 156 spin_unlock_irqrestore(&i8042_lock, flags); 157 158 return i; 159} 160 161/* 162 * i8042_command() executes a command on the i8042. It also sends the input 163 * parameter(s) of the commands to it, and receives the output value(s). The 164 * parameters are to be stored in the param array, and the output is placed 165 * into the same array. The number of the parameters and output values is 166 * encoded in bits 8-11 of the command number. 167 */ 168 169static int __i8042_command(unsigned char *param, int command) 170{ 171 int i, error; 172 173 if (i8042_noloop && command == I8042_CMD_AUX_LOOP) 174 return -1; 175 176 error = i8042_wait_write(); 177 if (error) 178 return error; 179 180 dbg("%02x -> i8042 (command)", command & 0xff); 181 i8042_write_command(command & 0xff); 182 183 for (i = 0; i < ((command >> 12) & 0xf); i++) { 184 error = i8042_wait_write(); 185 if (error) 186 return error; 187 dbg("%02x -> i8042 (parameter)", param[i]); 188 i8042_write_data(param[i]); 189 } 190 191 for (i = 0; i < ((command >> 8) & 0xf); i++) { 192 error = i8042_wait_read(); 193 if (error) { 194 dbg(" -- i8042 (timeout)"); 195 return error; 196 } 197 198 if (command == I8042_CMD_AUX_LOOP && 199 !(i8042_read_status() & I8042_STR_AUXDATA)) { 200 dbg(" -- i8042 (auxerr)"); 201 return -1; 202 } 203 204 param[i] = i8042_read_data(); 205 dbg("%02x <- i8042 (return)", param[i]); 206 } 207 208 return 0; 209} 210 211static int i8042_command(unsigned char *param, int command) 212{ 213 unsigned long flags; 214 int retval; 215 216 spin_lock_irqsave(&i8042_lock, flags); 217 retval = __i8042_command(param, command); 218 spin_unlock_irqrestore(&i8042_lock, flags); 219 220 return retval; 221} 222 223/* 224 * i8042_kbd_write() sends a byte out through the keyboard interface. 225 */ 226 227static int i8042_kbd_write(struct serio *port, unsigned char c) 228{ 229 unsigned long flags; 230 int retval = 0; 231 232 spin_lock_irqsave(&i8042_lock, flags); 233 234 if (!(retval = i8042_wait_write())) { 235 dbg("%02x -> i8042 (kbd-data)", c); 236 i8042_write_data(c); 237 } 238 239 spin_unlock_irqrestore(&i8042_lock, flags); 240 241 return retval; 242} 243 244/* 245 * i8042_aux_write() sends a byte out through the aux interface. 246 */ 247 248static int i8042_aux_write(struct serio *serio, unsigned char c) 249{ 250 struct i8042_port *port = serio->port_data; 251 252 return i8042_command(&c, port->mux == -1 ? 253 I8042_CMD_AUX_SEND : 254 I8042_CMD_MUX_SEND + port->mux); 255} 256 257/* 258 * i8042_start() is called by serio core when port is about to finish 259 * registering. It will mark port as existing so i8042_interrupt can 260 * start sending data through it. 261 */ 262static int i8042_start(struct serio *serio) 263{ 264 struct i8042_port *port = serio->port_data; 265 266 port->exists = 1; 267 mb(); 268 return 0; 269} 270 271/* 272 * i8042_stop() marks serio port as non-existing so i8042_interrupt 273 * will not try to send data to the port that is about to go away. 274 * The function is called by serio core as part of unregister procedure. 275 */ 276static void i8042_stop(struct serio *serio) 277{ 278 struct i8042_port *port = serio->port_data; 279 280 port->exists = 0; 281 synchronize_sched(); 282 port->serio = NULL; 283} 284 285/* 286 * i8042_interrupt() is the most important function in this driver - 287 * it handles the interrupts from the i8042, and sends incoming bytes 288 * to the upper layers. 289 */ 290 291static irqreturn_t i8042_interrupt(int irq, void *dev_id) 292{ 293 struct i8042_port *port; 294 unsigned long flags; 295 unsigned char str, data; 296 unsigned int dfl; 297 unsigned int port_no; 298 int ret = 1; 299 300 spin_lock_irqsave(&i8042_lock, flags); 301 str = i8042_read_status(); 302 if (unlikely(~str & I8042_STR_OBF)) { 303 spin_unlock_irqrestore(&i8042_lock, flags); 304 if (irq) dbg("Interrupt %d, without any data", irq); 305 ret = 0; 306 goto out; 307 } 308 data = i8042_read_data(); 309 spin_unlock_irqrestore(&i8042_lock, flags); 310 311 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) { 312 static unsigned long last_transmit; 313 static unsigned char last_str; 314 315 dfl = 0; 316 if (str & I8042_STR_MUXERR) { 317 dbg("MUX error, status is %02x, data is %02x", str, data); 318/* 319 * When MUXERR condition is signalled the data register can only contain 320 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately 321 * it is not always the case. Some KBCs also report 0xfc when there is 322 * nothing connected to the port while others sometimes get confused which 323 * port the data came from and signal error leaving the data intact. They 324 * _do not_ revert to legacy mode (actually I've never seen KBC reverting 325 * to legacy mode yet, when we see one we'll add proper handling). 326 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the 327 * rest assume that the data came from the same serio last byte 328 * was transmitted (if transmission happened not too long ago). 329 */ 330 331 switch (data) { 332 default: 333 if (time_before(jiffies, last_transmit + HZ/10)) { 334 str = last_str; 335 break; 336 } 337 /* fall through - report timeout */ 338 case 0xfc: 339 case 0xfd: 340 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break; 341 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break; 342 } 343 } 344 345 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3); 346 last_str = str; 347 last_transmit = jiffies; 348 } else { 349 350 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) | 351 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0); 352 353 port_no = (str & I8042_STR_AUXDATA) ? 354 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO; 355 } 356 357 port = &i8042_ports[port_no]; 358 359 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)", 360 data, port_no, irq, 361 dfl & SERIO_PARITY ? ", bad parity" : "", 362 dfl & SERIO_TIMEOUT ? ", timeout" : ""); 363 364 if (unlikely(i8042_suppress_kbd_ack)) 365 if (port_no == I8042_KBD_PORT_NO && 366 (data == 0xfa || data == 0xfe)) { 367 i8042_suppress_kbd_ack--; 368 goto out; 369 } 370 371 if (likely(port->exists)) 372 serio_interrupt(port->serio, data, dfl); 373 374 out: 375 return IRQ_RETVAL(ret); 376} 377 378/* 379 * i8042_enable_kbd_port enables keybaord port on chip 380 */ 381 382static int i8042_enable_kbd_port(void) 383{ 384 i8042_ctr &= ~I8042_CTR_KBDDIS; 385 i8042_ctr |= I8042_CTR_KBDINT; 386 387 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 388 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n"); 389 return -EIO; 390 } 391 392 return 0; 393} 394 395/* 396 * i8042_enable_aux_port enables AUX (mouse) port on chip 397 */ 398 399static int i8042_enable_aux_port(void) 400{ 401 i8042_ctr &= ~I8042_CTR_AUXDIS; 402 i8042_ctr |= I8042_CTR_AUXINT; 403 404 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 405 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n"); 406 return -EIO; 407 } 408 409 return 0; 410} 411 412/* 413 * i8042_enable_mux_ports enables 4 individual AUX ports after 414 * the controller has been switched into Multiplexed mode 415 */ 416 417static int i8042_enable_mux_ports(void) 418{ 419 unsigned char param; 420 int i; 421 422 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 423 i8042_command(¶m, I8042_CMD_MUX_PFX + i); 424 i8042_command(¶m, I8042_CMD_AUX_ENABLE); 425 } 426 427 return i8042_enable_aux_port(); 428} 429 430/* 431 * i8042_set_mux_mode checks whether the controller has an active 432 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode. 433 */ 434 435static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version) 436{ 437 438 unsigned char param; 439/* 440 * Get rid of bytes in the queue. 441 */ 442 443 i8042_flush(); 444 445/* 446 * Internal loopback test - send three bytes, they should come back from the 447 * mouse interface, the last should be version. 448 */ 449 450 param = 0xf0; 451 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xf0) 452 return -1; 453 param = mode ? 0x56 : 0xf6; 454 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6)) 455 return -1; 456 param = mode ? 0xa4 : 0xa5; 457 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5)) 458 return -1; 459 460 if (mux_version) 461 *mux_version = param; 462 463 return 0; 464} 465 466/* 467 * i8042_check_mux() checks whether the controller supports the PS/2 Active 468 * Multiplexing specification by Synaptics, Phoenix, Insyde and 469 * LCS/Telegraphics. 470 */ 471 472static int __devinit i8042_check_mux(void) 473{ 474 unsigned char mux_version; 475 476 if (i8042_set_mux_mode(1, &mux_version)) 477 return -1; 478 479 if (mux_version == 0xAC) 480 return -1; 481 482 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n", 483 (mux_version >> 4) & 0xf, mux_version & 0xf); 484 485/* 486 * Disable all muxed ports by disabling AUX. 487 */ 488 i8042_ctr |= I8042_CTR_AUXDIS; 489 i8042_ctr &= ~I8042_CTR_AUXINT; 490 491 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 492 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n"); 493 return -EIO; 494 } 495 496 i8042_mux_present = 1; 497 498 return 0; 499} 500 501/* 502 * The following is used to test AUX IRQ delivery. 503 */ 504static struct completion i8042_aux_irq_delivered __devinitdata; 505static int i8042_irq_being_tested __devinitdata; 506 507static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id) 508{ 509 unsigned long flags; 510 unsigned char str, data; 511 512 spin_lock_irqsave(&i8042_lock, flags); 513 str = i8042_read_status(); 514 if (str & I8042_STR_OBF) { 515 data = i8042_read_data(); 516 if (i8042_irq_being_tested && 517 data == 0xa5 && (str & I8042_STR_AUXDATA)) 518 complete(&i8042_aux_irq_delivered); 519 } 520 spin_unlock_irqrestore(&i8042_lock, flags); 521 522 return IRQ_HANDLED; 523} 524 525/* 526 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and 527 * verifies success by readinng CTR. Used when testing for presence of AUX 528 * port. 529 */ 530static int __devinit i8042_toggle_aux(int on) 531{ 532 unsigned char param; 533 int i; 534 535 if (i8042_command(¶m, 536 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE)) 537 return -1; 538 539 /* some chips need some time to set the I8042_CTR_AUXDIS bit */ 540 for (i = 0; i < 100; i++) { 541 udelay(50); 542 543 if (i8042_command(¶m, I8042_CMD_CTL_RCTR)) 544 return -1; 545 546 if (!(param & I8042_CTR_AUXDIS) == on) 547 return 0; 548 } 549 550 return -1; 551} 552 553/* 554 * i8042_check_aux() applies as much paranoia as it can at detecting 555 * the presence of an AUX interface. 556 */ 557 558static int __devinit i8042_check_aux(void) 559{ 560 int retval = -1; 561 int irq_registered = 0; 562 int aux_loop_broken = 0; 563 unsigned long flags; 564 unsigned char param; 565 566/* 567 * Get rid of bytes in the queue. 568 */ 569 570 i8042_flush(); 571 572/* 573 * Internal loopback test - filters out AT-type i8042's. Unfortunately 574 * SiS screwed up and their 5597 doesn't support the LOOP command even 575 * though it has an AUX port. 576 */ 577 578 param = 0x5a; 579 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP); 580 if (retval || param != 0x5a) { 581 582/* 583 * External connection test - filters out AT-soldered PS/2 i8042's 584 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error 585 * 0xfa - no error on some notebooks which ignore the spec 586 * Because it's common for chipsets to return error on perfectly functioning 587 * AUX ports, we test for this only when the LOOP command failed. 588 */ 589 590 if (i8042_command(¶m, I8042_CMD_AUX_TEST) || 591 (param && param != 0xfa && param != 0xff)) 592 return -1; 593 594/* 595 * If AUX_LOOP completed without error but returned unexpected data 596 * mark it as broken 597 */ 598 if (!retval) 599 aux_loop_broken = 1; 600 } 601 602/* 603 * Bit assignment test - filters out PS/2 i8042's in AT mode 604 */ 605 606 if (i8042_toggle_aux(0)) { 607 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n"); 608 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n"); 609 } 610 611 if (i8042_toggle_aux(1)) 612 return -1; 613 614/* 615 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and 616 * used it for a PCI card or somethig else. 617 */ 618 619 if (i8042_noloop || aux_loop_broken) { 620/* 621 * Without LOOP command we can't test AUX IRQ delivery. Assume the port 622 * is working and hope we are right. 623 */ 624 retval = 0; 625 goto out; 626 } 627 628 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED, 629 "i8042", i8042_platform_device)) 630 goto out; 631 632 irq_registered = 1; 633 634 if (i8042_enable_aux_port()) 635 goto out; 636 637 spin_lock_irqsave(&i8042_lock, flags); 638 639 init_completion(&i8042_aux_irq_delivered); 640 i8042_irq_being_tested = 1; 641 642 param = 0xa5; 643 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff); 644 645 spin_unlock_irqrestore(&i8042_lock, flags); 646 647 if (retval) 648 goto out; 649 650 if (wait_for_completion_timeout(&i8042_aux_irq_delivered, 651 msecs_to_jiffies(250)) == 0) { 652/* 653 * AUX IRQ was never delivered so we need to flush the controller to 654 * get rid of the byte we put there; otherwise keyboard may not work. 655 */ 656 i8042_flush(); 657 retval = -1; 658 } 659 660 out: 661 662/* 663 * Disable the interface. 664 */ 665 666 i8042_ctr |= I8042_CTR_AUXDIS; 667 i8042_ctr &= ~I8042_CTR_AUXINT; 668 669 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 670 retval = -1; 671 672 if (irq_registered) 673 free_irq(I8042_AUX_IRQ, i8042_platform_device); 674 675 return retval; 676} 677 678static int i8042_controller_check(void) 679{ 680 if (i8042_flush() == I8042_BUFFER_SIZE) { 681 printk(KERN_ERR "i8042.c: No controller found.\n"); 682 return -ENODEV; 683 } 684 685 return 0; 686} 687 688static int i8042_controller_selftest(void) 689{ 690 unsigned char param; 691 692 if (!i8042_reset) 693 return 0; 694 695 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { 696 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n"); 697 return -ENODEV; 698 } 699 700 if (param != I8042_RET_CTL_TEST) { 701 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n", 702 param, I8042_RET_CTL_TEST); 703 return -EIO; 704 } 705 706 return 0; 707} 708 709/* 710 * i8042_controller init initializes the i8042 controller, and, 711 * most importantly, sets it into non-xlated mode if that's 712 * desired. 713 */ 714 715static int i8042_controller_init(void) 716{ 717 unsigned long flags; 718 719/* 720 * Save the CTR for restoral on unload / reboot. 721 */ 722 723 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) { 724 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n"); 725 return -EIO; 726 } 727 728 i8042_initial_ctr = i8042_ctr; 729 730/* 731 * Disable the keyboard interface and interrupt. 732 */ 733 734 i8042_ctr |= I8042_CTR_KBDDIS; 735 i8042_ctr &= ~I8042_CTR_KBDINT; 736 737/* 738 * Handle keylock. 739 */ 740 741 spin_lock_irqsave(&i8042_lock, flags); 742 if (~i8042_read_status() & I8042_STR_KEYLOCK) { 743 if (i8042_unlock) 744 i8042_ctr |= I8042_CTR_IGNKEYLOCK; 745 else 746 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n"); 747 } 748 spin_unlock_irqrestore(&i8042_lock, flags); 749 750/* 751 * If the chip is configured into nontranslated mode by the BIOS, don't 752 * bother enabling translating and be happy. 753 */ 754 755 if (~i8042_ctr & I8042_CTR_XLATE) 756 i8042_direct = 1; 757 758/* 759 * Set nontranslated mode for the kbd interface if requested by an option. 760 * After this the kbd interface becomes a simple serial in/out, like the aux 761 * interface is. We don't do this by default, since it can confuse notebook 762 * BIOSes. 763 */ 764 765 if (i8042_direct) 766 i8042_ctr &= ~I8042_CTR_XLATE; 767 768/* 769 * Write CTR back. 770 */ 771 772 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 773 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n"); 774 return -EIO; 775 } 776 777 return 0; 778} 779 780 781/* 782 * Reset the controller and reset CRT to the original value set by BIOS. 783 */ 784 785static void i8042_controller_reset(void) 786{ 787 i8042_flush(); 788 789/* 790 * Disable both KBD and AUX interfaces so they don't get in the way 791 */ 792 793 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; 794 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); 795 796/* 797 * Disable MUX mode if present. 798 */ 799 800 if (i8042_mux_present) 801 i8042_set_mux_mode(0, NULL); 802 803/* 804 * Reset the controller if requested. 805 */ 806 807 i8042_controller_selftest(); 808 809/* 810 * Restore the original control register setting. 811 */ 812 813 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) 814 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n"); 815} 816 817 818/* 819 * i8042_panic_blink() will flash the keyboard LEDs and is called when 820 * kernel panics. Flashing LEDs is useful for users running X who may 821 * not see the console and will help distingushing panics from "real" 822 * lockups. 823 * 824 * Note that DELAY has a limit of 10ms so we will not get stuck here 825 * waiting for KBC to free up even if KBD interrupt is off 826 */ 827 828#define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0) 829 830static long i8042_panic_blink(long count) 831{ 832 long delay = 0; 833 static long last_blink; 834 static char led; 835 836 /* 837 * We expect frequency to be about 1/2s. KDB uses about 1s. 838 * Make sure they are different. 839 */ 840 if (!i8042_blink_frequency) 841 return 0; 842 if (count - last_blink < i8042_blink_frequency) 843 return 0; 844 845 led ^= 0x01 | 0x04; 846 while (i8042_read_status() & I8042_STR_IBF) 847 DELAY; 848 dbg("%02x -> i8042 (panic blink)", 0xed); 849 i8042_suppress_kbd_ack = 2; 850 i8042_write_data(0xed); /* set leds */ 851 DELAY; 852 while (i8042_read_status() & I8042_STR_IBF) 853 DELAY; 854 DELAY; 855 dbg("%02x -> i8042 (panic blink)", led); 856 i8042_write_data(led); 857 DELAY; 858 last_blink = count; 859 return delay; 860} 861 862#undef DELAY 863 864#ifdef CONFIG_PM 865/* 866 * Here we try to restore the original BIOS settings. We only want to 867 * do that once, when we really suspend, not when we taking memory 868 * snapshot for swsusp (in this case we'll perform required cleanup 869 * as part of shutdown process). 870 */ 871 872static int i8042_suspend(struct platform_device *dev, pm_message_t state) 873{ 874 if (dev->dev.power.power_state.event != state.event) { 875 if (state.event == PM_EVENT_SUSPEND) 876 i8042_controller_reset(); 877 878 dev->dev.power.power_state = state; 879 } 880 881 return 0; 882} 883 884 885/* 886 * Here we try to reset everything back to a state in which suspended 887 */ 888 889static int i8042_resume(struct platform_device *dev) 890{ 891 int error; 892 893/* 894 * Do not bother with restoring state if we haven't suspened yet 895 */ 896 if (dev->dev.power.power_state.event == PM_EVENT_ON) 897 return 0; 898 899 error = i8042_controller_check(); 900 if (error) 901 return error; 902 903 error = i8042_controller_selftest(); 904 if (error) 905 return error; 906 907/* 908 * Restore original CTR value and disable all ports 909 */ 910 911 i8042_ctr = i8042_initial_ctr; 912 if (i8042_direct) 913 i8042_ctr &= ~I8042_CTR_XLATE; 914 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS; 915 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT); 916 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 917 printk(KERN_ERR "i8042: Can't write CTR to resume\n"); 918 return -EIO; 919 } 920 921 if (i8042_mux_present) { 922 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports()) 923 printk(KERN_WARNING 924 "i8042: failed to resume active multiplexor, " 925 "mouse won't work.\n"); 926 } else if (i8042_ports[I8042_AUX_PORT_NO].serio) 927 i8042_enable_aux_port(); 928 929 if (i8042_ports[I8042_KBD_PORT_NO].serio) 930 i8042_enable_kbd_port(); 931 932 i8042_interrupt(0, NULL); 933 934 dev->dev.power.power_state = PMSG_ON; 935 936 return 0; 937} 938#endif /* CONFIG_PM */ 939 940/* 941 * We need to reset the 8042 back to original mode on system shutdown, 942 * because otherwise BIOSes will be confused. 943 */ 944 945static void i8042_shutdown(struct platform_device *dev) 946{ 947 i8042_controller_reset(); 948} 949 950static int __devinit i8042_create_kbd_port(void) 951{ 952 struct serio *serio; 953 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO]; 954 955 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 956 if (!serio) 957 return -ENOMEM; 958 959 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL; 960 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write; 961 serio->start = i8042_start; 962 serio->stop = i8042_stop; 963 serio->port_data = port; 964 serio->dev.parent = &i8042_platform_device->dev; 965 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name)); 966 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); 967 968 port->serio = serio; 969 port->irq = I8042_KBD_IRQ; 970 971 return 0; 972} 973 974static int __devinit i8042_create_aux_port(int idx) 975{ 976 struct serio *serio; 977 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx; 978 struct i8042_port *port = &i8042_ports[port_no]; 979 980 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 981 if (!serio) 982 return -ENOMEM; 983 984 serio->id.type = SERIO_8042; 985 serio->write = i8042_aux_write; 986 serio->start = i8042_start; 987 serio->stop = i8042_stop; 988 serio->port_data = port; 989 serio->dev.parent = &i8042_platform_device->dev; 990 if (idx < 0) { 991 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name)); 992 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); 993 } else { 994 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx); 995 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1); 996 } 997 998 port->serio = serio; 999 port->mux = idx; 1000 port->irq = I8042_AUX_IRQ; 1001 1002 return 0; 1003} 1004 1005static void __devinit i8042_free_kbd_port(void) 1006{ 1007 kfree(i8042_ports[I8042_KBD_PORT_NO].serio); 1008 i8042_ports[I8042_KBD_PORT_NO].serio = NULL; 1009} 1010 1011static void __devinit i8042_free_aux_ports(void) 1012{ 1013 int i; 1014 1015 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) { 1016 kfree(i8042_ports[i].serio); 1017 i8042_ports[i].serio = NULL; 1018 } 1019} 1020 1021static void __devinit i8042_register_ports(void) 1022{ 1023 int i; 1024 1025 for (i = 0; i < I8042_NUM_PORTS; i++) { 1026 if (i8042_ports[i].serio) { 1027 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n", 1028 i8042_ports[i].serio->name, 1029 (unsigned long) I8042_DATA_REG, 1030 (unsigned long) I8042_COMMAND_REG, 1031 i8042_ports[i].irq); 1032 serio_register_port(i8042_ports[i].serio); 1033 } 1034 } 1035} 1036 1037static void __devinit i8042_unregister_ports(void) 1038{ 1039 int i; 1040 1041 for (i = 0; i < I8042_NUM_PORTS; i++) { 1042 if (i8042_ports[i].serio) { 1043 serio_unregister_port(i8042_ports[i].serio); 1044 i8042_ports[i].serio = NULL; 1045 } 1046 } 1047} 1048 1049static void i8042_free_irqs(void) 1050{ 1051 if (i8042_aux_irq_registered) 1052 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1053 if (i8042_kbd_irq_registered) 1054 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1055 1056 i8042_aux_irq_registered = i8042_kbd_irq_registered = 0; 1057} 1058 1059static int __devinit i8042_setup_aux(void) 1060{ 1061 int (*aux_enable)(void); 1062 int error; 1063 int i; 1064 1065 if (i8042_check_aux()) 1066 return -ENODEV; 1067 1068 if (i8042_nomux || i8042_check_mux()) { 1069 error = i8042_create_aux_port(-1); 1070 if (error) 1071 goto err_free_ports; 1072 aux_enable = i8042_enable_aux_port; 1073 } else { 1074 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 1075 error = i8042_create_aux_port(i); 1076 if (error) 1077 goto err_free_ports; 1078 } 1079 aux_enable = i8042_enable_mux_ports; 1080 } 1081 1082 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED, 1083 "i8042", i8042_platform_device); 1084 if (error) 1085 goto err_free_ports; 1086 1087 if (aux_enable()) 1088 goto err_free_irq; 1089 1090 i8042_aux_irq_registered = 1; 1091 return 0; 1092 1093 err_free_irq: 1094 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1095 err_free_ports: 1096 i8042_free_aux_ports(); 1097 return error; 1098} 1099 1100static int __devinit i8042_setup_kbd(void) 1101{ 1102 int error; 1103 1104 error = i8042_create_kbd_port(); 1105 if (error) 1106 return error; 1107 1108 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED, 1109 "i8042", i8042_platform_device); 1110 if (error) 1111 goto err_free_port; 1112 1113 error = i8042_enable_kbd_port(); 1114 if (error) 1115 goto err_free_irq; 1116 1117 i8042_kbd_irq_registered = 1; 1118 return 0; 1119 1120 err_free_irq: 1121 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1122 err_free_port: 1123 i8042_free_kbd_port(); 1124 return error; 1125} 1126 1127static int __devinit i8042_probe(struct platform_device *dev) 1128{ 1129 int error; 1130 1131 error = i8042_controller_selftest(); 1132 if (error) 1133 return error; 1134 1135 error = i8042_controller_init(); 1136 if (error) 1137 return error; 1138 1139 if (!i8042_noaux) { 1140 error = i8042_setup_aux(); 1141 if (error && error != -ENODEV && error != -EBUSY) 1142 goto out_fail; 1143 } 1144 1145 if (!i8042_nokbd) { 1146 error = i8042_setup_kbd(); 1147 if (error) 1148 goto out_fail; 1149 } 1150 1151/* 1152 * Ok, everything is ready, let's register all serio ports 1153 */ 1154 i8042_register_ports(); 1155 1156 return 0; 1157 1158 out_fail: 1159 i8042_free_aux_ports(); /* in case KBD failed but AUX not */ 1160 i8042_free_irqs(); 1161 i8042_controller_reset(); 1162 1163 return error; 1164} 1165 1166static int __devexit i8042_remove(struct platform_device *dev) 1167{ 1168 i8042_unregister_ports(); 1169 i8042_free_irqs(); 1170 i8042_controller_reset(); 1171 1172 return 0; 1173} 1174 1175static struct platform_driver i8042_driver = { 1176 .driver = { 1177 .name = "i8042", 1178 .owner = THIS_MODULE, 1179 }, 1180 .probe = i8042_probe, 1181 .remove = __devexit_p(i8042_remove), 1182 .shutdown = i8042_shutdown, 1183#ifdef CONFIG_PM 1184 .suspend = i8042_suspend, 1185 .resume = i8042_resume, 1186#endif 1187}; 1188 1189static int __init i8042_init(void) 1190{ 1191 int err; 1192 1193 dbg_init(); 1194 1195 err = i8042_platform_init(); 1196 if (err) 1197 return err; 1198 1199 err = i8042_controller_check(); 1200 if (err) 1201 goto err_platform_exit; 1202 1203 err = platform_driver_register(&i8042_driver); 1204 if (err) 1205 goto err_platform_exit; 1206 1207 i8042_platform_device = platform_device_alloc("i8042", -1); 1208 if (!i8042_platform_device) { 1209 err = -ENOMEM; 1210 goto err_unregister_driver; 1211 } 1212 1213 err = platform_device_add(i8042_platform_device); 1214 if (err) 1215 goto err_free_device; 1216 1217 panic_blink = i8042_panic_blink; 1218 1219 return 0; 1220 1221 err_free_device: 1222 platform_device_put(i8042_platform_device); 1223 err_unregister_driver: 1224 platform_driver_unregister(&i8042_driver); 1225 err_platform_exit: 1226 i8042_platform_exit(); 1227 1228 return err; 1229} 1230 1231static void __exit i8042_exit(void) 1232{ 1233 platform_device_unregister(i8042_platform_device); 1234 platform_driver_unregister(&i8042_driver); 1235 i8042_platform_exit(); 1236 1237 panic_blink = NULL; 1238} 1239 1240module_init(i8042_init); 1241module_exit(i8042_exit); 1242