1/* 2 * i6300esb: Watchdog timer driver for Intel 6300ESB chipset 3 * 4 * (c) Copyright 2004 Google Inc. 5 * (c) Copyright 2005 David H�rdeman <david@2gen.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 * 12 * based on i810-tco.c which is in turn based on softdog.c 13 * 14 * The timer is implemented in the following I/O controller hubs: 15 * (See the intel documentation on http://developer.intel.com.) 16 * 6300ESB chip : document number 300641-003 17 * 18 * 2004YYZZ Ross Biro 19 * Initial version 0.01 20 * 2004YYZZ Ross Biro 21 * Version 0.02 22 * 20050210 David H�rdeman <david@2gen.com> 23 * Ported driver to kernel 2.6 24 */ 25 26/* 27 * Includes, defines, variables, module parameters, ... 28 */ 29 30#include <linux/module.h> 31#include <linux/types.h> 32#include <linux/kernel.h> 33#include <linux/fs.h> 34#include <linux/mm.h> 35#include <linux/miscdevice.h> 36#include <linux/watchdog.h> 37#include <linux/reboot.h> 38#include <linux/init.h> 39#include <linux/pci.h> 40#include <linux/ioport.h> 41 42#include <asm/uaccess.h> 43#include <asm/io.h> 44 45/* Module and version information */ 46#define ESB_VERSION "0.03" 47#define ESB_MODULE_NAME "i6300ESB timer" 48#define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION 49#define PFX ESB_MODULE_NAME ": " 50 51/* PCI configuration registers */ 52#define ESB_CONFIG_REG 0x60 /* Config register */ 53#define ESB_LOCK_REG 0x68 /* WDT lock register */ 54 55/* Memory mapped registers */ 56#define ESB_TIMER1_REG BASEADDR + 0x00 /* Timer1 value after each reset */ 57#define ESB_TIMER2_REG BASEADDR + 0x04 /* Timer2 value after each reset */ 58#define ESB_GINTSR_REG BASEADDR + 0x08 /* General Interrupt Status Register */ 59#define ESB_RELOAD_REG BASEADDR + 0x0c /* Reload register */ 60 61/* Lock register bits */ 62#define ESB_WDT_FUNC ( 0x01 << 2 ) /* Watchdog functionality */ 63#define ESB_WDT_ENABLE ( 0x01 << 1 ) /* Enable WDT */ 64#define ESB_WDT_LOCK ( 0x01 << 0 ) /* Lock (nowayout) */ 65 66/* Config register bits */ 67#define ESB_WDT_REBOOT ( 0x01 << 5 ) /* Enable reboot on timeout */ 68#define ESB_WDT_FREQ ( 0x01 << 2 ) /* Decrement frequency */ 69#define ESB_WDT_INTTYPE ( 0x11 << 0 ) /* Interrupt type on timer1 timeout */ 70 71/* Reload register bits */ 72#define ESB_WDT_RELOAD ( 0x01 << 8 ) /* prevent timeout */ 73 74/* Magic constants */ 75#define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */ 76#define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */ 77 78/* internal variables */ 79static void __iomem *BASEADDR; 80static spinlock_t esb_lock; /* Guards the hardware */ 81static unsigned long timer_alive; 82static struct pci_dev *esb_pci; 83static unsigned short triggered; /* The status of the watchdog upon boot */ 84static char esb_expect_close; 85 86/* module parameters */ 87#define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (1<heartbeat<2*1023) */ 88static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */ 89module_param(heartbeat, int, 0); 90MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<heartbeat<2046, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); 91 92static int nowayout = WATCHDOG_NOWAYOUT; 93module_param(nowayout, int, 0); 94MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 95 96/* 97 * Some i6300ESB specific functions 98 */ 99 100/* 101 * Prepare for reloading the timer by unlocking the proper registers. 102 * This is performed by first writing 0x80 followed by 0x86 to the 103 * reload register. After this the appropriate registers can be written 104 * to once before they need to be unlocked again. 105 */ 106static inline void esb_unlock_registers(void) { 107 writeb(ESB_UNLOCK1, ESB_RELOAD_REG); 108 writeb(ESB_UNLOCK2, ESB_RELOAD_REG); 109} 110 111static void esb_timer_start(void) 112{ 113 u8 val; 114 115 /* Enable or Enable + Lock? */ 116 val = 0x02 | (nowayout ? 0x01 : 0x00); 117 118 pci_write_config_byte(esb_pci, ESB_LOCK_REG, val); 119} 120 121static int esb_timer_stop(void) 122{ 123 u8 val; 124 125 spin_lock(&esb_lock); 126 /* First, reset timers as suggested by the docs */ 127 esb_unlock_registers(); 128 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG); 129 /* Then disable the WDT */ 130 pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0); 131 pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val); 132 spin_unlock(&esb_lock); 133 134 /* Returns 0 if the timer was disabled, non-zero otherwise */ 135 return (val & 0x01); 136} 137 138static void esb_timer_keepalive(void) 139{ 140 spin_lock(&esb_lock); 141 esb_unlock_registers(); 142 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG); 143 spin_unlock(&esb_lock); 144} 145 146static int esb_timer_set_heartbeat(int time) 147{ 148 u32 val; 149 150 if (time < 0x1 || time > (2 * 0x03ff)) 151 return -EINVAL; 152 153 spin_lock(&esb_lock); 154 155 /* We shift by 9, so if we are passed a value of 1 sec, 156 * val will be 1 << 9 = 512, then write that to two 157 * timers => 2 * 512 = 1024 (which is decremented at 1KHz) 158 */ 159 val = time << 9; 160 161 /* Write timer 1 */ 162 esb_unlock_registers(); 163 writel(val, ESB_TIMER1_REG); 164 165 /* Write timer 2 */ 166 esb_unlock_registers(); 167 writel(val, ESB_TIMER2_REG); 168 169 /* Reload */ 170 esb_unlock_registers(); 171 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG); 172 173 174 /* Done */ 175 heartbeat = time; 176 spin_unlock(&esb_lock); 177 return 0; 178} 179 180static int esb_timer_read (void) 181{ 182 u32 count; 183 184 /* This isn't documented, and doesn't take into 185 * acount which stage is running, but it looks 186 * like a 20 bit count down, so we might as well report it. 187 */ 188 pci_read_config_dword(esb_pci, 0x64, &count); 189 return (int)count; 190} 191 192/* 193 * /dev/watchdog handling 194 */ 195 196static int esb_open (struct inode *inode, struct file *file) 197{ 198 /* /dev/watchdog can only be opened once */ 199 if (test_and_set_bit(0, &timer_alive)) 200 return -EBUSY; 201 202 /* Reload and activate timer */ 203 esb_timer_keepalive (); 204 esb_timer_start (); 205 206 return nonseekable_open(inode, file); 207} 208 209static int esb_release (struct inode *inode, struct file *file) 210{ 211 /* Shut off the timer. */ 212 if (esb_expect_close == 42) { 213 esb_timer_stop (); 214 } else { 215 printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n"); 216 esb_timer_keepalive (); 217 } 218 clear_bit(0, &timer_alive); 219 esb_expect_close = 0; 220 return 0; 221} 222 223static ssize_t esb_write (struct file *file, const char __user *data, 224 size_t len, loff_t * ppos) 225{ 226 /* See if we got the magic character 'V' and reload the timer */ 227 if (len) { 228 if (!nowayout) { 229 size_t i; 230 231 /* note: just in case someone wrote the magic character 232 * five months ago... */ 233 esb_expect_close = 0; 234 235 /* scan to see whether or not we got the magic character */ 236 for (i = 0; i != len; i++) { 237 char c; 238 if(get_user(c, data+i)) 239 return -EFAULT; 240 if (c == 'V') 241 esb_expect_close = 42; 242 } 243 } 244 245 /* someone wrote to us, we should reload the timer */ 246 esb_timer_keepalive (); 247 } 248 return len; 249} 250 251static int esb_ioctl (struct inode *inode, struct file *file, 252 unsigned int cmd, unsigned long arg) 253{ 254 int new_options, retval = -EINVAL; 255 int new_heartbeat; 256 void __user *argp = (void __user *)arg; 257 int __user *p = argp; 258 static struct watchdog_info ident = { 259 .options = WDIOF_SETTIMEOUT | 260 WDIOF_KEEPALIVEPING | 261 WDIOF_MAGICCLOSE, 262 .firmware_version = 0, 263 .identity = ESB_MODULE_NAME, 264 }; 265 266 switch (cmd) { 267 case WDIOC_GETSUPPORT: 268 return copy_to_user(argp, &ident, 269 sizeof (ident)) ? -EFAULT : 0; 270 271 case WDIOC_GETSTATUS: 272 return put_user (esb_timer_read(), p); 273 274 case WDIOC_GETBOOTSTATUS: 275 return put_user (triggered, p); 276 277 case WDIOC_KEEPALIVE: 278 esb_timer_keepalive (); 279 return 0; 280 281 case WDIOC_SETOPTIONS: 282 { 283 if (get_user (new_options, p)) 284 return -EFAULT; 285 286 if (new_options & WDIOS_DISABLECARD) { 287 esb_timer_stop (); 288 retval = 0; 289 } 290 291 if (new_options & WDIOS_ENABLECARD) { 292 esb_timer_keepalive (); 293 esb_timer_start (); 294 retval = 0; 295 } 296 297 return retval; 298 } 299 300 case WDIOC_SETTIMEOUT: 301 { 302 if (get_user(new_heartbeat, p)) 303 return -EFAULT; 304 305 if (esb_timer_set_heartbeat(new_heartbeat)) 306 return -EINVAL; 307 308 esb_timer_keepalive (); 309 /* Fall */ 310 } 311 312 case WDIOC_GETTIMEOUT: 313 return put_user(heartbeat, p); 314 315 default: 316 return -ENOTTY; 317 } 318} 319 320/* 321 * Notify system 322 */ 323 324static int esb_notify_sys (struct notifier_block *this, unsigned long code, void *unused) 325{ 326 if (code==SYS_DOWN || code==SYS_HALT) { 327 /* Turn the WDT off */ 328 esb_timer_stop (); 329 } 330 331 return NOTIFY_DONE; 332} 333 334/* 335 * Kernel Interfaces 336 */ 337 338static const struct file_operations esb_fops = { 339 .owner = THIS_MODULE, 340 .llseek = no_llseek, 341 .write = esb_write, 342 .ioctl = esb_ioctl, 343 .open = esb_open, 344 .release = esb_release, 345}; 346 347static struct miscdevice esb_miscdev = { 348 .minor = WATCHDOG_MINOR, 349 .name = "watchdog", 350 .fops = &esb_fops, 351}; 352 353static struct notifier_block esb_notifier = { 354 .notifier_call = esb_notify_sys, 355}; 356 357/* 358 * Data for PCI driver interface 359 * 360 * This data only exists for exporting the supported 361 * PCI ids via MODULE_DEVICE_TABLE. We do not actually 362 * register a pci_driver, because someone else might one day 363 * want to register another driver on the same PCI id. 364 */ 365static struct pci_device_id esb_pci_tbl[] = { 366 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), }, 367 { 0, }, /* End of list */ 368}; 369MODULE_DEVICE_TABLE (pci, esb_pci_tbl); 370 371/* 372 * Init & exit routines 373 */ 374 375static unsigned char __init esb_getdevice (void) 376{ 377 u8 val1; 378 unsigned short val2; 379 380 struct pci_dev *dev = NULL; 381 /* 382 * Find the PCI device 383 */ 384 385 for_each_pci_dev(dev) { 386 if (pci_match_id(esb_pci_tbl, dev)) { 387 esb_pci = dev; 388 break; 389 } 390 } 391 392 if (esb_pci) { 393 if (pci_enable_device(esb_pci)) { 394 printk (KERN_ERR PFX "failed to enable device\n"); 395 goto err_devput; 396 } 397 398 if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) { 399 printk (KERN_ERR PFX "failed to request region\n"); 400 goto err_disable; 401 } 402 403 BASEADDR = ioremap(pci_resource_start(esb_pci, 0), 404 pci_resource_len(esb_pci, 0)); 405 if (BASEADDR == NULL) { 406 /* Something's wrong here, BASEADDR has to be set */ 407 printk (KERN_ERR PFX "failed to get BASEADDR\n"); 408 goto err_release; 409 } 410 411 /* 412 * The watchdog has two timers, it can be setup so that the 413 * expiry of timer1 results in an interrupt and the expiry of 414 * timer2 results in a reboot. We set it to not generate 415 * any interrupts as there is not much we can do with it 416 * right now. 417 * 418 * We also enable reboots and set the timer frequency to 419 * the PCI clock divided by 2^15 (approx 1KHz). 420 */ 421 pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003); 422 423 /* Check that the WDT isn't already locked */ 424 pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1); 425 if (val1 & ESB_WDT_LOCK) 426 printk (KERN_WARNING PFX "nowayout already set\n"); 427 428 /* Set the timer to watchdog mode and disable it for now */ 429 pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00); 430 431 /* Check if the watchdog was previously triggered */ 432 esb_unlock_registers(); 433 val2 = readw(ESB_RELOAD_REG); 434 triggered = (val2 & (0x01 << 9) >> 9); 435 436 /* Reset trigger flag and timers */ 437 esb_unlock_registers(); 438 writew((0x11 << 8), ESB_RELOAD_REG); 439 440 /* Done */ 441 return 1; 442 443err_release: 444 pci_release_region(esb_pci, 0); 445err_disable: 446 pci_disable_device(esb_pci); 447err_devput: 448 pci_dev_put(esb_pci); 449 } 450 return 0; 451} 452 453static int __init watchdog_init (void) 454{ 455 int ret; 456 457 spin_lock_init(&esb_lock); 458 459 /* Check whether or not the hardware watchdog is there */ 460 if (!esb_getdevice () || esb_pci == NULL) 461 return -ENODEV; 462 463 /* Check that the heartbeat value is within it's range ; if not reset to the default */ 464 if (esb_timer_set_heartbeat (heartbeat)) { 465 esb_timer_set_heartbeat (WATCHDOG_HEARTBEAT); 466 printk(KERN_INFO PFX "heartbeat value must be 1<heartbeat<2046, using %d\n", 467 heartbeat); 468 } 469 470 ret = register_reboot_notifier(&esb_notifier); 471 if (ret != 0) { 472 printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n", 473 ret); 474 goto err_unmap; 475 } 476 477 ret = misc_register(&esb_miscdev); 478 if (ret != 0) { 479 printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n", 480 WATCHDOG_MINOR, ret); 481 goto err_notifier; 482 } 483 484 esb_timer_stop (); 485 486 printk (KERN_INFO PFX "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n", 487 BASEADDR, heartbeat, nowayout); 488 489 return 0; 490 491err_notifier: 492 unregister_reboot_notifier(&esb_notifier); 493err_unmap: 494 iounmap(BASEADDR); 495/* err_release: */ 496 pci_release_region(esb_pci, 0); 497/* err_disable: */ 498 pci_disable_device(esb_pci); 499/* err_devput: */ 500 pci_dev_put(esb_pci); 501 return ret; 502} 503 504static void __exit watchdog_cleanup (void) 505{ 506 /* Stop the timer before we leave */ 507 if (!nowayout) 508 esb_timer_stop (); 509 510 /* Deregister */ 511 misc_deregister(&esb_miscdev); 512 unregister_reboot_notifier(&esb_notifier); 513 iounmap(BASEADDR); 514 pci_release_region(esb_pci, 0); 515 pci_disable_device(esb_pci); 516 pci_dev_put(esb_pci); 517} 518 519module_init(watchdog_init); 520module_exit(watchdog_cleanup); 521 522MODULE_AUTHOR("Ross Biro and David H�rdeman"); 523MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets"); 524MODULE_LICENSE("GPL"); 525MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); 526