1/*
2 * pata_ali.c 	- ALI 15x3 PATA for new ATA layer
3 *			  (C) 2005 Red Hat Inc
4 *			  Alan Cox <alan@redhat.com>
5 *
6 * based in part upon
7 * linux/drivers/ide/pci/alim15x3.c		Version 0.17	2003/01/02
8 *
9 *  Copyright (C) 1998-2000 Michel Aubry, Maintainer
10 *  Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
11 *  Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
12 *
13 *  Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
14 *  May be copied or modified under the terms of the GNU General Public License
15 *  Copyright (C) 2002 Alan Cox <alan@redhat.com>
16 *  ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
17 *
18 *  Documentation
19 *	Chipset documentation available under NDA only
20 *
21 *  TODO/CHECK
22 *	Cannot have ATAPI on both master & slave for rev < c2 (???) but
23 *	otherwise should do atapi DMA.
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/init.h>
30#include <linux/blkdev.h>
31#include <linux/delay.h>
32#include <scsi/scsi_host.h>
33#include <linux/libata.h>
34#include <linux/dmi.h>
35
36#define DRV_NAME "pata_ali"
37#define DRV_VERSION "0.7.4"
38
39/*
40 *	Cable special cases
41 */
42
43static struct dmi_system_id cable_dmi_table[] = {
44	{
45		.ident = "HP Pavilion N5430",
46		.matches = {
47			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
48			DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"),
49		},
50	},
51	{ }
52};
53
54static int ali_cable_override(struct pci_dev *pdev)
55{
56	/* Fujitsu P2000 */
57	if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
58	   	return 1;
59	/* Systems by DMI */
60	if (dmi_check_system(cable_dmi_table))
61		return 1;
62	return 0;
63}
64
65/**
66 *	ali_c2_cable_detect	-	cable detection
67 *	@ap: ATA port
68 *
69 *	Perform cable detection for C2 and later revisions
70 */
71
72static int ali_c2_cable_detect(struct ata_port *ap)
73{
74	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
75	u8 ata66;
76
77	/* Certain laptops use short but suitable cables and don't
78	   implement the detect logic */
79
80	if (ali_cable_override(pdev))
81		return ATA_CBL_PATA40_SHORT;
82
83	/* Host view cable detect 0x4A bit 0 primary bit 1 secondary
84	   Bit set for 40 pin */
85	pci_read_config_byte(pdev, 0x4A, &ata66);
86	if (ata66 & (1 << ap->port_no))
87		return ATA_CBL_PATA40;
88	else
89		return ATA_CBL_PATA80;
90}
91
92/**
93 *	ali_20_filter		-	filter for earlier ALI DMA
94 *	@ap: ALi ATA port
95 *	@adev: attached device
96 *
97 *	Ensure that we do not do DMA on CD devices. We may be able to
98 *	fix that later on. Also ensure we do not do UDMA on WDC drives
99 */
100
101static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask)
102{
103	char model_num[ATA_ID_PROD_LEN + 1];
104	/* No DMA on anything but a disk for now */
105	if (adev->class != ATA_DEV_ATA)
106		mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
107	ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
108	if (strstr(model_num, "WDC"))
109		return mask &= ~ATA_MASK_UDMA;
110	return ata_pci_default_filter(adev, mask);
111}
112
113/**
114 *	ali_fifo_control	-	FIFO manager
115 *	@ap: ALi channel to control
116 *	@adev: device for FIFO control
117 *	@on: 0 for off 1 for on
118 *
119 *	Enable or disable the FIFO on a given device. Because of the way the
120 *	ALi FIFO works it provides a boost on ATA disk but can be confused by
121 *	ATAPI and we must therefore manage it.
122 */
123
124static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
125{
126	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
127	int pio_fifo = 0x54 + ap->port_no;
128	u8 fifo;
129	int shift = 4 * adev->devno;
130
131	/* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
132	   0x00. Not all the docs agree but the behaviour we now use is the
133	   one stated in the BIOS Programming Guide */
134
135	pci_read_config_byte(pdev, pio_fifo, &fifo);
136	fifo &= ~(0x0F << shift);
137	if (on)
138		fifo |= (on << shift);
139	pci_write_config_byte(pdev, pio_fifo, fifo);
140}
141
142/**
143 *	ali_program_modes	-	load mode registers
144 *	@ap: ALi channel to load
145 *	@adev: Device the timing is for
146 *	@cmd: Command timing
147 *	@data: Data timing
148 *	@ultra: UDMA timing or zero for off
149 *
150 *	Loads the timing registers for cmd/data and disable UDMA if
151 *	ultra is zero. If ultra is set then load and enable the UDMA
152 *	timing but do not touch the command/data timing.
153 */
154
155static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
156{
157	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
158	int cas = 0x58 + 4 * ap->port_no;	/* Command timing */
159	int cbt = 0x59 + 4 * ap->port_no;	/* Command timing */
160	int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
161	int udmat = 0x56 + ap->port_no;	/* UDMA timing */
162	int shift = 4 * adev->devno;
163	u8 udma;
164
165	if (t != NULL) {
166		t->setup = FIT(t->setup, 1, 8) & 7;
167		t->act8b = FIT(t->act8b, 1, 8) & 7;
168		t->rec8b = FIT(t->rec8b, 1, 16) & 15;
169		t->active = FIT(t->active, 1, 8) & 7;
170		t->recover = FIT(t->recover, 1, 16) & 15;
171
172		pci_write_config_byte(pdev, cas, t->setup);
173		pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
174		pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
175	}
176
177	/* Set up the UDMA enable */
178	pci_read_config_byte(pdev, udmat, &udma);
179	udma &= ~(0x0F << shift);
180	udma |= ultra << shift;
181	pci_write_config_byte(pdev, udmat, udma);
182}
183
184
185static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
186{
187	struct ata_device *pair = ata_dev_pair(adev);
188	struct ata_timing t;
189	unsigned long T =  1000000000 / 33333;	/* PCI clock based */
190
191	ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
192	if (pair) {
193		struct ata_timing p;
194		ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
195		ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
196		if (pair->dma_mode) {
197			ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
198			ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
199		}
200	}
201
202	/* PIO FIFO is only permitted on ATA disk */
203	if (adev->class != ATA_DEV_ATA)
204		ali_fifo_control(ap, adev, 0x00);
205	ali_program_modes(ap, adev, &t, 0);
206	if (adev->class == ATA_DEV_ATA)
207		ali_fifo_control(ap, adev, 0x05);
208
209}
210
211
212static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
213{
214	static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
215	struct ata_device *pair = ata_dev_pair(adev);
216	struct ata_timing t;
217	unsigned long T =  1000000000 / 33333;	/* PCI clock based */
218	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
219
220
221	if (adev->class == ATA_DEV_ATA)
222		ali_fifo_control(ap, adev, 0x08);
223
224	if (adev->dma_mode >= XFER_UDMA_0) {
225		ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
226		if (adev->dma_mode >= XFER_UDMA_3) {
227			u8 reg4b;
228			pci_read_config_byte(pdev, 0x4B, &reg4b);
229			reg4b |= 1;
230			pci_write_config_byte(pdev, 0x4B, reg4b);
231		}
232	} else {
233		ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
234		if (pair) {
235			struct ata_timing p;
236			ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
237			ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
238			if (pair->dma_mode) {
239				ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
240				ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
241			}
242		}
243		ali_program_modes(ap, adev, &t, 0);
244	}
245}
246
247/**
248 *	ali_lock_sectors	-	Keep older devices to 255 sector mode
249 *	@adev: Device
250 *
251 *	Called during the bus probe for each device that is found. We use
252 *	this call to lock the sector count of the device to 255 or less on
253 *	older ALi controllers. If we didn't do this then large I/O's would
254 *	require LBA48 commands which the older ALi requires are issued by
255 *	slower PIO methods
256 */
257
258static void ali_lock_sectors(struct ata_device *adev)
259{
260	adev->max_sectors = 255;
261}
262
263static struct scsi_host_template ali_sht = {
264	.module			= THIS_MODULE,
265	.name			= DRV_NAME,
266	.ioctl			= ata_scsi_ioctl,
267	.queuecommand		= ata_scsi_queuecmd,
268	.can_queue		= ATA_DEF_QUEUE,
269	.this_id		= ATA_SHT_THIS_ID,
270	.sg_tablesize		= LIBATA_MAX_PRD,
271	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
272	.emulated		= ATA_SHT_EMULATED,
273	.use_clustering		= ATA_SHT_USE_CLUSTERING,
274	.proc_name		= DRV_NAME,
275	.dma_boundary		= ATA_DMA_BOUNDARY,
276	.slave_configure	= ata_scsi_slave_config,
277	.slave_destroy		= ata_scsi_slave_destroy,
278	.bios_param		= ata_std_bios_param,
279};
280
281/*
282 *	Port operations for PIO only ALi
283 */
284
285static struct ata_port_operations ali_early_port_ops = {
286	.port_disable	= ata_port_disable,
287	.set_piomode	= ali_set_piomode,
288	.tf_load	= ata_tf_load,
289	.tf_read	= ata_tf_read,
290	.check_status 	= ata_check_status,
291	.exec_command	= ata_exec_command,
292	.dev_select 	= ata_std_dev_select,
293
294	.freeze		= ata_bmdma_freeze,
295	.thaw		= ata_bmdma_thaw,
296	.error_handler	= ata_bmdma_error_handler,
297	.post_internal_cmd = ata_bmdma_post_internal_cmd,
298	.cable_detect	= ata_cable_40wire,
299
300	.qc_prep 	= ata_qc_prep,
301	.qc_issue	= ata_qc_issue_prot,
302
303	.data_xfer	= ata_data_xfer,
304
305	.irq_handler	= ata_interrupt,
306	.irq_clear	= ata_bmdma_irq_clear,
307	.irq_on		= ata_irq_on,
308	.irq_ack	= ata_irq_ack,
309
310	.port_start	= ata_port_start,
311};
312
313/*
314 *	Port operations for DMA capable ALi without cable
315 *	detect
316 */
317static struct ata_port_operations ali_20_port_ops = {
318	.port_disable	= ata_port_disable,
319
320	.set_piomode	= ali_set_piomode,
321	.set_dmamode	= ali_set_dmamode,
322	.mode_filter	= ali_20_filter,
323
324	.tf_load	= ata_tf_load,
325	.tf_read	= ata_tf_read,
326	.check_status 	= ata_check_status,
327	.exec_command	= ata_exec_command,
328	.dev_select 	= ata_std_dev_select,
329	.dev_config	= ali_lock_sectors,
330
331	.freeze		= ata_bmdma_freeze,
332	.thaw		= ata_bmdma_thaw,
333	.error_handler	= ata_bmdma_error_handler,
334	.post_internal_cmd = ata_bmdma_post_internal_cmd,
335	.cable_detect	= ata_cable_40wire,
336
337	.bmdma_setup 	= ata_bmdma_setup,
338	.bmdma_start 	= ata_bmdma_start,
339	.bmdma_stop	= ata_bmdma_stop,
340	.bmdma_status 	= ata_bmdma_status,
341
342	.qc_prep 	= ata_qc_prep,
343	.qc_issue	= ata_qc_issue_prot,
344
345	.data_xfer	= ata_data_xfer,
346
347	.irq_handler	= ata_interrupt,
348	.irq_clear	= ata_bmdma_irq_clear,
349	.irq_on		= ata_irq_on,
350	.irq_ack	= ata_irq_ack,
351
352	.port_start	= ata_port_start,
353};
354
355/*
356 *	Port operations for DMA capable ALi with cable detect
357 */
358static struct ata_port_operations ali_c2_port_ops = {
359	.port_disable	= ata_port_disable,
360	.set_piomode	= ali_set_piomode,
361	.set_dmamode	= ali_set_dmamode,
362	.mode_filter	= ata_pci_default_filter,
363	.tf_load	= ata_tf_load,
364	.tf_read	= ata_tf_read,
365	.check_status 	= ata_check_status,
366	.exec_command	= ata_exec_command,
367	.dev_select 	= ata_std_dev_select,
368	.dev_config	= ali_lock_sectors,
369
370	.freeze		= ata_bmdma_freeze,
371	.thaw		= ata_bmdma_thaw,
372	.error_handler	= ata_bmdma_error_handler,
373	.post_internal_cmd = ata_bmdma_post_internal_cmd,
374	.cable_detect	= ali_c2_cable_detect,
375
376	.bmdma_setup 	= ata_bmdma_setup,
377	.bmdma_start 	= ata_bmdma_start,
378	.bmdma_stop	= ata_bmdma_stop,
379	.bmdma_status 	= ata_bmdma_status,
380
381	.qc_prep 	= ata_qc_prep,
382	.qc_issue	= ata_qc_issue_prot,
383
384	.data_xfer	= ata_data_xfer,
385
386	.irq_handler	= ata_interrupt,
387	.irq_clear	= ata_bmdma_irq_clear,
388	.irq_on		= ata_irq_on,
389	.irq_ack	= ata_irq_ack,
390
391	.port_start	= ata_port_start,
392};
393
394/*
395 *	Port operations for DMA capable ALi with cable detect and LBA48
396 */
397static struct ata_port_operations ali_c5_port_ops = {
398	.port_disable	= ata_port_disable,
399	.set_piomode	= ali_set_piomode,
400	.set_dmamode	= ali_set_dmamode,
401	.mode_filter	= ata_pci_default_filter,
402	.tf_load	= ata_tf_load,
403	.tf_read	= ata_tf_read,
404	.check_status 	= ata_check_status,
405	.exec_command	= ata_exec_command,
406	.dev_select 	= ata_std_dev_select,
407
408	.freeze		= ata_bmdma_freeze,
409	.thaw		= ata_bmdma_thaw,
410	.error_handler	= ata_bmdma_error_handler,
411	.post_internal_cmd = ata_bmdma_post_internal_cmd,
412	.cable_detect	= ali_c2_cable_detect,
413
414	.bmdma_setup 	= ata_bmdma_setup,
415	.bmdma_start 	= ata_bmdma_start,
416	.bmdma_stop	= ata_bmdma_stop,
417	.bmdma_status 	= ata_bmdma_status,
418
419	.qc_prep 	= ata_qc_prep,
420	.qc_issue	= ata_qc_issue_prot,
421
422	.data_xfer	= ata_data_xfer,
423
424	.irq_handler	= ata_interrupt,
425	.irq_clear	= ata_bmdma_irq_clear,
426	.irq_on		= ata_irq_on,
427	.irq_ack	= ata_irq_ack,
428
429	.port_start	= ata_port_start,
430};
431
432
433/**
434 *	ali_init_chipset	-	chip setup function
435 *	@pdev: PCI device of ATA controller
436 *
437 *	Perform the setup on the device that must be done both at boot
438 *	and at resume time.
439 */
440
441static void ali_init_chipset(struct pci_dev *pdev)
442{
443	u8 rev, tmp;
444	struct pci_dev *north, *isa_bridge;
445
446	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
447
448	/*
449	 * The chipset revision selects the driver operations and
450	 * mode data.
451	 */
452
453	if (rev >= 0x20 && rev < 0xC2) {
454		/* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
455		pci_read_config_byte(pdev, 0x4B, &tmp);
456		/* Clear CD-ROM DMA write bit */
457		tmp &= 0x7F;
458		pci_write_config_byte(pdev, 0x4B, tmp);
459	} else if (rev >= 0xC2) {
460		/* Enable cable detection logic */
461		pci_read_config_byte(pdev, 0x4B, &tmp);
462		pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
463	}
464	north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
465	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
466
467	if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
468		/* Configure the ALi bridge logic. For non ALi rely on BIOS.
469		   Set the south bridge enable bit */
470		pci_read_config_byte(isa_bridge, 0x79, &tmp);
471		if (rev == 0xC2)
472			pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04);
473		else if (rev > 0xC2 && rev < 0xC5)
474			pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02);
475	}
476	if (rev >= 0x20) {
477		/*
478		 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
479		 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
480		 * via 0x54/55.
481		 */
482		pci_read_config_byte(pdev, 0x53, &tmp);
483		if (rev <= 0x20)
484			tmp &= ~0x02;
485		if (rev >= 0xc7)
486			tmp |= 0x03;
487		else
488			tmp |= 0x01;	/* CD_ROM enable for DMA */
489		pci_write_config_byte(pdev, 0x53, tmp);
490	}
491	pci_dev_put(isa_bridge);
492	pci_dev_put(north);
493	ata_pci_clear_simplex(pdev);
494}
495/**
496 *	ali_init_one		-	discovery callback
497 *	@pdev: PCI device ID
498 *	@id: PCI table info
499 *
500 *	An ALi IDE interface has been discovered. Figure out what revision
501 *	and perform configuration work before handing it to the ATA layer
502 */
503
504static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
505{
506	static const struct ata_port_info info_early = {
507		.sht = &ali_sht,
508		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
509		.pio_mask = 0x1f,
510		.port_ops = &ali_early_port_ops
511	};
512	/* Revision 0x20 added DMA */
513	static const struct ata_port_info info_20 = {
514		.sht = &ali_sht,
515		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
516		.pio_mask = 0x1f,
517		.mwdma_mask = 0x07,
518		.port_ops = &ali_20_port_ops
519	};
520	/* Revision 0x20 with support logic added UDMA */
521	static const struct ata_port_info info_20_udma = {
522		.sht = &ali_sht,
523		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
524		.pio_mask = 0x1f,
525		.mwdma_mask = 0x07,
526		.udma_mask = 0x07,	/* UDMA33 */
527		.port_ops = &ali_20_port_ops
528	};
529	/* Revision 0xC2 adds UDMA66 */
530	static const struct ata_port_info info_c2 = {
531		.sht = &ali_sht,
532		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
533		.pio_mask = 0x1f,
534		.mwdma_mask = 0x07,
535		.udma_mask = 0x1f,
536		.port_ops = &ali_c2_port_ops
537	};
538	/* Revision 0xC3 is UDMA66 for now */
539	static const struct ata_port_info info_c3 = {
540		.sht = &ali_sht,
541		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
542		.pio_mask = 0x1f,
543		.mwdma_mask = 0x07,
544		.udma_mask = 0x1f,
545		.port_ops = &ali_c2_port_ops
546	};
547	/* Revision 0xC4 is UDMA100 */
548	static const struct ata_port_info info_c4 = {
549		.sht = &ali_sht,
550		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
551		.pio_mask = 0x1f,
552		.mwdma_mask = 0x07,
553		.udma_mask = 0x3f,
554		.port_ops = &ali_c2_port_ops
555	};
556	/* Revision 0xC5 is UDMA133 with LBA48 DMA */
557	static const struct ata_port_info info_c5 = {
558		.sht = &ali_sht,
559		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
560		.pio_mask = 0x1f,
561		.mwdma_mask = 0x07,
562		.udma_mask = 0x7f,
563		.port_ops = &ali_c5_port_ops
564	};
565
566	const struct ata_port_info *ppi[] = { NULL, NULL };
567	u8 rev, tmp;
568	struct pci_dev *isa_bridge;
569
570	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
571
572	/*
573	 * The chipset revision selects the driver operations and
574	 * mode data.
575	 */
576
577	if (rev < 0x20) {
578		ppi[0] = &info_early;
579	} else if (rev < 0xC2) {
580        	ppi[0] = &info_20;
581	} else if (rev == 0xC2) {
582        	ppi[0] = &info_c2;
583	} else if (rev == 0xC3) {
584        	ppi[0] = &info_c3;
585	} else if (rev == 0xC4) {
586        	ppi[0] = &info_c4;
587	} else
588        	ppi[0] = &info_c5;
589
590	ali_init_chipset(pdev);
591
592	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
593	if (isa_bridge && rev >= 0x20 && rev < 0xC2) {
594		/* Are we paired with a UDMA capable chip */
595		pci_read_config_byte(isa_bridge, 0x5E, &tmp);
596		if ((tmp & 0x1E) == 0x12)
597	        	ppi[0] = &info_20_udma;
598		pci_dev_put(isa_bridge);
599	}
600	return ata_pci_init_one(pdev, ppi);
601}
602
603#ifdef CONFIG_PM
604static int ali_reinit_one(struct pci_dev *pdev)
605{
606	ali_init_chipset(pdev);
607	return ata_pci_device_resume(pdev);
608}
609#endif
610
611static const struct pci_device_id ali[] = {
612	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
613	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
614
615	{ },
616};
617
618static struct pci_driver ali_pci_driver = {
619	.name 		= DRV_NAME,
620	.id_table	= ali,
621	.probe 		= ali_init_one,
622	.remove		= ata_pci_remove_one,
623#ifdef CONFIG_PM
624	.suspend	= ata_pci_device_suspend,
625	.resume		= ali_reinit_one,
626#endif
627};
628
629static int __init ali_init(void)
630{
631	return pci_register_driver(&ali_pci_driver);
632}
633
634
635static void __exit ali_exit(void)
636{
637	pci_unregister_driver(&ali_pci_driver);
638}
639
640
641MODULE_AUTHOR("Alan Cox");
642MODULE_DESCRIPTION("low-level driver for ALi PATA");
643MODULE_LICENSE("GPL");
644MODULE_DEVICE_TABLE(pci, ali);
645MODULE_VERSION(DRV_VERSION);
646
647module_init(ali_init);
648module_exit(ali_exit);
649