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  • only in /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/xtensa/boot/boot-redboot/
1#include <asm/variant/core.h>
2#include <asm/regs.h>
3#include <asm/asmmacro.h>
4#include <asm/cacheasm.h>
5	/*
6	 * RB-Data: RedBoot data/bss
7	 * P:	    Boot-Parameters
8	 * L:	    Kernel-Loader
9	 *
10	 * The Linux-Kernel image including the loader must be loaded
11	 * to a position so that the kernel and the boot parameters
12	 * can fit in the space before the load address.
13	 *  ______________________________________________________
14	 * |_RB-Data_|_P_|__________|_L_|___Linux-Kernel___|______|
15	 *                          ^
16	 *                          ^ Load address
17	 *  ______________________________________________________
18	 * |___Linux-Kernel___|_P_|_L_|___________________________|
19	 *
20	 * The loader copies the parameter to the position that will
21	 * be the end of the kernel and itself to the end of the
22	 * parameter list.
23	 */
24
25/* Make sure we have enough space for the 'uncompressor' */
26
27#define STACK_SIZE 32768
28#define HEAP_SIZE (131072*4)
29
30	# a2: Parameter list
31	# a3: Size of parameter list
32
33	.section .start, "ax"
34
35	.globl __start
36	/* this must be the first byte of the loader! */
37__start:
38	entry	sp, 32		# we do not intend to return
39	_call0	_start
40__start_a0:
41	.align 4
42
43	.section .text, "ax"
44	.begin literal_prefix .text
45
46	/* put literals in here! */
47
48	.globl _start
49_start:
50
51	/* 'reset' window registers */
52
53	movi	a4, 1
54	wsr	a4, PS
55	rsync
56
57	rsr	a5, WINDOWBASE
58	ssl	a5
59	sll	a4, a4
60	wsr	a4, WINDOWSTART
61	rsync
62
63	movi	a4, 0x00040000
64	wsr	a4, PS
65	rsync
66
67	/* copy the loader to its address
68	 * Note: The loader itself is a very small piece, so we assume we
69	 *       don't partially overlap. We also assume (even more important)
70	 *	 that the kernel image is out of the way. Usually, when the
71	 *	 load address of this image is not at an arbitrary address,
72	 *	 but aligned to some 10K's we shouldn't overlap.
73	 */
74
75	/* Note: The assembler cannot relax "addi a0, a0, ..." to an
76	   l32r, so we load to a4 first. */
77
78	# addi	a4, a0, __start - __start_a0
79	# mov	a0, a4
80
81	movi	a4, __start
82	movi	a5, __start_a0
83	add	a4, a0, a4
84	sub	a0, a4, a5
85
86	movi	a4, __start
87	movi	a5, __reloc_end
88
89	# a0: address where this code has been loaded
90	# a4: compiled address of __start
91	# a5: compiled end address
92
93	mov.n	a7, a0
94	mov.n	a8, a4
95
961:
97	l32i	a10, a7, 0
98	l32i	a11, a7, 4
99	s32i	a10, a8, 0
100	s32i	a11, a8, 4
101	l32i	a10, a7, 8
102	l32i	a11, a7, 12
103	s32i	a10, a8, 8
104	s32i	a11, a8, 12
105	addi	a8, a8, 16
106	addi	a7, a7, 16
107	blt	a8, a5, 1b
108
109
110	/* We have to flush and invalidate the caches here before we jump. */
111
112#if XCHAL_DCACHE_IS_WRITEBACK
113
114	___flush_dcache_all a5 a6
115
116#endif
117
118	___invalidate_icache_all a5 a6
119	isync
120
121	movi	a11, _reloc
122	jx	a11
123
124	.globl _reloc
125_reloc:
126
127	/* RedBoot is now at the end of the memory, so we don't have
128	 * to copy the parameter list. Keep the code around; in case
129	 * we need it again. */
130
131	/* clear BSS section */
132	movi	a6, __bss_start
133	movi	a7, __bss_end
134	movi.n	a5, 0
1353:
136	s32i	a5, a6, 0
137	addi	a6, a6, 4
138	blt	a6, a7, 3b
139
140	movi	a5, -16
141	movi	a1, _stack + STACK_SIZE
142	and	a1, a1, a5
143
144	/* Uncompress the kernel */
145
146	# a0: load address
147	# a2: boot parameter
148	# a4: __start
149
150	movi	a3, __image_load
151	sub	a4, a3, a4
152	add	a8, a0, a4
153
154	# a1  Stack
155	# a8(a4)  Load address of the image
156
157	movi	a6, _image_start
158	movi	a10, _image_end
159	movi	a7, 0x1000000
160	sub	a11, a10, a6
161	movi	a9, complen
162	s32i	a11, a9, 0
163
164	movi	a0, 0
165
166	# a6 destination
167	# a7 maximum size of destination
168	# a8 source
169	# a9 ptr to length
170
171	.extern gunzip
172	movi	a4, gunzip
173	beqz	a4, 1f
174
175	callx4	a4
176
177	j	2f
178
179
180	# a6 destination start
181	# a7 maximum size of destination
182	# a8 source start
183	# a9 ptr to length
184	# a10 destination end
185
1861:
187        l32i    a9, a8, 0
188        l32i    a11, a8, 4
189        s32i    a9, a6, 0
190        s32i    a11, a6, 4
191        l32i    a9, a8, 8
192        l32i    a11, a8, 12
193        s32i    a9, a6, 8
194        s32i    a11, a6, 12
195        addi    a6, a6, 16
196        addi    a8, a8, 16
197        blt     a6, a10, 1b
198
199
200	/* jump to the kernel */
2012:
202#if XCHAL_DCACHE_IS_WRITEBACK
203
204	___flush_dcache_all a5 a6
205
206#endif
207
208	___invalidate_icache_all a5 a6
209
210	isync
211
212	movi	a5, __start
213	movi	a3, boot_initrd_start
214	movi	a4, boot_initrd_end
215	sub	a3, a3, a5
216	sub	a4, a4, a5
217	add	a3, a0, a3
218	add	a4, a0, a4
219
220	# a2  Boot parameter list
221	# a3  initrd_start (virtual load address)
222	# a4  initrd_end   (virtual load address)
223
224	movi	a0, _image_start
225	jx	a0
226
227	.align 16
228	.data
229	.globl avail_ram
230avail_ram:
231	.long	_heap
232	.globl end_avail
233end_avail:
234	.long	_heap + HEAP_SIZE
235
236	.comm _stack, STACK_SIZE
237	.comm _heap, HEAP_SIZE
238
239	.globl end_avail
240	.comm complen, 4
241
242	.end	literal_prefix
243