1/* $Id: time.c,v 1.1.1.1 2007/08/03 18:52:18 Exp $ 2 * time.c: UltraSparc timer and TOD clock support. 3 * 4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) 5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) 6 * 7 * Based largely on code which is: 8 * 9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) 10 */ 11 12#include <linux/errno.h> 13#include <linux/module.h> 14#include <linux/sched.h> 15#include <linux/kernel.h> 16#include <linux/param.h> 17#include <linux/string.h> 18#include <linux/mm.h> 19#include <linux/interrupt.h> 20#include <linux/time.h> 21#include <linux/timex.h> 22#include <linux/init.h> 23#include <linux/ioport.h> 24#include <linux/mc146818rtc.h> 25#include <linux/delay.h> 26#include <linux/profile.h> 27#include <linux/bcd.h> 28#include <linux/jiffies.h> 29#include <linux/cpufreq.h> 30#include <linux/percpu.h> 31#include <linux/profile.h> 32#include <linux/miscdevice.h> 33#include <linux/rtc.h> 34#include <linux/kernel_stat.h> 35#include <linux/clockchips.h> 36#include <linux/clocksource.h> 37 38#include <asm/oplib.h> 39#include <asm/mostek.h> 40#include <asm/timer.h> 41#include <asm/irq.h> 42#include <asm/io.h> 43#include <asm/prom.h> 44#include <asm/of_device.h> 45#include <asm/starfire.h> 46#include <asm/smp.h> 47#include <asm/sections.h> 48#include <asm/cpudata.h> 49#include <asm/uaccess.h> 50#include <asm/prom.h> 51#include <asm/irq_regs.h> 52 53DEFINE_SPINLOCK(mostek_lock); 54DEFINE_SPINLOCK(rtc_lock); 55void __iomem *mstk48t02_regs = NULL; 56#ifdef CONFIG_PCI 57unsigned long ds1287_regs = 0UL; 58static void __iomem *bq4802_regs; 59#endif 60 61static void __iomem *mstk48t08_regs; 62static void __iomem *mstk48t59_regs; 63 64static int set_rtc_mmss(unsigned long); 65 66#define TICK_PRIV_BIT (1UL << 63) 67#define TICKCMP_IRQ_BIT (1UL << 63) 68 69#ifdef CONFIG_SMP 70unsigned long profile_pc(struct pt_regs *regs) 71{ 72 unsigned long pc = instruction_pointer(regs); 73 74 if (in_lock_functions(pc)) 75 return regs->u_regs[UREG_RETPC]; 76 return pc; 77} 78EXPORT_SYMBOL(profile_pc); 79#endif 80 81static void tick_disable_protection(void) 82{ 83 __asm__ __volatile__( 84 " ba,pt %%xcc, 1f\n" 85 " nop\n" 86 " .align 64\n" 87 "1: rd %%tick, %%g2\n" 88 " add %%g2, 6, %%g2\n" 89 " andn %%g2, %0, %%g2\n" 90 " wrpr %%g2, 0, %%tick\n" 91 " rdpr %%tick, %%g0" 92 : /* no outputs */ 93 : "r" (TICK_PRIV_BIT) 94 : "g2"); 95} 96 97static void tick_disable_irq(void) 98{ 99 __asm__ __volatile__( 100 " ba,pt %%xcc, 1f\n" 101 " nop\n" 102 " .align 64\n" 103 "1: wr %0, 0x0, %%tick_cmpr\n" 104 " rd %%tick_cmpr, %%g0" 105 : /* no outputs */ 106 : "r" (TICKCMP_IRQ_BIT)); 107} 108 109static void tick_init_tick(void) 110{ 111 tick_disable_protection(); 112 tick_disable_irq(); 113} 114 115static unsigned long tick_get_tick(void) 116{ 117 unsigned long ret; 118 119 __asm__ __volatile__("rd %%tick, %0\n\t" 120 "mov %0, %0" 121 : "=r" (ret)); 122 123 return ret & ~TICK_PRIV_BIT; 124} 125 126static int tick_add_compare(unsigned long adj) 127{ 128 unsigned long orig_tick, new_tick, new_compare; 129 130 __asm__ __volatile__("rd %%tick, %0" 131 : "=r" (orig_tick)); 132 133 orig_tick &= ~TICKCMP_IRQ_BIT; 134 135 __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" 136 " add %1, %2, %0\n\t" 137 ".align 64\n" 138 "1:\n\t" 139 "wr %0, 0, %%tick_cmpr\n\t" 140 "rd %%tick_cmpr, %%g0\n\t" 141 : "=r" (new_compare) 142 : "r" (orig_tick), "r" (adj)); 143 144 __asm__ __volatile__("rd %%tick, %0" 145 : "=r" (new_tick)); 146 new_tick &= ~TICKCMP_IRQ_BIT; 147 148 return ((long)(new_tick - (orig_tick+adj))) > 0L; 149} 150 151static unsigned long tick_add_tick(unsigned long adj) 152{ 153 unsigned long new_tick; 154 155 /* Also need to handle Blackbird bug here too. */ 156 __asm__ __volatile__("rd %%tick, %0\n\t" 157 "add %0, %1, %0\n\t" 158 "wrpr %0, 0, %%tick\n\t" 159 : "=&r" (new_tick) 160 : "r" (adj)); 161 162 return new_tick; 163} 164 165static struct sparc64_tick_ops tick_operations __read_mostly = { 166 .name = "tick", 167 .init_tick = tick_init_tick, 168 .disable_irq = tick_disable_irq, 169 .get_tick = tick_get_tick, 170 .add_tick = tick_add_tick, 171 .add_compare = tick_add_compare, 172 .softint_mask = 1UL << 0, 173}; 174 175struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations; 176 177static void stick_disable_irq(void) 178{ 179 __asm__ __volatile__( 180 "wr %0, 0x0, %%asr25" 181 : /* no outputs */ 182 : "r" (TICKCMP_IRQ_BIT)); 183} 184 185static void stick_init_tick(void) 186{ 187 /* Writes to the %tick and %stick register are not 188 * allowed on sun4v. The Hypervisor controls that 189 * bit, per-strand. 190 */ 191 if (tlb_type != hypervisor) { 192 tick_disable_protection(); 193 tick_disable_irq(); 194 195 /* Let the user get at STICK too. */ 196 __asm__ __volatile__( 197 " rd %%asr24, %%g2\n" 198 " andn %%g2, %0, %%g2\n" 199 " wr %%g2, 0, %%asr24" 200 : /* no outputs */ 201 : "r" (TICK_PRIV_BIT) 202 : "g1", "g2"); 203 } 204 205 stick_disable_irq(); 206} 207 208static unsigned long stick_get_tick(void) 209{ 210 unsigned long ret; 211 212 __asm__ __volatile__("rd %%asr24, %0" 213 : "=r" (ret)); 214 215 return ret & ~TICK_PRIV_BIT; 216} 217 218static unsigned long stick_add_tick(unsigned long adj) 219{ 220 unsigned long new_tick; 221 222 __asm__ __volatile__("rd %%asr24, %0\n\t" 223 "add %0, %1, %0\n\t" 224 "wr %0, 0, %%asr24\n\t" 225 : "=&r" (new_tick) 226 : "r" (adj)); 227 228 return new_tick; 229} 230 231static int stick_add_compare(unsigned long adj) 232{ 233 unsigned long orig_tick, new_tick; 234 235 __asm__ __volatile__("rd %%asr24, %0" 236 : "=r" (orig_tick)); 237 orig_tick &= ~TICKCMP_IRQ_BIT; 238 239 __asm__ __volatile__("wr %0, 0, %%asr25" 240 : /* no outputs */ 241 : "r" (orig_tick + adj)); 242 243 __asm__ __volatile__("rd %%asr24, %0" 244 : "=r" (new_tick)); 245 new_tick &= ~TICKCMP_IRQ_BIT; 246 247 return ((long)(new_tick - (orig_tick+adj))) > 0L; 248} 249 250static struct sparc64_tick_ops stick_operations __read_mostly = { 251 .name = "stick", 252 .init_tick = stick_init_tick, 253 .disable_irq = stick_disable_irq, 254 .get_tick = stick_get_tick, 255 .add_tick = stick_add_tick, 256 .add_compare = stick_add_compare, 257 .softint_mask = 1UL << 16, 258}; 259 260/* On Hummingbird the STICK/STICK_CMPR register is implemented 261 * in I/O space. There are two 64-bit registers each, the 262 * first holds the low 32-bits of the value and the second holds 263 * the high 32-bits. 264 * 265 * Since STICK is constantly updating, we have to access it carefully. 266 * 267 * The sequence we use to read is: 268 * 1) read high 269 * 2) read low 270 * 3) read high again, if it rolled re-read both low and high again. 271 * 272 * Writing STICK safely is also tricky: 273 * 1) write low to zero 274 * 2) write high 275 * 3) write low 276 */ 277#define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL 278#define HBIRD_STICK_ADDR 0x1fe0000f070UL 279 280static unsigned long __hbird_read_stick(void) 281{ 282 unsigned long ret, tmp1, tmp2, tmp3; 283 unsigned long addr = HBIRD_STICK_ADDR+8; 284 285 __asm__ __volatile__("ldxa [%1] %5, %2\n" 286 "1:\n\t" 287 "sub %1, 0x8, %1\n\t" 288 "ldxa [%1] %5, %3\n\t" 289 "add %1, 0x8, %1\n\t" 290 "ldxa [%1] %5, %4\n\t" 291 "cmp %4, %2\n\t" 292 "bne,a,pn %%xcc, 1b\n\t" 293 " mov %4, %2\n\t" 294 "sllx %4, 32, %4\n\t" 295 "or %3, %4, %0\n\t" 296 : "=&r" (ret), "=&r" (addr), 297 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3) 298 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr)); 299 300 return ret; 301} 302 303static void __hbird_write_stick(unsigned long val) 304{ 305 unsigned long low = (val & 0xffffffffUL); 306 unsigned long high = (val >> 32UL); 307 unsigned long addr = HBIRD_STICK_ADDR; 308 309 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t" 310 "add %0, 0x8, %0\n\t" 311 "stxa %3, [%0] %4\n\t" 312 "sub %0, 0x8, %0\n\t" 313 "stxa %2, [%0] %4" 314 : "=&r" (addr) 315 : "0" (addr), "r" (low), "r" (high), 316 "i" (ASI_PHYS_BYPASS_EC_E)); 317} 318 319static void __hbird_write_compare(unsigned long val) 320{ 321 unsigned long low = (val & 0xffffffffUL); 322 unsigned long high = (val >> 32UL); 323 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL; 324 325 __asm__ __volatile__("stxa %3, [%0] %4\n\t" 326 "sub %0, 0x8, %0\n\t" 327 "stxa %2, [%0] %4" 328 : "=&r" (addr) 329 : "0" (addr), "r" (low), "r" (high), 330 "i" (ASI_PHYS_BYPASS_EC_E)); 331} 332 333static void hbtick_disable_irq(void) 334{ 335 __hbird_write_compare(TICKCMP_IRQ_BIT); 336} 337 338static void hbtick_init_tick(void) 339{ 340 tick_disable_protection(); 341 342 __hbird_write_stick(__hbird_read_stick()); 343 344 hbtick_disable_irq(); 345} 346 347static unsigned long hbtick_get_tick(void) 348{ 349 return __hbird_read_stick() & ~TICK_PRIV_BIT; 350} 351 352static unsigned long hbtick_add_tick(unsigned long adj) 353{ 354 unsigned long val; 355 356 val = __hbird_read_stick() + adj; 357 __hbird_write_stick(val); 358 359 return val; 360} 361 362static int hbtick_add_compare(unsigned long adj) 363{ 364 unsigned long val = __hbird_read_stick(); 365 unsigned long val2; 366 367 val &= ~TICKCMP_IRQ_BIT; 368 val += adj; 369 __hbird_write_compare(val); 370 371 val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT; 372 373 return ((long)(val2 - val)) > 0L; 374} 375 376static struct sparc64_tick_ops hbtick_operations __read_mostly = { 377 .name = "hbtick", 378 .init_tick = hbtick_init_tick, 379 .disable_irq = hbtick_disable_irq, 380 .get_tick = hbtick_get_tick, 381 .add_tick = hbtick_add_tick, 382 .add_compare = hbtick_add_compare, 383 .softint_mask = 1UL << 0, 384}; 385 386static unsigned long timer_ticks_per_nsec_quotient __read_mostly; 387 388#define TICK_SIZE (tick_nsec / 1000) 389 390#define USEC_AFTER 500000 391#define USEC_BEFORE 500000 392 393static void sync_cmos_clock(unsigned long dummy); 394 395static DEFINE_TIMER(sync_cmos_timer, sync_cmos_clock, 0, 0); 396 397static void sync_cmos_clock(unsigned long dummy) 398{ 399 struct timeval now, next; 400 int fail = 1; 401 402 /* 403 * If we have an externally synchronized Linux clock, then update 404 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be 405 * called as close as possible to 500 ms before the new second starts. 406 * This code is run on a timer. If the clock is set, that timer 407 * may not expire at the correct time. Thus, we adjust... 408 */ 409 if (!ntp_synced()) 410 /* 411 * Not synced, exit, do not restart a timer (if one is 412 * running, let it run out). 413 */ 414 return; 415 416 do_gettimeofday(&now); 417 if (now.tv_usec >= USEC_AFTER - ((unsigned) TICK_SIZE) / 2 && 418 now.tv_usec <= USEC_BEFORE + ((unsigned) TICK_SIZE) / 2) 419 fail = set_rtc_mmss(now.tv_sec); 420 421 next.tv_usec = USEC_AFTER - now.tv_usec; 422 if (next.tv_usec <= 0) 423 next.tv_usec += USEC_PER_SEC; 424 425 if (!fail) 426 next.tv_sec = 659; 427 else 428 next.tv_sec = 0; 429 430 if (next.tv_usec >= USEC_PER_SEC) { 431 next.tv_sec++; 432 next.tv_usec -= USEC_PER_SEC; 433 } 434 mod_timer(&sync_cmos_timer, jiffies + timeval_to_jiffies(&next)); 435} 436 437void notify_arch_cmos_timer(void) 438{ 439 mod_timer(&sync_cmos_timer, jiffies + 1); 440} 441 442/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */ 443static void __init kick_start_clock(void) 444{ 445 void __iomem *regs = mstk48t02_regs; 446 u8 sec, tmp; 447 int i, count; 448 449 prom_printf("CLOCK: Clock was stopped. Kick start "); 450 451 spin_lock_irq(&mostek_lock); 452 453 /* Turn on the kick start bit to start the oscillator. */ 454 tmp = mostek_read(regs + MOSTEK_CREG); 455 tmp |= MSTK_CREG_WRITE; 456 mostek_write(regs + MOSTEK_CREG, tmp); 457 tmp = mostek_read(regs + MOSTEK_SEC); 458 tmp &= ~MSTK_STOP; 459 mostek_write(regs + MOSTEK_SEC, tmp); 460 tmp = mostek_read(regs + MOSTEK_HOUR); 461 tmp |= MSTK_KICK_START; 462 mostek_write(regs + MOSTEK_HOUR, tmp); 463 tmp = mostek_read(regs + MOSTEK_CREG); 464 tmp &= ~MSTK_CREG_WRITE; 465 mostek_write(regs + MOSTEK_CREG, tmp); 466 467 spin_unlock_irq(&mostek_lock); 468 469 /* Delay to allow the clock oscillator to start. */ 470 sec = MSTK_REG_SEC(regs); 471 for (i = 0; i < 3; i++) { 472 while (sec == MSTK_REG_SEC(regs)) 473 for (count = 0; count < 100000; count++) 474 /* nothing */ ; 475 prom_printf("."); 476 sec = MSTK_REG_SEC(regs); 477 } 478 prom_printf("\n"); 479 480 spin_lock_irq(&mostek_lock); 481 482 /* Turn off kick start and set a "valid" time and date. */ 483 tmp = mostek_read(regs + MOSTEK_CREG); 484 tmp |= MSTK_CREG_WRITE; 485 mostek_write(regs + MOSTEK_CREG, tmp); 486 tmp = mostek_read(regs + MOSTEK_HOUR); 487 tmp &= ~MSTK_KICK_START; 488 mostek_write(regs + MOSTEK_HOUR, tmp); 489 MSTK_SET_REG_SEC(regs,0); 490 MSTK_SET_REG_MIN(regs,0); 491 MSTK_SET_REG_HOUR(regs,0); 492 MSTK_SET_REG_DOW(regs,5); 493 MSTK_SET_REG_DOM(regs,1); 494 MSTK_SET_REG_MONTH(regs,8); 495 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO); 496 tmp = mostek_read(regs + MOSTEK_CREG); 497 tmp &= ~MSTK_CREG_WRITE; 498 mostek_write(regs + MOSTEK_CREG, tmp); 499 500 spin_unlock_irq(&mostek_lock); 501 502 /* Ensure the kick start bit is off. If it isn't, turn it off. */ 503 while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) { 504 prom_printf("CLOCK: Kick start still on!\n"); 505 506 spin_lock_irq(&mostek_lock); 507 508 tmp = mostek_read(regs + MOSTEK_CREG); 509 tmp |= MSTK_CREG_WRITE; 510 mostek_write(regs + MOSTEK_CREG, tmp); 511 512 tmp = mostek_read(regs + MOSTEK_HOUR); 513 tmp &= ~MSTK_KICK_START; 514 mostek_write(regs + MOSTEK_HOUR, tmp); 515 516 tmp = mostek_read(regs + MOSTEK_CREG); 517 tmp &= ~MSTK_CREG_WRITE; 518 mostek_write(regs + MOSTEK_CREG, tmp); 519 520 spin_unlock_irq(&mostek_lock); 521 } 522 523 prom_printf("CLOCK: Kick start procedure successful.\n"); 524} 525 526/* Return nonzero if the clock chip battery is low. */ 527static int __init has_low_battery(void) 528{ 529 void __iomem *regs = mstk48t02_regs; 530 u8 data1, data2; 531 532 spin_lock_irq(&mostek_lock); 533 534 data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */ 535 mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */ 536 data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */ 537 mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */ 538 539 spin_unlock_irq(&mostek_lock); 540 541 return (data1 == data2); /* Was the write blocked? */ 542} 543 544/* Probe for the real time clock chip. */ 545static void __init set_system_time(void) 546{ 547 unsigned int year, mon, day, hour, min, sec; 548 void __iomem *mregs = mstk48t02_regs; 549#ifdef CONFIG_PCI 550 unsigned long dregs = ds1287_regs; 551 void __iomem *bregs = bq4802_regs; 552#else 553 unsigned long dregs = 0UL; 554 void __iomem *bregs = 0UL; 555#endif 556 u8 tmp; 557 558 if (!mregs && !dregs && !bregs) { 559 prom_printf("Something wrong, clock regs not mapped yet.\n"); 560 prom_halt(); 561 } 562 563 if (mregs) { 564 spin_lock_irq(&mostek_lock); 565 566 /* Traditional Mostek chip. */ 567 tmp = mostek_read(mregs + MOSTEK_CREG); 568 tmp |= MSTK_CREG_READ; 569 mostek_write(mregs + MOSTEK_CREG, tmp); 570 571 sec = MSTK_REG_SEC(mregs); 572 min = MSTK_REG_MIN(mregs); 573 hour = MSTK_REG_HOUR(mregs); 574 day = MSTK_REG_DOM(mregs); 575 mon = MSTK_REG_MONTH(mregs); 576 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) ); 577 } else if (bregs) { 578 unsigned char val = readb(bregs + 0x0e); 579 unsigned int century; 580 581 /* BQ4802 RTC chip. */ 582 583 writeb(val | 0x08, bregs + 0x0e); 584 585 sec = readb(bregs + 0x00); 586 min = readb(bregs + 0x02); 587 hour = readb(bregs + 0x04); 588 day = readb(bregs + 0x06); 589 mon = readb(bregs + 0x09); 590 year = readb(bregs + 0x0a); 591 century = readb(bregs + 0x0f); 592 593 writeb(val, bregs + 0x0e); 594 595 BCD_TO_BIN(sec); 596 BCD_TO_BIN(min); 597 BCD_TO_BIN(hour); 598 BCD_TO_BIN(day); 599 BCD_TO_BIN(mon); 600 BCD_TO_BIN(year); 601 BCD_TO_BIN(century); 602 603 year += (century * 100); 604 } else { 605 /* Dallas 12887 RTC chip. */ 606 607 do { 608 sec = CMOS_READ(RTC_SECONDS); 609 min = CMOS_READ(RTC_MINUTES); 610 hour = CMOS_READ(RTC_HOURS); 611 day = CMOS_READ(RTC_DAY_OF_MONTH); 612 mon = CMOS_READ(RTC_MONTH); 613 year = CMOS_READ(RTC_YEAR); 614 } while (sec != CMOS_READ(RTC_SECONDS)); 615 616 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 617 BCD_TO_BIN(sec); 618 BCD_TO_BIN(min); 619 BCD_TO_BIN(hour); 620 BCD_TO_BIN(day); 621 BCD_TO_BIN(mon); 622 BCD_TO_BIN(year); 623 } 624 if ((year += 1900) < 1970) 625 year += 100; 626 } 627 628 xtime.tv_sec = mktime(year, mon, day, hour, min, sec); 629 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); 630 set_normalized_timespec(&wall_to_monotonic, 631 -xtime.tv_sec, -xtime.tv_nsec); 632 633 if (mregs) { 634 tmp = mostek_read(mregs + MOSTEK_CREG); 635 tmp &= ~MSTK_CREG_READ; 636 mostek_write(mregs + MOSTEK_CREG, tmp); 637 638 spin_unlock_irq(&mostek_lock); 639 } 640} 641 642/* davem suggests we keep this within the 4M locked kernel image */ 643static u32 starfire_get_time(void) 644{ 645 static char obp_gettod[32]; 646 static u32 unix_tod; 647 648 sprintf(obp_gettod, "h# %08x unix-gettod", 649 (unsigned int) (long) &unix_tod); 650 prom_feval(obp_gettod); 651 652 return unix_tod; 653} 654 655static int starfire_set_time(u32 val) 656{ 657 /* Do nothing, time is set using the service processor 658 * console on this platform. 659 */ 660 return 0; 661} 662 663static u32 hypervisor_get_time(void) 664{ 665 unsigned long ret, time; 666 int retries = 10000; 667 668retry: 669 ret = sun4v_tod_get(&time); 670 if (ret == HV_EOK) 671 return time; 672 if (ret == HV_EWOULDBLOCK) { 673 if (--retries > 0) { 674 udelay(100); 675 goto retry; 676 } 677 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n"); 678 return 0; 679 } 680 printk(KERN_WARNING "SUN4V: tod_get() not supported.\n"); 681 return 0; 682} 683 684static int hypervisor_set_time(u32 secs) 685{ 686 unsigned long ret; 687 int retries = 10000; 688 689retry: 690 ret = sun4v_tod_set(secs); 691 if (ret == HV_EOK) 692 return 0; 693 if (ret == HV_EWOULDBLOCK) { 694 if (--retries > 0) { 695 udelay(100); 696 goto retry; 697 } 698 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n"); 699 return -EAGAIN; 700 } 701 printk(KERN_WARNING "SUN4V: tod_set() not supported.\n"); 702 return -EOPNOTSUPP; 703} 704 705static int __init clock_model_matches(const char *model) 706{ 707 if (strcmp(model, "mk48t02") && 708 strcmp(model, "mk48t08") && 709 strcmp(model, "mk48t59") && 710 strcmp(model, "m5819") && 711 strcmp(model, "m5819p") && 712 strcmp(model, "m5823") && 713 strcmp(model, "ds1287") && 714 strcmp(model, "bq4802")) 715 return 0; 716 717 return 1; 718} 719 720static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match) 721{ 722 struct device_node *dp = op->node; 723 const char *model = of_get_property(dp, "model", NULL); 724 const char *compat = of_get_property(dp, "compatible", NULL); 725 unsigned long size, flags; 726 void __iomem *regs; 727 728 if (!model) 729 model = compat; 730 731 if (!model || !clock_model_matches(model)) 732 return -ENODEV; 733 734 /* On an Enterprise system there can be multiple mostek clocks. 735 * We should only match the one that is on the central FHC bus. 736 */ 737 if (!strcmp(dp->parent->name, "fhc") && 738 strcmp(dp->parent->parent->name, "central") != 0) 739 return -ENODEV; 740 741 size = (op->resource[0].end - op->resource[0].start) + 1; 742 regs = of_ioremap(&op->resource[0], 0, size, "clock"); 743 if (!regs) 744 return -ENOMEM; 745 746#ifdef CONFIG_PCI 747 if (!strcmp(model, "ds1287") || 748 !strcmp(model, "m5819") || 749 !strcmp(model, "m5819p") || 750 !strcmp(model, "m5823")) { 751 ds1287_regs = (unsigned long) regs; 752 } else if (!strcmp(model, "bq4802")) { 753 bq4802_regs = regs; 754 } else 755#endif 756 if (model[5] == '0' && model[6] == '2') { 757 mstk48t02_regs = regs; 758 } else if(model[5] == '0' && model[6] == '8') { 759 mstk48t08_regs = regs; 760 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02; 761 } else { 762 mstk48t59_regs = regs; 763 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02; 764 } 765 766 printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs); 767 768 local_irq_save(flags); 769 770 if (mstk48t02_regs != NULL) { 771 /* Report a low battery voltage condition. */ 772 if (has_low_battery()) 773 prom_printf("NVRAM: Low battery voltage!\n"); 774 775 /* Kick start the clock if it is completely stopped. */ 776 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP) 777 kick_start_clock(); 778 } 779 780 set_system_time(); 781 782 local_irq_restore(flags); 783 784 return 0; 785} 786 787static struct of_device_id clock_match[] = { 788 { 789 .name = "eeprom", 790 }, 791 { 792 .name = "rtc", 793 }, 794 {}, 795}; 796 797static struct of_platform_driver clock_driver = { 798 .name = "clock", 799 .match_table = clock_match, 800 .probe = clock_probe, 801}; 802 803static int __init clock_init(void) 804{ 805 if (this_is_starfire) { 806 xtime.tv_sec = starfire_get_time(); 807 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); 808 set_normalized_timespec(&wall_to_monotonic, 809 -xtime.tv_sec, -xtime.tv_nsec); 810 return 0; 811 } 812 if (tlb_type == hypervisor) { 813 xtime.tv_sec = hypervisor_get_time(); 814 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); 815 set_normalized_timespec(&wall_to_monotonic, 816 -xtime.tv_sec, -xtime.tv_nsec); 817 return 0; 818 } 819 820 return of_register_driver(&clock_driver, &of_bus_type); 821} 822 823/* Must be after subsys_initcall() so that busses are probed. Must 824 * be before device_initcall() because things like the RTC driver 825 * need to see the clock registers. 826 */ 827fs_initcall(clock_init); 828 829/* This is gets the master TICK_INT timer going. */ 830static unsigned long sparc64_init_timers(void) 831{ 832 struct device_node *dp; 833 unsigned long clock; 834#ifdef CONFIG_SMP 835 extern void smp_tick_init(void); 836#endif 837 838 dp = of_find_node_by_path("/"); 839 if (tlb_type == spitfire) { 840 unsigned long ver, manuf, impl; 841 842 __asm__ __volatile__ ("rdpr %%ver, %0" 843 : "=&r" (ver)); 844 manuf = ((ver >> 48) & 0xffff); 845 impl = ((ver >> 32) & 0xffff); 846 if (manuf == 0x17 && impl == 0x13) { 847 /* Hummingbird, aka Ultra-IIe */ 848 tick_ops = &hbtick_operations; 849 clock = of_getintprop_default(dp, "stick-frequency", 0); 850 } else { 851 tick_ops = &tick_operations; 852 clock = local_cpu_data().clock_tick; 853 } 854 } else { 855 tick_ops = &stick_operations; 856 clock = of_getintprop_default(dp, "stick-frequency", 0); 857 } 858 859#ifdef CONFIG_SMP 860 smp_tick_init(); 861#endif 862 863 return clock; 864} 865 866struct freq_table { 867 unsigned long clock_tick_ref; 868 unsigned int ref_freq; 869}; 870static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 }; 871 872unsigned long sparc64_get_clock_tick(unsigned int cpu) 873{ 874 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu); 875 876 if (ft->clock_tick_ref) 877 return ft->clock_tick_ref; 878 return cpu_data(cpu).clock_tick; 879} 880 881#ifdef CONFIG_CPU_FREQ 882 883static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val, 884 void *data) 885{ 886 struct cpufreq_freqs *freq = data; 887 unsigned int cpu = freq->cpu; 888 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu); 889 890 if (!ft->ref_freq) { 891 ft->ref_freq = freq->old; 892 ft->clock_tick_ref = cpu_data(cpu).clock_tick; 893 } 894 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) || 895 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) || 896 (val == CPUFREQ_RESUMECHANGE)) { 897 cpu_data(cpu).clock_tick = 898 cpufreq_scale(ft->clock_tick_ref, 899 ft->ref_freq, 900 freq->new); 901 } 902 903 return 0; 904} 905 906static struct notifier_block sparc64_cpufreq_notifier_block = { 907 .notifier_call = sparc64_cpufreq_notifier 908}; 909 910#endif /* CONFIG_CPU_FREQ */ 911 912static int sparc64_next_event(unsigned long delta, 913 struct clock_event_device *evt) 914{ 915 return tick_ops->add_compare(delta) ? -ETIME : 0; 916} 917 918static void sparc64_timer_setup(enum clock_event_mode mode, 919 struct clock_event_device *evt) 920{ 921 switch (mode) { 922 case CLOCK_EVT_MODE_ONESHOT: 923 break; 924 925 case CLOCK_EVT_MODE_SHUTDOWN: 926 tick_ops->disable_irq(); 927 break; 928 929 case CLOCK_EVT_MODE_PERIODIC: 930 case CLOCK_EVT_MODE_UNUSED: 931 WARN_ON(1); 932 break; 933 }; 934} 935 936static struct clock_event_device sparc64_clockevent = { 937 .features = CLOCK_EVT_FEAT_ONESHOT, 938 .set_mode = sparc64_timer_setup, 939 .set_next_event = sparc64_next_event, 940 .rating = 100, 941 .shift = 30, 942 .irq = -1, 943}; 944static DEFINE_PER_CPU(struct clock_event_device, sparc64_events); 945 946void timer_interrupt(int irq, struct pt_regs *regs) 947{ 948 struct pt_regs *old_regs = set_irq_regs(regs); 949 unsigned long tick_mask = tick_ops->softint_mask; 950 int cpu = smp_processor_id(); 951 struct clock_event_device *evt = &per_cpu(sparc64_events, cpu); 952 953 clear_softint(tick_mask); 954 955 irq_enter(); 956 957 kstat_this_cpu.irqs[0]++; 958 959 if (unlikely(!evt->event_handler)) { 960 printk(KERN_WARNING 961 "Spurious SPARC64 timer interrupt on cpu %d\n", cpu); 962 } else 963 evt->event_handler(evt); 964 965 irq_exit(); 966 967 set_irq_regs(old_regs); 968} 969 970void __devinit setup_sparc64_timer(void) 971{ 972 struct clock_event_device *sevt; 973 unsigned long pstate; 974 975 /* Guarantee that the following sequences execute 976 * uninterrupted. 977 */ 978 __asm__ __volatile__("rdpr %%pstate, %0\n\t" 979 "wrpr %0, %1, %%pstate" 980 : "=r" (pstate) 981 : "i" (PSTATE_IE)); 982 983 tick_ops->init_tick(); 984 985 /* Restore PSTATE_IE. */ 986 __asm__ __volatile__("wrpr %0, 0x0, %%pstate" 987 : /* no outputs */ 988 : "r" (pstate)); 989 990 sevt = &__get_cpu_var(sparc64_events); 991 992 memcpy(sevt, &sparc64_clockevent, sizeof(*sevt)); 993 sevt->cpumask = cpumask_of_cpu(smp_processor_id()); 994 995 clockevents_register_device(sevt); 996} 997 998#define SPARC64_NSEC_PER_CYC_SHIFT 10UL 999 1000static struct clocksource clocksource_tick = { 1001 .rating = 100, 1002 .mask = CLOCKSOURCE_MASK(64), 1003 .shift = 16, 1004 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 1005}; 1006 1007static void __init setup_clockevent_multiplier(unsigned long hz) 1008{ 1009 unsigned long mult, shift = 32; 1010 1011 while (1) { 1012 mult = div_sc(hz, NSEC_PER_SEC, shift); 1013 if (mult && (mult >> 32UL) == 0UL) 1014 break; 1015 1016 shift--; 1017 } 1018 1019 sparc64_clockevent.shift = shift; 1020 sparc64_clockevent.mult = mult; 1021} 1022 1023void __init time_init(void) 1024{ 1025 unsigned long clock = sparc64_init_timers(); 1026 1027 timer_ticks_per_nsec_quotient = 1028 clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT); 1029 1030 clocksource_tick.name = tick_ops->name; 1031 clocksource_tick.mult = 1032 clocksource_hz2mult(clock, 1033 clocksource_tick.shift); 1034 clocksource_tick.read = tick_ops->get_tick; 1035 1036 printk("clocksource: mult[%x] shift[%d]\n", 1037 clocksource_tick.mult, clocksource_tick.shift); 1038 1039 clocksource_register(&clocksource_tick); 1040 1041 sparc64_clockevent.name = tick_ops->name; 1042 1043 setup_clockevent_multiplier(clock); 1044 1045 sparc64_clockevent.max_delta_ns = 1046 clockevent_delta2ns(0x7fffffffffffffff, &sparc64_clockevent); 1047 sparc64_clockevent.min_delta_ns = 1048 clockevent_delta2ns(0xF, &sparc64_clockevent); 1049 1050 printk("clockevent: mult[%lx] shift[%d]\n", 1051 sparc64_clockevent.mult, sparc64_clockevent.shift); 1052 1053 setup_sparc64_timer(); 1054 1055#ifdef CONFIG_CPU_FREQ 1056 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block, 1057 CPUFREQ_TRANSITION_NOTIFIER); 1058#endif 1059} 1060 1061unsigned long long sched_clock(void) 1062{ 1063 unsigned long ticks = tick_ops->get_tick(); 1064 1065 return (ticks * timer_ticks_per_nsec_quotient) 1066 >> SPARC64_NSEC_PER_CYC_SHIFT; 1067} 1068 1069static int set_rtc_mmss(unsigned long nowtime) 1070{ 1071 int real_seconds, real_minutes, chip_minutes; 1072 void __iomem *mregs = mstk48t02_regs; 1073#ifdef CONFIG_PCI 1074 unsigned long dregs = ds1287_regs; 1075 void __iomem *bregs = bq4802_regs; 1076#else 1077 unsigned long dregs = 0UL; 1078 void __iomem *bregs = 0UL; 1079#endif 1080 unsigned long flags; 1081 u8 tmp; 1082 1083 /* 1084 * Not having a register set can lead to trouble. 1085 * Also starfire doesn't have a tod clock. 1086 */ 1087 if (!mregs && !dregs & !bregs) 1088 return -1; 1089 1090 if (mregs) { 1091 spin_lock_irqsave(&mostek_lock, flags); 1092 1093 /* Read the current RTC minutes. */ 1094 tmp = mostek_read(mregs + MOSTEK_CREG); 1095 tmp |= MSTK_CREG_READ; 1096 mostek_write(mregs + MOSTEK_CREG, tmp); 1097 1098 chip_minutes = MSTK_REG_MIN(mregs); 1099 1100 tmp = mostek_read(mregs + MOSTEK_CREG); 1101 tmp &= ~MSTK_CREG_READ; 1102 mostek_write(mregs + MOSTEK_CREG, tmp); 1103 1104 /* 1105 * since we're only adjusting minutes and seconds, 1106 * don't interfere with hour overflow. This avoids 1107 * messing with unknown time zones but requires your 1108 * RTC not to be off by more than 15 minutes 1109 */ 1110 real_seconds = nowtime % 60; 1111 real_minutes = nowtime / 60; 1112 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1) 1113 real_minutes += 30; /* correct for half hour time zone */ 1114 real_minutes %= 60; 1115 1116 if (abs(real_minutes - chip_minutes) < 30) { 1117 tmp = mostek_read(mregs + MOSTEK_CREG); 1118 tmp |= MSTK_CREG_WRITE; 1119 mostek_write(mregs + MOSTEK_CREG, tmp); 1120 1121 MSTK_SET_REG_SEC(mregs,real_seconds); 1122 MSTK_SET_REG_MIN(mregs,real_minutes); 1123 1124 tmp = mostek_read(mregs + MOSTEK_CREG); 1125 tmp &= ~MSTK_CREG_WRITE; 1126 mostek_write(mregs + MOSTEK_CREG, tmp); 1127 1128 spin_unlock_irqrestore(&mostek_lock, flags); 1129 1130 return 0; 1131 } else { 1132 spin_unlock_irqrestore(&mostek_lock, flags); 1133 1134 return -1; 1135 } 1136 } else if (bregs) { 1137 int retval = 0; 1138 unsigned char val = readb(bregs + 0x0e); 1139 1140 /* BQ4802 RTC chip. */ 1141 1142 writeb(val | 0x08, bregs + 0x0e); 1143 1144 chip_minutes = readb(bregs + 0x02); 1145 BCD_TO_BIN(chip_minutes); 1146 real_seconds = nowtime % 60; 1147 real_minutes = nowtime / 60; 1148 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1) 1149 real_minutes += 30; 1150 real_minutes %= 60; 1151 1152 if (abs(real_minutes - chip_minutes) < 30) { 1153 BIN_TO_BCD(real_seconds); 1154 BIN_TO_BCD(real_minutes); 1155 writeb(real_seconds, bregs + 0x00); 1156 writeb(real_minutes, bregs + 0x02); 1157 } else { 1158 printk(KERN_WARNING 1159 "set_rtc_mmss: can't update from %d to %d\n", 1160 chip_minutes, real_minutes); 1161 retval = -1; 1162 } 1163 1164 writeb(val, bregs + 0x0e); 1165 1166 return retval; 1167 } else { 1168 int retval = 0; 1169 unsigned char save_control, save_freq_select; 1170 1171 /* Stolen from arch/i386/kernel/time.c, see there for 1172 * credits and descriptive comments. 1173 */ 1174 spin_lock_irqsave(&rtc_lock, flags); 1175 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */ 1176 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); 1177 1178 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */ 1179 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); 1180 1181 chip_minutes = CMOS_READ(RTC_MINUTES); 1182 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) 1183 BCD_TO_BIN(chip_minutes); 1184 real_seconds = nowtime % 60; 1185 real_minutes = nowtime / 60; 1186 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1) 1187 real_minutes += 30; 1188 real_minutes %= 60; 1189 1190 if (abs(real_minutes - chip_minutes) < 30) { 1191 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 1192 BIN_TO_BCD(real_seconds); 1193 BIN_TO_BCD(real_minutes); 1194 } 1195 CMOS_WRITE(real_seconds,RTC_SECONDS); 1196 CMOS_WRITE(real_minutes,RTC_MINUTES); 1197 } else { 1198 printk(KERN_WARNING 1199 "set_rtc_mmss: can't update from %d to %d\n", 1200 chip_minutes, real_minutes); 1201 retval = -1; 1202 } 1203 1204 CMOS_WRITE(save_control, RTC_CONTROL); 1205 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); 1206 spin_unlock_irqrestore(&rtc_lock, flags); 1207 1208 return retval; 1209 } 1210} 1211 1212#define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */ 1213static unsigned char mini_rtc_status; /* bitmapped status byte. */ 1214 1215#define FEBRUARY 2 1216#define STARTOFTIME 1970 1217#define SECDAY 86400L 1218#define SECYR (SECDAY * 365) 1219#define leapyear(year) ((year) % 4 == 0 && \ 1220 ((year) % 100 != 0 || (year) % 400 == 0)) 1221#define days_in_year(a) (leapyear(a) ? 366 : 365) 1222#define days_in_month(a) (month_days[(a) - 1]) 1223 1224static int month_days[12] = { 1225 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 1226}; 1227 1228/* 1229 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK) 1230 */ 1231static void GregorianDay(struct rtc_time * tm) 1232{ 1233 int leapsToDate; 1234 int lastYear; 1235 int day; 1236 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 }; 1237 1238 lastYear = tm->tm_year - 1; 1239 1240 /* 1241 * Number of leap corrections to apply up to end of last year 1242 */ 1243 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400; 1244 1245 /* 1246 * This year is a leap year if it is divisible by 4 except when it is 1247 * divisible by 100 unless it is divisible by 400 1248 * 1249 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was 1250 */ 1251 day = tm->tm_mon > 2 && leapyear(tm->tm_year); 1252 1253 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] + 1254 tm->tm_mday; 1255 1256 tm->tm_wday = day % 7; 1257} 1258 1259static void to_tm(int tim, struct rtc_time *tm) 1260{ 1261 register int i; 1262 register long hms, day; 1263 1264 day = tim / SECDAY; 1265 hms = tim % SECDAY; 1266 1267 /* Hours, minutes, seconds are easy */ 1268 tm->tm_hour = hms / 3600; 1269 tm->tm_min = (hms % 3600) / 60; 1270 tm->tm_sec = (hms % 3600) % 60; 1271 1272 /* Number of years in days */ 1273 for (i = STARTOFTIME; day >= days_in_year(i); i++) 1274 day -= days_in_year(i); 1275 tm->tm_year = i; 1276 1277 /* Number of months in days left */ 1278 if (leapyear(tm->tm_year)) 1279 days_in_month(FEBRUARY) = 29; 1280 for (i = 1; day >= days_in_month(i); i++) 1281 day -= days_in_month(i); 1282 days_in_month(FEBRUARY) = 28; 1283 tm->tm_mon = i; 1284 1285 /* Days are what is left over (+1) from all that. */ 1286 tm->tm_mday = day + 1; 1287 1288 /* 1289 * Determine the day of week 1290 */ 1291 GregorianDay(tm); 1292} 1293 1294/* Both Starfire and SUN4V give us seconds since Jan 1st, 1970, 1295 * aka Unix time. So we have to convert to/from rtc_time. 1296 */ 1297static void starfire_get_rtc_time(struct rtc_time *time) 1298{ 1299 u32 seconds = starfire_get_time(); 1300 1301 to_tm(seconds, time); 1302 time->tm_year -= 1900; 1303 time->tm_mon -= 1; 1304} 1305 1306static int starfire_set_rtc_time(struct rtc_time *time) 1307{ 1308 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1, 1309 time->tm_mday, time->tm_hour, 1310 time->tm_min, time->tm_sec); 1311 1312 return starfire_set_time(seconds); 1313} 1314 1315static void hypervisor_get_rtc_time(struct rtc_time *time) 1316{ 1317 u32 seconds = hypervisor_get_time(); 1318 1319 to_tm(seconds, time); 1320 time->tm_year -= 1900; 1321 time->tm_mon -= 1; 1322} 1323 1324static int hypervisor_set_rtc_time(struct rtc_time *time) 1325{ 1326 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1, 1327 time->tm_mday, time->tm_hour, 1328 time->tm_min, time->tm_sec); 1329 1330 return hypervisor_set_time(seconds); 1331} 1332 1333#ifdef CONFIG_PCI 1334static void bq4802_get_rtc_time(struct rtc_time *time) 1335{ 1336 unsigned char val = readb(bq4802_regs + 0x0e); 1337 unsigned int century; 1338 1339 writeb(val | 0x08, bq4802_regs + 0x0e); 1340 1341 time->tm_sec = readb(bq4802_regs + 0x00); 1342 time->tm_min = readb(bq4802_regs + 0x02); 1343 time->tm_hour = readb(bq4802_regs + 0x04); 1344 time->tm_mday = readb(bq4802_regs + 0x06); 1345 time->tm_mon = readb(bq4802_regs + 0x09); 1346 time->tm_year = readb(bq4802_regs + 0x0a); 1347 time->tm_wday = readb(bq4802_regs + 0x08); 1348 century = readb(bq4802_regs + 0x0f); 1349 1350 writeb(val, bq4802_regs + 0x0e); 1351 1352 BCD_TO_BIN(time->tm_sec); 1353 BCD_TO_BIN(time->tm_min); 1354 BCD_TO_BIN(time->tm_hour); 1355 BCD_TO_BIN(time->tm_mday); 1356 BCD_TO_BIN(time->tm_mon); 1357 BCD_TO_BIN(time->tm_year); 1358 BCD_TO_BIN(time->tm_wday); 1359 BCD_TO_BIN(century); 1360 1361 time->tm_year += (century * 100); 1362 time->tm_year -= 1900; 1363 1364 time->tm_mon--; 1365} 1366 1367static int bq4802_set_rtc_time(struct rtc_time *time) 1368{ 1369 unsigned char val = readb(bq4802_regs + 0x0e); 1370 unsigned char sec, min, hrs, day, mon, yrs, century; 1371 unsigned int year; 1372 1373 year = time->tm_year + 1900; 1374 century = year / 100; 1375 yrs = year % 100; 1376 1377 mon = time->tm_mon + 1; /* tm_mon starts at zero */ 1378 day = time->tm_mday; 1379 hrs = time->tm_hour; 1380 min = time->tm_min; 1381 sec = time->tm_sec; 1382 1383 BIN_TO_BCD(sec); 1384 BIN_TO_BCD(min); 1385 BIN_TO_BCD(hrs); 1386 BIN_TO_BCD(day); 1387 BIN_TO_BCD(mon); 1388 BIN_TO_BCD(yrs); 1389 BIN_TO_BCD(century); 1390 1391 writeb(val | 0x08, bq4802_regs + 0x0e); 1392 1393 writeb(sec, bq4802_regs + 0x00); 1394 writeb(min, bq4802_regs + 0x02); 1395 writeb(hrs, bq4802_regs + 0x04); 1396 writeb(day, bq4802_regs + 0x06); 1397 writeb(mon, bq4802_regs + 0x09); 1398 writeb(yrs, bq4802_regs + 0x0a); 1399 writeb(century, bq4802_regs + 0x0f); 1400 1401 writeb(val, bq4802_regs + 0x0e); 1402 1403 return 0; 1404} 1405#endif /* CONFIG_PCI */ 1406 1407struct mini_rtc_ops { 1408 void (*get_rtc_time)(struct rtc_time *); 1409 int (*set_rtc_time)(struct rtc_time *); 1410}; 1411 1412static struct mini_rtc_ops starfire_rtc_ops = { 1413 .get_rtc_time = starfire_get_rtc_time, 1414 .set_rtc_time = starfire_set_rtc_time, 1415}; 1416 1417static struct mini_rtc_ops hypervisor_rtc_ops = { 1418 .get_rtc_time = hypervisor_get_rtc_time, 1419 .set_rtc_time = hypervisor_set_rtc_time, 1420}; 1421 1422#ifdef CONFIG_PCI 1423static struct mini_rtc_ops bq4802_rtc_ops = { 1424 .get_rtc_time = bq4802_get_rtc_time, 1425 .set_rtc_time = bq4802_set_rtc_time, 1426}; 1427#endif /* CONFIG_PCI */ 1428 1429static struct mini_rtc_ops *mini_rtc_ops; 1430 1431static inline void mini_get_rtc_time(struct rtc_time *time) 1432{ 1433 unsigned long flags; 1434 1435 spin_lock_irqsave(&rtc_lock, flags); 1436 mini_rtc_ops->get_rtc_time(time); 1437 spin_unlock_irqrestore(&rtc_lock, flags); 1438} 1439 1440static inline int mini_set_rtc_time(struct rtc_time *time) 1441{ 1442 unsigned long flags; 1443 int err; 1444 1445 spin_lock_irqsave(&rtc_lock, flags); 1446 err = mini_rtc_ops->set_rtc_time(time); 1447 spin_unlock_irqrestore(&rtc_lock, flags); 1448 1449 return err; 1450} 1451 1452static int mini_rtc_ioctl(struct inode *inode, struct file *file, 1453 unsigned int cmd, unsigned long arg) 1454{ 1455 struct rtc_time wtime; 1456 void __user *argp = (void __user *)arg; 1457 1458 switch (cmd) { 1459 1460 case RTC_PLL_GET: 1461 return -EINVAL; 1462 1463 case RTC_PLL_SET: 1464 return -EINVAL; 1465 1466 case RTC_UIE_OFF: /* disable ints from RTC updates. */ 1467 return 0; 1468 1469 case RTC_UIE_ON: /* enable ints for RTC updates. */ 1470 return -EINVAL; 1471 1472 case RTC_RD_TIME: /* Read the time/date from RTC */ 1473 /* this doesn't get week-day, who cares */ 1474 memset(&wtime, 0, sizeof(wtime)); 1475 mini_get_rtc_time(&wtime); 1476 1477 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0; 1478 1479 case RTC_SET_TIME: /* Set the RTC */ 1480 { 1481 int year, days; 1482 1483 if (!capable(CAP_SYS_TIME)) 1484 return -EACCES; 1485 1486 if (copy_from_user(&wtime, argp, sizeof(wtime))) 1487 return -EFAULT; 1488 1489 year = wtime.tm_year + 1900; 1490 days = month_days[wtime.tm_mon] + 1491 ((wtime.tm_mon == 1) && leapyear(year)); 1492 1493 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) || 1494 (wtime.tm_mday < 1)) 1495 return -EINVAL; 1496 1497 if (wtime.tm_mday < 0 || wtime.tm_mday > days) 1498 return -EINVAL; 1499 1500 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 || 1501 wtime.tm_min < 0 || wtime.tm_min >= 60 || 1502 wtime.tm_sec < 0 || wtime.tm_sec >= 60) 1503 return -EINVAL; 1504 1505 return mini_set_rtc_time(&wtime); 1506 } 1507 } 1508 1509 return -EINVAL; 1510} 1511 1512static int mini_rtc_open(struct inode *inode, struct file *file) 1513{ 1514 if (mini_rtc_status & RTC_IS_OPEN) 1515 return -EBUSY; 1516 1517 mini_rtc_status |= RTC_IS_OPEN; 1518 1519 return 0; 1520} 1521 1522static int mini_rtc_release(struct inode *inode, struct file *file) 1523{ 1524 mini_rtc_status &= ~RTC_IS_OPEN; 1525 return 0; 1526} 1527 1528 1529static const struct file_operations mini_rtc_fops = { 1530 .owner = THIS_MODULE, 1531 .ioctl = mini_rtc_ioctl, 1532 .open = mini_rtc_open, 1533 .release = mini_rtc_release, 1534}; 1535 1536static struct miscdevice rtc_mini_dev = 1537{ 1538 .minor = RTC_MINOR, 1539 .name = "rtc", 1540 .fops = &mini_rtc_fops, 1541}; 1542 1543static int __init rtc_mini_init(void) 1544{ 1545 int retval; 1546 1547 if (tlb_type == hypervisor) 1548 mini_rtc_ops = &hypervisor_rtc_ops; 1549 else if (this_is_starfire) 1550 mini_rtc_ops = &starfire_rtc_ops; 1551#ifdef CONFIG_PCI 1552 else if (bq4802_regs) 1553 mini_rtc_ops = &bq4802_rtc_ops; 1554#endif /* CONFIG_PCI */ 1555 else 1556 return -ENODEV; 1557 1558 printk(KERN_INFO "Mini RTC Driver\n"); 1559 1560 retval = misc_register(&rtc_mini_dev); 1561 if (retval < 0) 1562 return retval; 1563 1564 return 0; 1565} 1566 1567static void __exit rtc_mini_exit(void) 1568{ 1569 misc_deregister(&rtc_mini_dev); 1570} 1571 1572 1573module_init(rtc_mini_init); 1574module_exit(rtc_mini_exit); 1575