1/*
2 * arch/ppc/platforms/prpmc800.h
3 *
4 * Definitions for Motorola PrPMC800 board support
5 *
6 * Author: Dale Farnsworth <dale.farnsworth@mvista.com>
7 *
8 * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
9 * the terms of the GNU General Public License version 2.  This program
10 * is licensed "as is" without any warranty of any kind, whether express
11 * or implied.
12 */
13 /*
14  * From Processor to PCI:
15  *   PCI Mem Space: 0x80000000 - 0xa0000000 -> 0x80000000 - 0xa0000000 (512 MB)
16  *   PCI I/O Space: 0xfe400000 - 0xfeef0000 -> 0x00000000 - 0x00b00000 (11 MB)
17  *      Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area
18  *
19  * From PCI to Processor:
20  *   System Memory: 0x00000000 -> 0x00000000
21  */
22
23#ifndef __ASMPPC_PRPMC800_H
24#define __ASMPPC_PRPMC800_H
25
26#define PRPMC800_PCI_CONFIG_ADDR		0xfe000cf8
27#define PRPMC800_PCI_CONFIG_DATA		0xfe000cfc
28
29#define PRPMC800_PROC_PCI_IO_START		0xfe400000U
30#define PRPMC800_PROC_PCI_IO_END		0xfeefffffU
31#define PRPMC800_PCI_IO_START			0x00000000U
32#define PRPMC800_PCI_IO_END			0x00afffffU
33
34#define PRPMC800_PROC_PCI_MEM_START		0x80000000U
35#define PRPMC800_PROC_PCI_MEM_END		0x9fffffffU
36#define PRPMC800_PCI_MEM_START			0x80000000U
37#define PRPMC800_PCI_MEM_END			0x9fffffffU
38
39#define PRPMC800_NM_PROC_PCI_MEM_START		0x40000000U
40#define PRPMC800_NM_PROC_PCI_MEM_END		0xdfffffffU
41#define PRPMC800_NM_PCI_MEM_START		0x40000000U
42#define PRPMC800_NM_PCI_MEM_END			0xdfffffffU
43
44#define PRPMC800_PCI_DRAM_OFFSET		0x00000000U
45#define PRPMC800_PCI_PHY_MEM_OFFSET		0x00000000U
46
47#define PRPMC800_ISA_IO_BASE			PRPMC800_PROC_PCI_IO_START
48#define PRPMC800_ISA_MEM_BASE			0x00000000U
49
50#define PRPMC800_HARRIER_XCSR_BASE		HARRIER_DEFAULT_XCSR_BASE
51#define PRPMC800_HARRIER_MPIC_BASE		0xff000000
52
53#define PRPMC800_SERIAL_1			0xfeff00c0
54
55#define PRPMC800_BASE_BAUD			1843200
56
57/*
58 * interrupt vector number and priority for harrier internal interrupt
59 * sources
60 */
61#define PRPMC800_INT_IRQ			16
62#define PRPMC800_INT_PRI			15
63
64/* UART Defines. */
65#define RS_TABLE_SIZE  4
66
67/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
68#define BASE_BAUD (PRPMC800_BASE_BAUD / 16)
69
70#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
71
72/* UARTS are at IRQ 16 */
73#define STD_SERIAL_PORT_DFNS \
74        { 0, BASE_BAUD, PRPMC800_SERIAL_1, 16, STD_COM_FLAGS, /* ttyS0 */\
75		iomem_base: (unsigned char *)PRPMC800_SERIAL_1,		\
76		iomem_reg_shift: 0,					\
77		io_type: SERIAL_IO_MEM },
78
79#define SERIAL_PORT_DFNS \
80        STD_SERIAL_PORT_DFNS
81
82#endif				/* __ASMPPC_PRPMC800_H */
83