1/* 2 * spu hypervisor abstraction for Beat 3 * 4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License along 17 * with this program; if not, write to the Free Software Foundation, Inc., 18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19 */ 20 21#include <linux/module.h> 22 23#include <asm/types.h> 24#include <asm/spu.h> 25#include <asm/spu_priv1.h> 26 27#include "beat_wrapper.h" 28 29static inline void _int_mask_set(struct spu *spu, int class, u64 mask) 30{ 31 spu->shadow_int_mask_RW[class] = mask; 32 beat_set_irq_mask_for_spe(spu->spe_id, class, mask); 33} 34 35static inline u64 _int_mask_get(struct spu *spu, int class) 36{ 37 return spu->shadow_int_mask_RW[class]; 38} 39 40static void int_mask_set(struct spu *spu, int class, u64 mask) 41{ 42 _int_mask_set(spu, class, mask); 43} 44 45static u64 int_mask_get(struct spu *spu, int class) 46{ 47 return _int_mask_get(spu, class); 48} 49 50static void int_mask_and(struct spu *spu, int class, u64 mask) 51{ 52 u64 old_mask; 53 old_mask = _int_mask_get(spu, class); 54 _int_mask_set(spu, class, old_mask & mask); 55} 56 57static void int_mask_or(struct spu *spu, int class, u64 mask) 58{ 59 u64 old_mask; 60 old_mask = _int_mask_get(spu, class); 61 _int_mask_set(spu, class, old_mask | mask); 62} 63 64static void int_stat_clear(struct spu *spu, int class, u64 stat) 65{ 66 beat_clear_interrupt_status_of_spe(spu->spe_id, class, stat); 67} 68 69static u64 int_stat_get(struct spu *spu, int class) 70{ 71 u64 int_stat; 72 beat_get_interrupt_status_of_spe(spu->spe_id, class, &int_stat); 73 return int_stat; 74} 75 76static void cpu_affinity_set(struct spu *spu, int cpu) 77{ 78 return; 79} 80 81static u64 mfc_dar_get(struct spu *spu) 82{ 83 u64 dar; 84 beat_get_spe_privileged_state_1_registers( 85 spu->spe_id, 86 offsetof(struct spu_priv1, mfc_dar_RW), &dar); 87 return dar; 88} 89 90static u64 mfc_dsisr_get(struct spu *spu) 91{ 92 u64 dsisr; 93 beat_get_spe_privileged_state_1_registers( 94 spu->spe_id, 95 offsetof(struct spu_priv1, mfc_dsisr_RW), &dsisr); 96 return dsisr; 97} 98 99static void mfc_dsisr_set(struct spu *spu, u64 dsisr) 100{ 101 beat_set_spe_privileged_state_1_registers( 102 spu->spe_id, 103 offsetof(struct spu_priv1, mfc_dsisr_RW), dsisr); 104} 105 106static void mfc_sdr_setup(struct spu *spu) 107{ 108 return; 109} 110 111static void mfc_sr1_set(struct spu *spu, u64 sr1) 112{ 113 beat_set_spe_privileged_state_1_registers( 114 spu->spe_id, 115 offsetof(struct spu_priv1, mfc_sr1_RW), sr1); 116} 117 118static u64 mfc_sr1_get(struct spu *spu) 119{ 120 u64 sr1; 121 beat_get_spe_privileged_state_1_registers( 122 spu->spe_id, 123 offsetof(struct spu_priv1, mfc_sr1_RW), &sr1); 124 return sr1; 125} 126 127static void mfc_tclass_id_set(struct spu *spu, u64 tclass_id) 128{ 129 beat_set_spe_privileged_state_1_registers( 130 spu->spe_id, 131 offsetof(struct spu_priv1, mfc_tclass_id_RW), tclass_id); 132} 133 134static u64 mfc_tclass_id_get(struct spu *spu) 135{ 136 u64 tclass_id; 137 beat_get_spe_privileged_state_1_registers( 138 spu->spe_id, 139 offsetof(struct spu_priv1, mfc_tclass_id_RW), &tclass_id); 140 return tclass_id; 141} 142 143static void tlb_invalidate(struct spu *spu) 144{ 145 beat_set_spe_privileged_state_1_registers( 146 spu->spe_id, 147 offsetof(struct spu_priv1, tlb_invalidate_entry_W), 0ul); 148} 149 150static void resource_allocation_groupID_set(struct spu *spu, u64 id) 151{ 152 beat_set_spe_privileged_state_1_registers( 153 spu->spe_id, 154 offsetof(struct spu_priv1, resource_allocation_groupID_RW), 155 id); 156} 157 158static u64 resource_allocation_groupID_get(struct spu *spu) 159{ 160 u64 id; 161 beat_get_spe_privileged_state_1_registers( 162 spu->spe_id, 163 offsetof(struct spu_priv1, resource_allocation_groupID_RW), 164 &id); 165 return id; 166} 167 168static void resource_allocation_enable_set(struct spu *spu, u64 enable) 169{ 170 beat_set_spe_privileged_state_1_registers( 171 spu->spe_id, 172 offsetof(struct spu_priv1, resource_allocation_enable_RW), 173 enable); 174} 175 176static u64 resource_allocation_enable_get(struct spu *spu) 177{ 178 u64 enable; 179 beat_get_spe_privileged_state_1_registers( 180 spu->spe_id, 181 offsetof(struct spu_priv1, resource_allocation_enable_RW), 182 &enable); 183 return enable; 184} 185 186const struct spu_priv1_ops spu_priv1_beat_ops = 187{ 188 .int_mask_and = int_mask_and, 189 .int_mask_or = int_mask_or, 190 .int_mask_set = int_mask_set, 191 .int_mask_get = int_mask_get, 192 .int_stat_clear = int_stat_clear, 193 .int_stat_get = int_stat_get, 194 .cpu_affinity_set = cpu_affinity_set, 195 .mfc_dar_get = mfc_dar_get, 196 .mfc_dsisr_get = mfc_dsisr_get, 197 .mfc_dsisr_set = mfc_dsisr_set, 198 .mfc_sdr_setup = mfc_sdr_setup, 199 .mfc_sr1_set = mfc_sr1_set, 200 .mfc_sr1_get = mfc_sr1_get, 201 .mfc_tclass_id_set = mfc_tclass_id_set, 202 .mfc_tclass_id_get = mfc_tclass_id_get, 203 .tlb_invalidate = tlb_invalidate, 204 .resource_allocation_groupID_set = resource_allocation_groupID_set, 205 .resource_allocation_groupID_get = resource_allocation_groupID_get, 206 .resource_allocation_enable_set = resource_allocation_enable_set, 207 .resource_allocation_enable_get = resource_allocation_enable_get, 208}; 209