1/* 2 * Celleb setup code 3 * 4 * (C) Copyright 2006-2007 TOSHIBA CORPORATION 5 * 6 * This code is based on arch/powerpc/platforms/cell/setup.c: 7 * Copyright (C) 1995 Linus Torvalds 8 * Adapted from 'alpha' version by Gary Thomas 9 * Modified by Cort Dougan (cort@cs.nmt.edu) 10 * Modified by PPC64 Team, IBM Corp 11 * Modified by Cell Team, IBM Deutschland Entwicklung GmbH 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License along 24 * with this program; if not, write to the Free Software Foundation, Inc., 25 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 26 */ 27 28#undef DEBUG 29 30#include <linux/cpu.h> 31#include <linux/sched.h> 32#include <linux/kernel.h> 33#include <linux/mm.h> 34#include <linux/stddef.h> 35#include <linux/unistd.h> 36#include <linux/reboot.h> 37#include <linux/init.h> 38#include <linux/delay.h> 39#include <linux/irq.h> 40#include <linux/seq_file.h> 41#include <linux/root_dev.h> 42#include <linux/console.h> 43 44#include <asm/mmu.h> 45#include <asm/processor.h> 46#include <asm/io.h> 47#include <asm/kexec.h> 48#include <asm/prom.h> 49#include <asm/machdep.h> 50#include <asm/cputable.h> 51#include <asm/irq.h> 52#include <asm/spu_priv1.h> 53#include <asm/firmware.h> 54#include <asm/of_platform.h> 55 56#include "interrupt.h" 57#include "beat_wrapper.h" 58#include "beat.h" 59#include "pci.h" 60 61static char celleb_machine_type[128] = "Celleb"; 62 63static void celleb_show_cpuinfo(struct seq_file *m) 64{ 65 struct device_node *root; 66 const char *model = ""; 67 68 root = of_find_node_by_path("/"); 69 if (root) 70 model = of_get_property(root, "model", NULL); 71 /* using "CHRP" is to trick anaconda into installing FCx into Celleb */ 72 seq_printf(m, "machine\t\t: %s %s\n", celleb_machine_type, model); 73 of_node_put(root); 74} 75 76static int celleb_machine_type_hack(char *ptr) 77{ 78 strncpy(celleb_machine_type, ptr, sizeof(celleb_machine_type)); 79 celleb_machine_type[sizeof(celleb_machine_type)-1] = 0; 80 return 0; 81} 82 83__setup("celleb_machine_type_hack=", celleb_machine_type_hack); 84 85static void celleb_progress(char *s, unsigned short hex) 86{ 87 printk("*** %04x : %s\n", hex, s ? s : ""); 88} 89 90static void __init celleb_setup_arch(void) 91{ 92#ifdef CONFIG_SPU_BASE 93 spu_priv1_ops = &spu_priv1_beat_ops; 94 spu_management_ops = &spu_management_of_ops; 95#endif 96 97#ifdef CONFIG_SMP 98 smp_init_celleb(); 99#endif 100 101 /* init to some ~sane value until calibrate_delay() runs */ 102 loops_per_jiffy = 50000000; 103 104 if (ROOT_DEV == 0) { 105 printk("No ramdisk, default root is /dev/hda2\n"); 106 ROOT_DEV = Root_HDA2; 107 } 108 109#ifdef CONFIG_DUMMY_CONSOLE 110 conswitchp = &dummy_con; 111#endif 112} 113 114static void beat_power_save(void) 115{ 116 beat_pause(0); 117} 118 119static int __init celleb_probe(void) 120{ 121 unsigned long root = of_get_flat_dt_root(); 122 123 if (!of_flat_dt_is_compatible(root, "Beat")) 124 return 0; 125 126 powerpc_firmware_features |= FW_FEATURE_CELLEB_POSSIBLE; 127 hpte_init_beat(); 128 return 1; 129} 130 131#ifdef CONFIG_KEXEC 132static void celleb_kexec_cpu_down(int crash, int secondary) 133{ 134 beatic_deinit_IRQ(); 135} 136#endif 137 138static struct of_device_id celleb_bus_ids[] = { 139 { .type = "scc", }, 140 { .type = "ioif", }, /* old style */ 141 {}, 142}; 143 144static int __init celleb_publish_devices(void) 145{ 146 if (!machine_is(celleb)) 147 return 0; 148 149 /* Publish OF platform devices for southbridge IOs */ 150 of_platform_bus_probe(NULL, celleb_bus_ids, NULL); 151 152 return 0; 153} 154device_initcall(celleb_publish_devices); 155 156define_machine(celleb) { 157 .name = "Cell Reference Set", 158 .probe = celleb_probe, 159 .setup_arch = celleb_setup_arch, 160 .show_cpuinfo = celleb_show_cpuinfo, 161 .restart = beat_restart, 162 .power_off = beat_power_off, 163 .halt = beat_halt, 164 .get_rtc_time = beat_get_rtc_time, 165 .set_rtc_time = beat_set_rtc_time, 166 .calibrate_decr = generic_calibrate_decr, 167 .progress = celleb_progress, 168 .power_save = beat_power_save, 169 .nvram_size = beat_nvram_get_size, 170 .nvram_read = beat_nvram_read, 171 .nvram_write = beat_nvram_write, 172 .set_dabr = beat_set_xdabr, 173 .init_IRQ = beatic_init_IRQ, 174 .get_irq = beatic_get_irq, 175 .pci_probe_mode = celleb_pci_probe_mode, 176 .pci_setup_phb = celleb_setup_phb, 177#ifdef CONFIG_KEXEC 178 .kexec_cpu_down = celleb_kexec_cpu_down, 179 .machine_kexec = default_machine_kexec, 180 .machine_kexec_prepare = default_machine_kexec_prepare, 181 .machine_crash_shutdown = default_machine_crash_shutdown, 182#endif 183}; 184