1/* 2 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support 3 * E500 Book E processors. 4 * 5 * Copyright 2004 Freescale Semiconductor, Inc 6 * 7 * This file contains the routines for initializing the MMU 8 * on the 4xx series of chips. 9 * -- paulus 10 * 11 * Derived from arch/ppc/mm/init.c: 12 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 13 * 14 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) 15 * and Cort Dougan (PReP) (cort@cs.nmt.edu) 16 * Copyright (C) 1996 Paul Mackerras 17 * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). 18 * 19 * Derived from "arch/i386/mm/init.c" 20 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds 21 * 22 * This program is free software; you can redistribute it and/or 23 * modify it under the terms of the GNU General Public License 24 * as published by the Free Software Foundation; either version 25 * 2 of the License, or (at your option) any later version. 26 * 27 */ 28 29#include <linux/signal.h> 30#include <linux/sched.h> 31#include <linux/kernel.h> 32#include <linux/errno.h> 33#include <linux/string.h> 34#include <linux/types.h> 35#include <linux/ptrace.h> 36#include <linux/mman.h> 37#include <linux/mm.h> 38#include <linux/swap.h> 39#include <linux/stddef.h> 40#include <linux/vmalloc.h> 41#include <linux/init.h> 42#include <linux/delay.h> 43#include <linux/highmem.h> 44 45#include <asm/pgalloc.h> 46#include <asm/prom.h> 47#include <asm/io.h> 48#include <asm/mmu_context.h> 49#include <asm/pgtable.h> 50#include <asm/mmu.h> 51#include <asm/uaccess.h> 52#include <asm/smp.h> 53#include <asm/bootx.h> 54#include <asm/machdep.h> 55#include <asm/setup.h> 56 57extern void loadcam_entry(unsigned int index); 58unsigned int tlbcam_index; 59unsigned int num_tlbcam_entries; 60static unsigned long __cam0, __cam1, __cam2; 61extern unsigned long total_lowmem; 62extern unsigned long __max_low_memory; 63#define MAX_LOW_MEM CONFIG_LOWMEM_SIZE 64 65#define NUM_TLBCAMS (16) 66 67struct tlbcam { 68 u32 MAS0; 69 u32 MAS1; 70 u32 MAS2; 71 u32 MAS3; 72 u32 MAS7; 73} TLBCAM[NUM_TLBCAMS]; 74 75struct tlbcamrange { 76 unsigned long start; 77 unsigned long limit; 78 phys_addr_t phys; 79} tlbcam_addrs[NUM_TLBCAMS]; 80 81extern unsigned int tlbcam_index; 82 83/* 84 * Return PA for this VA if it is mapped by a CAM, or 0 85 */ 86unsigned long v_mapped_by_tlbcam(unsigned long va) 87{ 88 int b; 89 for (b = 0; b < tlbcam_index; ++b) 90 if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit) 91 return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start); 92 return 0; 93} 94 95/* 96 * Return VA for a given PA or 0 if not mapped 97 */ 98unsigned long p_mapped_by_tlbcam(unsigned long pa) 99{ 100 int b; 101 for (b = 0; b < tlbcam_index; ++b) 102 if (pa >= tlbcam_addrs[b].phys 103 && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start) 104 +tlbcam_addrs[b].phys) 105 return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys); 106 return 0; 107} 108 109/* 110 * Set up one of the I/D BAT (block address translation) register pairs. 111 * The parameters are not checked; in particular size must be a power 112 * of 4 between 4k and 256M. 113 */ 114void settlbcam(int index, unsigned long virt, phys_addr_t phys, 115 unsigned int size, int flags, unsigned int pid) 116{ 117 unsigned int tsize, lz; 118 119 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size)); 120 tsize = (21 - lz) / 2; 121 122#ifdef CONFIG_SMP 123 if ((flags & _PAGE_NO_CACHE) == 0) 124 flags |= _PAGE_COHERENT; 125#endif 126 127 TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1); 128 TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid); 129 TLBCAM[index].MAS2 = virt & PAGE_MASK; 130 131 TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0; 132 TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0; 133 TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0; 134 TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0; 135 TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0; 136 137 TLBCAM[index].MAS3 = (phys & PAGE_MASK) | MAS3_SX | MAS3_SR; 138 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0); 139 140#ifndef CONFIG_KGDB /* want user access for breakpoints */ 141 if (flags & _PAGE_USER) { 142 TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR; 143 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0); 144 } 145#else 146 TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR; 147 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0); 148#endif 149 150 tlbcam_addrs[index].start = virt; 151 tlbcam_addrs[index].limit = virt + size - 1; 152 tlbcam_addrs[index].phys = phys; 153 154 loadcam_entry(index); 155} 156 157void invalidate_tlbcam_entry(int index) 158{ 159 TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index); 160 TLBCAM[index].MAS1 = ~MAS1_VALID; 161 162 loadcam_entry(index); 163} 164 165void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1, 166 unsigned long cam2) 167{ 168 settlbcam(0, KERNELBASE, PPC_MEMSTART, cam0, _PAGE_KERNEL, 0); 169 tlbcam_index++; 170 if (cam1) { 171 tlbcam_index++; 172 settlbcam(1, KERNELBASE+cam0, PPC_MEMSTART+cam0, cam1, _PAGE_KERNEL, 0); 173 } 174 if (cam2) { 175 tlbcam_index++; 176 settlbcam(2, KERNELBASE+cam0+cam1, PPC_MEMSTART+cam0+cam1, cam2, _PAGE_KERNEL, 0); 177 } 178} 179 180/* 181 * MMU_init_hw does the chip-specific initialization of the MMU hardware. 182 */ 183void __init MMU_init_hw(void) 184{ 185 flush_instruction_cache(); 186} 187 188unsigned long __init mmu_mapin_ram(void) 189{ 190 cam_mapin_ram(__cam0, __cam1, __cam2); 191 192 return __cam0 + __cam1 + __cam2; 193} 194 195 196void __init 197adjust_total_lowmem(void) 198{ 199 unsigned long max_low_mem = MAX_LOW_MEM; 200 unsigned long cam_max = 0x10000000; 201 unsigned long ram; 202 203 /* adjust CAM size to max_low_mem */ 204 if (max_low_mem < cam_max) 205 cam_max = max_low_mem; 206 207 /* adjust lowmem size to max_low_mem */ 208 if (max_low_mem < total_lowmem) 209 ram = max_low_mem; 210 else 211 ram = total_lowmem; 212 213 /* Calculate CAM values */ 214 __cam0 = 1UL << 2 * (__ilog2(ram) / 2); 215 if (__cam0 > cam_max) 216 __cam0 = cam_max; 217 ram -= __cam0; 218 if (ram) { 219 __cam1 = 1UL << 2 * (__ilog2(ram) / 2); 220 if (__cam1 > cam_max) 221 __cam1 = cam_max; 222 ram -= __cam1; 223 } 224 if (ram) { 225 __cam2 = 1UL << 2 * (__ilog2(ram) / 2); 226 if (__cam2 > cam_max) 227 __cam2 = cam_max; 228 ram -= __cam2; 229 } 230 231 printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb," 232 " CAM2=%ldMb residual: %ldMb\n", 233 __cam0 >> 20, __cam1 >> 20, __cam2 >> 20, 234 (total_lowmem - __cam0 - __cam1 - __cam2) >> 20); 235 __max_low_memory = max_low_mem = __cam0 + __cam1 + __cam2; 236} 237