1/* 2 * Common prep/pmac/chrp boot and setup code. 3 */ 4 5#include <linux/module.h> 6#include <linux/string.h> 7#include <linux/sched.h> 8#include <linux/init.h> 9#include <linux/kernel.h> 10#include <linux/reboot.h> 11#include <linux/delay.h> 12#include <linux/initrd.h> 13#include <linux/ide.h> 14#include <linux/tty.h> 15#include <linux/bootmem.h> 16#include <linux/seq_file.h> 17#include <linux/root_dev.h> 18#include <linux/cpu.h> 19#include <linux/console.h> 20 21#include <asm/residual.h> 22#include <asm/io.h> 23#include <asm/prom.h> 24#include <asm/processor.h> 25#include <asm/pgtable.h> 26#include <asm/setup.h> 27#include <asm/amigappc.h> 28#include <asm/smp.h> 29#include <asm/elf.h> 30#include <asm/cputable.h> 31#include <asm/bootx.h> 32#include <asm/btext.h> 33#include <asm/machdep.h> 34#include <asm/uaccess.h> 35#include <asm/system.h> 36#include <asm/pmac_feature.h> 37#include <asm/sections.h> 38#include <asm/nvram.h> 39#include <asm/xmon.h> 40#include <asm/time.h> 41#include <asm/serial.h> 42#include <asm/udbg.h> 43 44#include "setup.h" 45 46#define DBG(fmt...) 47 48#if defined CONFIG_KGDB 49#include <asm/kgdb.h> 50#endif 51 52extern void bootx_init(unsigned long r4, unsigned long phys); 53 54struct ide_machdep_calls ppc_ide_md; 55 56int boot_cpuid; 57EXPORT_SYMBOL_GPL(boot_cpuid); 58int boot_cpuid_phys; 59 60unsigned long ISA_DMA_THRESHOLD; 61unsigned int DMA_MODE_READ; 62unsigned int DMA_MODE_WRITE; 63 64int have_of = 1; 65 66#ifdef CONFIG_VGA_CONSOLE 67unsigned long vgacon_remap_base; 68EXPORT_SYMBOL(vgacon_remap_base); 69#endif 70 71/* 72 * These are used in binfmt_elf.c to put aux entries on the stack 73 * for each elf executable being started. 74 */ 75int dcache_bsize; 76int icache_bsize; 77int ucache_bsize; 78 79/* 80 * We're called here very early in the boot. We determine the machine 81 * type and call the appropriate low-level setup functions. 82 * -- Cort <cort@fsmlabs.com> 83 * 84 * Note that the kernel may be running at an address which is different 85 * from the address that it was linked at, so we must use RELOC/PTRRELOC 86 * to access static data (including strings). -- paulus 87 */ 88unsigned long __init early_init(unsigned long dt_ptr) 89{ 90 unsigned long offset = reloc_offset(); 91 struct cpu_spec *spec; 92 93 /* First zero the BSS -- use memset_io, some platforms don't have 94 * caches on yet */ 95 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, 96 __bss_stop - __bss_start); 97 98 /* 99 * Identify the CPU type and fix up code sections 100 * that depend on which cpu we have. 101 */ 102 spec = identify_cpu(offset, mfspr(SPRN_PVR)); 103 104 do_feature_fixups(spec->cpu_features, 105 PTRRELOC(&__start___ftr_fixup), 106 PTRRELOC(&__stop___ftr_fixup)); 107 108 return KERNELBASE + offset; 109} 110 111 112/* 113 * Find out what kind of machine we're on and save any data we need 114 * from the early boot process (devtree is copied on pmac by prom_init()). 115 * This is called very early on the boot process, after a minimal 116 * MMU environment has been set up but before MMU_init is called. 117 */ 118void __init machine_init(unsigned long dt_ptr, unsigned long phys) 119{ 120 /* Enable early debugging if any specified (see udbg.h) */ 121 udbg_early_init(); 122 123 /* Do some early initialization based on the flat device tree */ 124 early_init_devtree(__va(dt_ptr)); 125 126 probe_machine(); 127 128#ifdef CONFIG_6xx 129 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 130 cpu_has_feature(CPU_FTR_CAN_NAP)) 131 ppc_md.power_save = ppc6xx_idle; 132#endif 133 134 if (ppc_md.progress) 135 ppc_md.progress("id mach(): done", 0x200); 136} 137 138#ifdef CONFIG_BOOKE_WDT 139/* Checks wdt=x and wdt_period=xx command-line option */ 140int __init early_parse_wdt(char *p) 141{ 142 if (p && strncmp(p, "0", 1) != 0) 143 booke_wdt_enabled = 1; 144 145 return 0; 146} 147early_param("wdt", early_parse_wdt); 148 149int __init early_parse_wdt_period (char *p) 150{ 151 if (p) 152 booke_wdt_period = simple_strtoul(p, NULL, 0); 153 154 return 0; 155} 156early_param("wdt_period", early_parse_wdt_period); 157#endif /* CONFIG_BOOKE_WDT */ 158 159int __init ppc_setup_l2cr(char *str) 160{ 161 if (cpu_has_feature(CPU_FTR_L2CR)) { 162 unsigned long val = simple_strtoul(str, NULL, 0); 163 printk(KERN_INFO "l2cr set to %lx\n", val); 164 _set_L2CR(0); /* force invalidate by disable cache */ 165 _set_L2CR(val); /* and enable it */ 166 } 167 return 1; 168} 169__setup("l2cr=", ppc_setup_l2cr); 170 171#ifdef CONFIG_GENERIC_NVRAM 172 173/* Generic nvram hooks used by drivers/char/gen_nvram.c */ 174unsigned char nvram_read_byte(int addr) 175{ 176 if (ppc_md.nvram_read_val) 177 return ppc_md.nvram_read_val(addr); 178 return 0xff; 179} 180EXPORT_SYMBOL(nvram_read_byte); 181 182void nvram_write_byte(unsigned char val, int addr) 183{ 184 if (ppc_md.nvram_write_val) 185 ppc_md.nvram_write_val(addr, val); 186} 187EXPORT_SYMBOL(nvram_write_byte); 188 189void nvram_sync(void) 190{ 191 if (ppc_md.nvram_sync) 192 ppc_md.nvram_sync(); 193} 194EXPORT_SYMBOL(nvram_sync); 195 196#endif /* CONFIG_NVRAM */ 197 198static DEFINE_PER_CPU(struct cpu, cpu_devices); 199 200int __init ppc_init(void) 201{ 202 int cpu; 203 204 /* clear the progress line */ 205 if (ppc_md.progress) 206 ppc_md.progress(" ", 0xffff); 207 208 /* register CPU devices */ 209 for_each_possible_cpu(cpu) { 210 struct cpu *c = &per_cpu(cpu_devices, cpu); 211 c->hotpluggable = 1; 212 register_cpu(c, cpu); 213 } 214 215 /* call platform init */ 216 if (ppc_md.init != NULL) { 217 ppc_md.init(); 218 } 219 return 0; 220} 221 222arch_initcall(ppc_init); 223 224/* Warning, IO base is not yet inited */ 225void __init setup_arch(char **cmdline_p) 226{ 227 *cmdline_p = cmd_line; 228 229 /* so udelay does something sensible, assume <= 1000 bogomips */ 230 loops_per_jiffy = 500000000 / HZ; 231 232 unflatten_device_tree(); 233 check_for_initrd(); 234 235 if (ppc_md.init_early) 236 ppc_md.init_early(); 237 238 find_legacy_serial_ports(); 239 240 smp_setup_cpu_maps(); 241 242 /* Register early console */ 243 register_early_udbg_console(); 244 245 xmon_setup(); 246 247#if defined(CONFIG_KGDB) 248 if (ppc_md.kgdb_map_scc) 249 ppc_md.kgdb_map_scc(); 250 set_debug_traps(); 251 if (strstr(cmd_line, "gdb")) { 252 if (ppc_md.progress) 253 ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000); 254 printk("kgdb breakpoint activated\n"); 255 breakpoint(); 256 } 257#endif 258 259 /* 260 * Set cache line size based on type of cpu as a default. 261 * Systems with OF can look in the properties on the cpu node(s) 262 * for a possibly more accurate value. 263 */ 264 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) { 265 dcache_bsize = cur_cpu_spec->dcache_bsize; 266 icache_bsize = cur_cpu_spec->icache_bsize; 267 ucache_bsize = 0; 268 } else 269 ucache_bsize = dcache_bsize = icache_bsize 270 = cur_cpu_spec->dcache_bsize; 271 272 /* reboot on panic */ 273 panic_timeout = 180; 274 275 if (ppc_md.panic) 276 setup_panic(); 277 278 init_mm.start_code = PAGE_OFFSET; 279 init_mm.end_code = (unsigned long) _etext; 280 init_mm.end_data = (unsigned long) _edata; 281 init_mm.brk = klimit; 282 283 /* set up the bootmem stuff with available memory */ 284 do_init_bootmem(); 285 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab); 286 287#ifdef CONFIG_DUMMY_CONSOLE 288 conswitchp = &dummy_con; 289#endif 290 291 ppc_md.setup_arch(); 292 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); 293 294 paging_init(); 295} 296