1/* 2 * linux/arch/mips/tx4927/common/tx4927_prom.c 3 * 4 * common tx4927 memory interface 5 * 6 * Author: MontaVista Software, Inc. 7 * source@mvista.com 8 * 9 * Copyright 2001-2002 MontaVista Software Inc. 10 * 11 * This program is free software; you can redistribute it and/or modify it 12 * under the terms of the GNU General Public License as published by the 13 * Free Software Foundation; either version 2 of the License, or (at your 14 * option) any later version. 15 * 16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 24 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 25 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 * You should have received a copy of the GNU General Public License along 28 * with this program; if not, write to the Free Software Foundation, Inc., 29 * 675 Mass Ave, Cambridge, MA 02139, USA. 30 */ 31 32#include <linux/init.h> 33#include <linux/mm.h> 34#include <linux/sched.h> 35#include <linux/bootmem.h> 36 37#include <asm/addrspace.h> 38#include <asm/bootinfo.h> 39#include <asm/tx4927/tx4927.h> 40 41static unsigned int __init tx4927_process_sdccr(u64 * addr) 42{ 43 u64 val; 44 unsigned int sdccr_ce; 45 unsigned int sdccr_bs; 46 unsigned int sdccr_rs; 47 unsigned int sdccr_cs; 48 unsigned int sdccr_mw; 49 unsigned int bs = 0; 50 unsigned int rs = 0; 51 unsigned int cs = 0; 52 unsigned int mw = 0; 53 unsigned int msize = 0; 54 55 val = (*((vu64 *) (addr))); 56 57 /* MVMCP -- need #defs for these bits masks */ 58 sdccr_ce = ((val & (1 << 10)) >> 10); 59 sdccr_bs = ((val & (1 << 8)) >> 8); 60 sdccr_rs = ((val & (3 << 5)) >> 5); 61 sdccr_cs = ((val & (3 << 2)) >> 2); 62 sdccr_mw = ((val & (1 << 0)) >> 0); 63 64 if (sdccr_ce) { 65 switch (sdccr_bs) { 66 case 0:{ 67 bs = 2; 68 break; 69 } 70 case 1:{ 71 bs = 4; 72 break; 73 } 74 } 75 switch (sdccr_rs) { 76 case 0:{ 77 rs = 2048; 78 break; 79 } 80 case 1:{ 81 rs = 4096; 82 break; 83 } 84 case 2:{ 85 rs = 8192; 86 break; 87 } 88 case 3:{ 89 rs = 0; 90 break; 91 } 92 } 93 switch (sdccr_cs) { 94 case 0:{ 95 cs = 256; 96 break; 97 } 98 case 1:{ 99 cs = 512; 100 break; 101 } 102 case 2:{ 103 cs = 1024; 104 break; 105 } 106 case 3:{ 107 cs = 2048; 108 break; 109 } 110 } 111 switch (sdccr_mw) { 112 case 0:{ 113 mw = 8; 114 break; 115 } /* 8 bytes = 64 bits */ 116 case 1:{ 117 mw = 4; 118 break; 119 } /* 4 bytes = 32 bits */ 120 } 121 } 122 123 /* bytes per chip MB per chip num chips */ 124 msize = (((rs * cs * mw) / (1024 * 1024)) * bs); 125 126 return (msize); 127} 128 129 130unsigned int __init tx4927_get_mem_size(void) 131{ 132 unsigned int c0; 133 unsigned int c1; 134 unsigned int c2; 135 unsigned int c3; 136 unsigned int total; 137 138 /* MVMCP -- need #defs for these registers */ 139 c0 = tx4927_process_sdccr((u64 *) 0xff1f8000); 140 c1 = tx4927_process_sdccr((u64 *) 0xff1f8008); 141 c2 = tx4927_process_sdccr((u64 *) 0xff1f8010); 142 c3 = tx4927_process_sdccr((u64 *) 0xff1f8018); 143 total = c0 + c1 + c2 + c3; 144 145 return (total); 146} 147