1/*
2 *  Copyright (C) 2004 by Basler Vision Technologies AG
3 *  Author: Thomas Koeller <thomas.koeller@baslerweb.com>
4 *
5 *  This program is free software; you can redistribute it and/or modify
6 *  it under the terms of the GNU General Public License as published by
7 *  the Free Software Foundation; either version 2 of the License, or
8 *  (at your option) any later version.
9 *
10 *  This program is distributed in the hope that it will be useful,
11 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
12 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 *  GNU General Public License for more details.
14 *
15 *  You should have received a copy of the GNU General Public License
16 *  along with this program; if not, write to the Free Software
17 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
18 */
19
20#include <linux/linkage.h>
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <asm/gdb-stub.h>
24#include <asm/rm9k-ocd.h>
25#include <excite.h>
26
27#if defined(CONFIG_SERIAL_8250) && CONFIG_SERIAL_8250_NR_UARTS > 1
28#error Debug port used by serial driver
29#endif
30
31#define UART_CLK		25000000
32#define BASE_BAUD		(UART_CLK / 16)
33#define REGISTER_BASE_0		0x0208UL
34#define REGISTER_BASE_1		0x0238UL
35
36#define REGISTER_BASE_DBG	REGISTER_BASE_1
37
38#define CPRR	0x0004
39#define UACFG	0x0200
40#define UAINTS	0x0204
41#define UARBR	(REGISTER_BASE_DBG + 0x0000)
42#define UATHR	(REGISTER_BASE_DBG + 0x0004)
43#define UADLL	(REGISTER_BASE_DBG + 0x0008)
44#define UAIER	(REGISTER_BASE_DBG + 0x000c)
45#define UADLH	(REGISTER_BASE_DBG + 0x0010)
46#define UAIIR	(REGISTER_BASE_DBG + 0x0014)
47#define UAFCR	(REGISTER_BASE_DBG + 0x0018)
48#define UALCR	(REGISTER_BASE_DBG + 0x001c)
49#define UAMCR	(REGISTER_BASE_DBG + 0x0020)
50#define UALSR	(REGISTER_BASE_DBG + 0x0024)
51#define UAMSR	(REGISTER_BASE_DBG + 0x0028)
52#define UASCR	(REGISTER_BASE_DBG + 0x002c)
53
54#define	PARITY_NONE	0
55#define	PARITY_ODD	0x08
56#define	PARITY_EVEN	0x18
57#define	PARITY_MARK	0x28
58#define	PARITY_SPACE	0x38
59
60#define	DATA_5BIT	0x0
61#define	DATA_6BIT	0x1
62#define	DATA_7BIT	0x2
63#define	DATA_8BIT	0x3
64
65#define	STOP_1BIT	0x0
66#define	STOP_2BIT	0x4
67
68#define BAUD_DBG	57600
69#define	PARITY_DBG	PARITY_NONE
70#define	DATA_DBG	DATA_8BIT
71#define	STOP_DBG	STOP_1BIT
72
73/* Initialize the serial port for KGDB debugging */
74void __init excite_kgdb_init(void)
75{
76	const u32 divisor = BASE_BAUD / BAUD_DBG;
77
78	/* Take the UART out of reset */
79	titan_writel(0x00ff1cff, CPRR);
80	titan_writel(0x00000000, UACFG);
81	titan_writel(0x00000002, UACFG);
82
83	titan_writel(0x0, UALCR);
84	titan_writel(0x0, UAIER);
85
86	/* Disable FIFOs */
87	titan_writel(0x00, UAFCR);
88
89	titan_writel(0x80, UALCR);
90	titan_writel(divisor & 0xff, UADLL);
91	titan_writel((divisor & 0xff00) >> 8, UADLH);
92	titan_writel(0x0, UALCR);
93
94	titan_writel(DATA_DBG | PARITY_DBG | STOP_DBG, UALCR);
95
96	/* Enable receiver interrupt */
97	titan_readl(UARBR);
98	titan_writel(0x1, UAIER);
99}
100
101int getDebugChar(void)
102{
103	while (!(titan_readl(UALSR) & 0x1));
104	return titan_readl(UARBR);
105}
106
107int putDebugChar(int data)
108{
109	while (!(titan_readl(UALSR) & 0x20));
110	titan_writel(data, UATHR);
111	return 1;
112}
113
114/* KGDB interrupt handler */
115asmlinkage void excite_kgdb_inthdl(void)
116{
117	if (unlikely(
118		((titan_readl(UAIIR) & 0x7) == 4)
119		&& ((titan_readl(UARBR) & 0xff) == 0x3)))
120			set_async_breakpoint(&regs->cp0_epc);
121}
122