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  • only in /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/m68knommu/platform/68360/
1/*
2 *  linux/arch/m68knommu/platform/68360/config.c
3 *
4 *  Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
5 *  Copyright (C) 1993 Hamish Macdonald
6 *  Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License.  See the file COPYING in the main directory of this archive
10 * for more details.
11 */
12
13#include <stdarg.h>
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/tty.h>
18#include <linux/console.h>
19#include <linux/interrupt.h>
20
21#include <asm/setup.h>
22#include <asm/system.h>
23#include <asm/pgtable.h>
24#include <asm/irq.h>
25#include <asm/machdep.h>
26#include <asm/m68360.h>
27
28#ifdef CONFIG_UCQUICC
29#include <asm/bootstd.h>
30#endif
31
32extern void m360_cpm_reset(void);
33
34// Mask to select if the PLL prescaler is enabled.
35#define MCU_PREEN   ((unsigned short)(0x0001 << 13))
36
37#if defined(CONFIG_UCQUICC)
38#define OSCILLATOR  (unsigned long int)33000000
39#endif
40
41unsigned long int system_clock;
42
43void M68360_init_IRQ(void);
44
45extern QUICC *pquicc;
46
47/* TODO  DON"T Hard Code this */
48/* calculate properly using the right PLL and prescaller */
49// unsigned int system_clock = 33000000l;
50extern unsigned long int system_clock; //In kernel setup.c
51
52extern void config_M68360_irq(void);
53
54void BSP_sched_init(irq_handler_t timer_routine)
55{
56  unsigned char prescaler;
57  unsigned short tgcr_save;
58  int return_value;
59
60
61  /* General purpose quicc timers: MC68360UM p7-20 */
62
63  /* Set up timer 1 (in [1..4]) to do 100Hz */
64  tgcr_save = pquicc->timer_tgcr & 0xfff0;
65  pquicc->timer_tgcr  = tgcr_save; /* stop and reset timer 1 */
66  /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */
67
68  prescaler = 8;
69  pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */
70                           (unsigned short)((prescaler - 1) << 8);
71
72  pquicc->timer_tcn1 = 0x0000; /* initial count */
73  /* calculate interval for 100Hz based on the _system_clock: */
74  pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */
75
76  pquicc->timer_ter1 = 0x0003; /* clear timer events */
77
78  /* enable timer 1 interrupt in CIMR */
79//  request_irq(IRQ_MACHSPEC | CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
80  //return_value = request_irq( CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
81  return_value = request_irq(CPMVEC_TIMER1 , timer_routine, IRQ_FLG_LOCK,
82          "Timer", NULL);
83
84  /* Start timer 1: */
85  tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001;
86  pquicc->timer_tgcr  = tgcr_save;
87}
88
89
90void BSP_tick(void)
91{
92  /* Reset Timer1 */
93  /* TSTAT &= 0; */
94
95  pquicc->timer_ter1 = 0x0002; /* clear timer event */
96}
97
98unsigned long BSP_gettimeoffset (void)
99{
100  return 0;
101}
102
103void BSP_gettod (int *yearp, int *monp, int *dayp,
104		   int *hourp, int *minp, int *secp)
105{
106}
107
108int BSP_hwclk(int op, struct rtc_time *t)
109{
110  if (!op) {
111    /* read */
112  } else {
113    /* write */
114  }
115  return 0;
116}
117
118int BSP_set_clock_mmss (unsigned long nowtime)
119{
120  return 0;
121}
122
123void BSP_reset (void)
124{
125  local_irq_disable();
126  asm volatile (
127    "moveal #_start, %a0;\n"
128    "moveb #0, 0xFFFFF300;\n"
129    "moveal 0(%a0), %sp;\n"
130    "moveal 4(%a0), %a0;\n"
131    "jmp (%a0);\n"
132    );
133}
134
135unsigned char *scc1_hwaddr;
136static int errno;
137
138#if defined(CONFIG_UCQUICC)
139_bsc0(char *, getserialnum)
140_bsc1(unsigned char *, gethwaddr, int, a)
141_bsc1(char *, getbenv, char *, a)
142#endif
143
144
145void config_BSP(char *command, int len)
146{
147  unsigned char *p;
148
149  m360_cpm_reset();
150
151  /* Calculate the real system clock value. */
152  {
153     unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr);
154     if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128
155     {
156         int mf = (int)(pquicc->sim_pllcr & 0x0fff);
157         system_clock = (OSCILLATOR / 128) * (mf + 1);
158     }
159     else
160     {
161         int mf = (int)(pquicc->sim_pllcr & 0x0fff);
162         system_clock = (OSCILLATOR) * (mf + 1);
163     }
164  }
165
166  printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n");
167
168  scc1_hwaddr = "\00\01\02\03\04\05";
169
170  mach_sched_init      = BSP_sched_init;
171  mach_tick            = BSP_tick;
172  mach_gettimeoffset   = BSP_gettimeoffset;
173  mach_gettod          = BSP_gettod;
174  mach_hwclk           = NULL;
175  mach_set_clock_mmss  = NULL;
176  mach_reset           = BSP_reset;
177}
178