1/* 2 * (c) 2003-2006 Advanced Micro Devices, Inc. 3 * Your use of this code is subject to the terms and conditions of the 4 * GNU general public license version 2. See "COPYING" or 5 * http://www.gnu.org/licenses/gpl.html 6 * 7 * Support : mark.langsdorf@amd.com 8 * 9 * Based on the powernow-k7.c module written by Dave Jones. 10 * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs 11 * (C) 2004 Dominik Brodowski <linux@brodo.de> 12 * (C) 2004 Pavel Machek <pavel@suse.cz> 13 * Licensed under the terms of the GNU GPL License version 2. 14 * Based upon datasheets & sample CPUs kindly provided by AMD. 15 * 16 * Valuable input gratefully received from Dave Jones, Pavel Machek, 17 * Dominik Brodowski, Jacob Shin, and others. 18 * Originally developed by Paul Devriendt. 19 * Processor information obtained from Chapter 9 (Power and Thermal Management) 20 * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD 21 * Opteron Processors" available for download from www.amd.com 22 * 23 * Tables for specific CPUs can be inferred from 24 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf 25 */ 26 27#include <linux/kernel.h> 28#include <linux/smp.h> 29#include <linux/module.h> 30#include <linux/init.h> 31#include <linux/cpufreq.h> 32#include <linux/slab.h> 33#include <linux/string.h> 34#include <linux/cpumask.h> 35#include <linux/sched.h> /* for current / set_cpus_allowed() */ 36 37#include <asm/msr.h> 38#include <asm/io.h> 39#include <asm/delay.h> 40 41#ifdef CONFIG_X86_POWERNOW_K8_ACPI 42#include <linux/acpi.h> 43#include <linux/mutex.h> 44#include <acpi/processor.h> 45#endif 46 47#define PFX "powernow-k8: " 48#define BFX PFX "BIOS error: " 49#define VERSION "version 2.00.00" 50#include "powernow-k8.h" 51 52/* serialize freq changes */ 53static DEFINE_MUTEX(fidvid_mutex); 54 55static struct powernow_k8_data *powernow_data[NR_CPUS]; 56 57static int cpu_family = CPU_OPTERON; 58 59#ifndef CONFIG_SMP 60static cpumask_t cpu_core_map[1]; 61#endif 62 63/* Return a frequency in MHz, given an input fid */ 64static u32 find_freq_from_fid(u32 fid) 65{ 66 return 800 + (fid * 100); 67} 68 69 70/* Return a frequency in KHz, given an input fid */ 71static u32 find_khz_freq_from_fid(u32 fid) 72{ 73 return 1000 * find_freq_from_fid(fid); 74} 75 76/* Return a frequency in MHz, given an input fid and did */ 77static u32 find_freq_from_fiddid(u32 fid, u32 did) 78{ 79 return 100 * (fid + 0x10) >> did; 80} 81 82static u32 find_khz_freq_from_fiddid(u32 fid, u32 did) 83{ 84 return 1000 * find_freq_from_fiddid(fid, did); 85} 86 87static u32 find_fid_from_pstate(u32 pstate) 88{ 89 u32 hi, lo; 90 rdmsr(MSR_PSTATE_DEF_BASE + pstate, lo, hi); 91 return lo & HW_PSTATE_FID_MASK; 92} 93 94static u32 find_did_from_pstate(u32 pstate) 95{ 96 u32 hi, lo; 97 rdmsr(MSR_PSTATE_DEF_BASE + pstate, lo, hi); 98 return (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT; 99} 100 101/* Return the vco fid for an input fid 102 * 103 * Each "low" fid has corresponding "high" fid, and you can get to "low" fids 104 * only from corresponding high fids. This returns "high" fid corresponding to 105 * "low" one. 106 */ 107static u32 convert_fid_to_vco_fid(u32 fid) 108{ 109 if (fid < HI_FID_TABLE_BOTTOM) 110 return 8 + (2 * fid); 111 else 112 return fid; 113} 114 115/* 116 * Return 1 if the pending bit is set. Unless we just instructed the processor 117 * to transition to a new state, seeing this bit set is really bad news. 118 */ 119static int pending_bit_stuck(void) 120{ 121 u32 lo, hi; 122 123 if (cpu_family == CPU_HW_PSTATE) 124 return 0; 125 126 rdmsr(MSR_FIDVID_STATUS, lo, hi); 127 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; 128} 129 130/* 131 * Update the global current fid / vid values from the status msr. 132 * Returns 1 on error. 133 */ 134static int query_current_values_with_pending_wait(struct powernow_k8_data *data) 135{ 136 u32 lo, hi; 137 u32 i = 0; 138 139 if (cpu_family == CPU_HW_PSTATE) { 140 rdmsr(MSR_PSTATE_STATUS, lo, hi); 141 i = lo & HW_PSTATE_MASK; 142 rdmsr(MSR_PSTATE_DEF_BASE + i, lo, hi); 143 data->currfid = lo & HW_PSTATE_FID_MASK; 144 data->currdid = (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT; 145 return 0; 146 } 147 do { 148 if (i++ > 10000) { 149 dprintk("detected change pending stuck\n"); 150 return 1; 151 } 152 rdmsr(MSR_FIDVID_STATUS, lo, hi); 153 } while (lo & MSR_S_LO_CHANGE_PENDING); 154 155 data->currvid = hi & MSR_S_HI_CURRENT_VID; 156 data->currfid = lo & MSR_S_LO_CURRENT_FID; 157 158 return 0; 159} 160 161/* the isochronous relief time */ 162static void count_off_irt(struct powernow_k8_data *data) 163{ 164 udelay((1 << data->irt) * 10); 165 return; 166} 167 168/* the voltage stabalization time */ 169static void count_off_vst(struct powernow_k8_data *data) 170{ 171 udelay(data->vstable * VST_UNITS_20US); 172 return; 173} 174 175/* need to init the control msr to a safe value (for each cpu) */ 176static void fidvid_msr_init(void) 177{ 178 u32 lo, hi; 179 u8 fid, vid; 180 181 rdmsr(MSR_FIDVID_STATUS, lo, hi); 182 vid = hi & MSR_S_HI_CURRENT_VID; 183 fid = lo & MSR_S_LO_CURRENT_FID; 184 lo = fid | (vid << MSR_C_LO_VID_SHIFT); 185 hi = MSR_C_HI_STP_GNT_BENIGN; 186 dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); 187 wrmsr(MSR_FIDVID_CTL, lo, hi); 188} 189 190 191/* write the new fid value along with the other control fields to the msr */ 192static int write_new_fid(struct powernow_k8_data *data, u32 fid) 193{ 194 u32 lo; 195 u32 savevid = data->currvid; 196 u32 i = 0; 197 198 if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { 199 printk(KERN_ERR PFX "internal error - overflow on fid write\n"); 200 return 1; 201 } 202 203 lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID; 204 205 dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n", 206 fid, lo, data->plllock * PLL_LOCK_CONVERSION); 207 208 do { 209 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); 210 if (i++ > 100) { 211 printk(KERN_ERR PFX "Hardware error - pending bit very stuck - no further pstate changes possible\n"); 212 return 1; 213 } 214 } while (query_current_values_with_pending_wait(data)); 215 216 count_off_irt(data); 217 218 if (savevid != data->currvid) { 219 printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n", 220 savevid, data->currvid); 221 return 1; 222 } 223 224 if (fid != data->currfid) { 225 printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid, 226 data->currfid); 227 return 1; 228 } 229 230 return 0; 231} 232 233/* Write a new vid to the hardware */ 234static int write_new_vid(struct powernow_k8_data *data, u32 vid) 235{ 236 u32 lo; 237 u32 savefid = data->currfid; 238 int i = 0; 239 240 if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { 241 printk(KERN_ERR PFX "internal error - overflow on vid write\n"); 242 return 1; 243 } 244 245 lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID; 246 247 dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n", 248 vid, lo, STOP_GRANT_5NS); 249 250 do { 251 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); 252 if (i++ > 100) { 253 printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n"); 254 return 1; 255 } 256 } while (query_current_values_with_pending_wait(data)); 257 258 if (savefid != data->currfid) { 259 printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n", 260 savefid, data->currfid); 261 return 1; 262 } 263 264 if (vid != data->currvid) { 265 printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid, 266 data->currvid); 267 return 1; 268 } 269 270 return 0; 271} 272 273/* 274 * Reduce the vid by the max of step or reqvid. 275 * Decreasing vid codes represent increasing voltages: 276 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. 277 */ 278static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step) 279{ 280 if ((data->currvid - reqvid) > step) 281 reqvid = data->currvid - step; 282 283 if (write_new_vid(data, reqvid)) 284 return 1; 285 286 count_off_vst(data); 287 288 return 0; 289} 290 291/* Change hardware pstate by single MSR write */ 292static int transition_pstate(struct powernow_k8_data *data, u32 pstate) 293{ 294 wrmsr(MSR_PSTATE_CTRL, pstate, 0); 295 data->currfid = find_fid_from_pstate(pstate); 296 return 0; 297} 298 299/* Change Opteron/Athlon64 fid and vid, by the 3 phases. */ 300static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid) 301{ 302 if (core_voltage_pre_transition(data, reqvid)) 303 return 1; 304 305 if (core_frequency_transition(data, reqfid)) 306 return 1; 307 308 if (core_voltage_post_transition(data, reqvid)) 309 return 1; 310 311 if (query_current_values_with_pending_wait(data)) 312 return 1; 313 314 if ((reqfid != data->currfid) || (reqvid != data->currvid)) { 315 printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n", 316 smp_processor_id(), 317 reqfid, reqvid, data->currfid, data->currvid); 318 return 1; 319 } 320 321 dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", 322 smp_processor_id(), data->currfid, data->currvid); 323 324 return 0; 325} 326 327/* Phase 1 - core voltage transition ... setup voltage */ 328static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid) 329{ 330 u32 rvosteps = data->rvo; 331 u32 savefid = data->currfid; 332 u32 maxvid, lo; 333 334 dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n", 335 smp_processor_id(), 336 data->currfid, data->currvid, reqvid, data->rvo); 337 338 rdmsr(MSR_FIDVID_STATUS, lo, maxvid); 339 maxvid = 0x1f & (maxvid >> 16); 340 dprintk("ph1 maxvid=0x%x\n", maxvid); 341 if (reqvid < maxvid) /* lower numbers are higher voltages */ 342 reqvid = maxvid; 343 344 while (data->currvid > reqvid) { 345 dprintk("ph1: curr 0x%x, req vid 0x%x\n", 346 data->currvid, reqvid); 347 if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) 348 return 1; 349 } 350 351 while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) { 352 if (data->currvid == maxvid) { 353 rvosteps = 0; 354 } else { 355 dprintk("ph1: changing vid for rvo, req 0x%x\n", 356 data->currvid - 1); 357 if (decrease_vid_code_by_step(data, data->currvid - 1, 1)) 358 return 1; 359 rvosteps--; 360 } 361 } 362 363 if (query_current_values_with_pending_wait(data)) 364 return 1; 365 366 if (savefid != data->currfid) { 367 printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid); 368 return 1; 369 } 370 371 dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n", 372 data->currfid, data->currvid); 373 374 return 0; 375} 376 377/* Phase 2 - core frequency transition */ 378static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) 379{ 380 u32 vcoreqfid, vcocurrfid, vcofiddiff, fid_interval, savevid = data->currvid; 381 382 if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) { 383 printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n", 384 reqfid, data->currfid); 385 return 1; 386 } 387 388 if (data->currfid == reqfid) { 389 printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid); 390 return 0; 391 } 392 393 dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n", 394 smp_processor_id(), 395 data->currfid, data->currvid, reqfid); 396 397 vcoreqfid = convert_fid_to_vco_fid(reqfid); 398 vcocurrfid = convert_fid_to_vco_fid(data->currfid); 399 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid 400 : vcoreqfid - vcocurrfid; 401 402 while (vcofiddiff > 2) { 403 (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); 404 405 if (reqfid > data->currfid) { 406 if (data->currfid > LO_FID_TABLE_TOP) { 407 if (write_new_fid(data, data->currfid + fid_interval)) { 408 return 1; 409 } 410 } else { 411 if (write_new_fid 412 (data, 2 + convert_fid_to_vco_fid(data->currfid))) { 413 return 1; 414 } 415 } 416 } else { 417 if (write_new_fid(data, data->currfid - fid_interval)) 418 return 1; 419 } 420 421 vcocurrfid = convert_fid_to_vco_fid(data->currfid); 422 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid 423 : vcoreqfid - vcocurrfid; 424 } 425 426 if (write_new_fid(data, reqfid)) 427 return 1; 428 429 if (query_current_values_with_pending_wait(data)) 430 return 1; 431 432 if (data->currfid != reqfid) { 433 printk(KERN_ERR PFX 434 "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n", 435 data->currfid, reqfid); 436 return 1; 437 } 438 439 if (savevid != data->currvid) { 440 printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n", 441 savevid, data->currvid); 442 return 1; 443 } 444 445 dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n", 446 data->currfid, data->currvid); 447 448 return 0; 449} 450 451/* Phase 3 - core voltage transition flow ... jump to the final vid. */ 452static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid) 453{ 454 u32 savefid = data->currfid; 455 u32 savereqvid = reqvid; 456 457 dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", 458 smp_processor_id(), 459 data->currfid, data->currvid); 460 461 if (reqvid != data->currvid) { 462 if (write_new_vid(data, reqvid)) 463 return 1; 464 465 if (savefid != data->currfid) { 466 printk(KERN_ERR PFX 467 "ph3: bad fid change, save 0x%x, curr 0x%x\n", 468 savefid, data->currfid); 469 return 1; 470 } 471 472 if (data->currvid != reqvid) { 473 printk(KERN_ERR PFX 474 "ph3: failed vid transition\n, req 0x%x, curr 0x%x", 475 reqvid, data->currvid); 476 return 1; 477 } 478 } 479 480 if (query_current_values_with_pending_wait(data)) 481 return 1; 482 483 if (savereqvid != data->currvid) { 484 dprintk("ph3 failed, currvid 0x%x\n", data->currvid); 485 return 1; 486 } 487 488 if (savefid != data->currfid) { 489 dprintk("ph3 failed, currfid changed 0x%x\n", 490 data->currfid); 491 return 1; 492 } 493 494 dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n", 495 data->currfid, data->currvid); 496 497 return 0; 498} 499 500static int check_supported_cpu(unsigned int cpu) 501{ 502 cpumask_t oldmask = CPU_MASK_ALL; 503 u32 eax, ebx, ecx, edx; 504 unsigned int rc = 0; 505 506 oldmask = current->cpus_allowed; 507 set_cpus_allowed(current, cpumask_of_cpu(cpu)); 508 509 if (smp_processor_id() != cpu) { 510 printk(KERN_ERR PFX "limiting to cpu %u failed\n", cpu); 511 goto out; 512 } 513 514 if (current_cpu_data.x86_vendor != X86_VENDOR_AMD) 515 goto out; 516 517 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); 518 if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) && 519 ((eax & CPUID_XFAM) < CPUID_XFAM_10H)) 520 goto out; 521 522 if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) { 523 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || 524 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) { 525 printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax); 526 goto out; 527 } 528 529 eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); 530 if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { 531 printk(KERN_INFO PFX 532 "No frequency change capabilities detected\n"); 533 goto out; 534 } 535 536 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); 537 if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) { 538 printk(KERN_INFO PFX "Power state transitions not supported\n"); 539 goto out; 540 } 541 } else { /* must be a HW Pstate capable processor */ 542 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); 543 if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE) 544 cpu_family = CPU_HW_PSTATE; 545 else 546 goto out; 547 } 548 549 rc = 1; 550 551out: 552 set_cpus_allowed(current, oldmask); 553 return rc; 554} 555 556static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid) 557{ 558 unsigned int j; 559 u8 lastfid = 0xff; 560 561 for (j = 0; j < data->numps; j++) { 562 if (pst[j].vid > LEAST_VID) { 563 printk(KERN_ERR PFX "vid %d invalid : 0x%x\n", j, pst[j].vid); 564 return -EINVAL; 565 } 566 if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */ 567 printk(KERN_ERR BFX "0 vid exceeded with pstate %d\n", j); 568 return -ENODEV; 569 } 570 if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */ 571 printk(KERN_ERR BFX "maxvid exceeded with pstate %d\n", j); 572 return -ENODEV; 573 } 574 if (pst[j].fid > MAX_FID) { 575 printk(KERN_ERR BFX "maxfid exceeded with pstate %d\n", j); 576 return -ENODEV; 577 } 578 if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { 579 /* Only first fid is allowed to be in "low" range */ 580 printk(KERN_ERR BFX "two low fids - %d : 0x%x\n", j, pst[j].fid); 581 return -EINVAL; 582 } 583 if (pst[j].fid < lastfid) 584 lastfid = pst[j].fid; 585 } 586 if (lastfid & 1) { 587 printk(KERN_ERR BFX "lastfid invalid\n"); 588 return -EINVAL; 589 } 590 if (lastfid > LO_FID_TABLE_TOP) 591 printk(KERN_INFO BFX "first fid not from lo freq table\n"); 592 593 return 0; 594} 595 596static void print_basics(struct powernow_k8_data *data) 597{ 598 int j; 599 for (j = 0; j < data->numps; j++) { 600 if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID) { 601 if (cpu_family == CPU_HW_PSTATE) { 602 printk(KERN_INFO PFX " %d : fid 0x%x gid 0x%x (%d MHz)\n", j, (data->powernow_table[j].index & 0xff00) >> 8, 603 (data->powernow_table[j].index & 0xff0000) >> 16, 604 data->powernow_table[j].frequency/1000); 605 } else { 606 printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x\n", j, 607 data->powernow_table[j].index & 0xff, 608 data->powernow_table[j].frequency/1000, 609 data->powernow_table[j].index >> 8); 610 } 611 } 612 } 613 if (data->batps) 614 printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps); 615} 616 617static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid) 618{ 619 struct cpufreq_frequency_table *powernow_table; 620 unsigned int j; 621 622 if (data->batps) { /* use ACPI support to get full speed on mains power */ 623 printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps); 624 data->numps = data->batps; 625 } 626 627 for ( j=1; j<data->numps; j++ ) { 628 if (pst[j-1].fid >= pst[j].fid) { 629 printk(KERN_ERR PFX "PST out of sequence\n"); 630 return -EINVAL; 631 } 632 } 633 634 if (data->numps < 2) { 635 printk(KERN_ERR PFX "no p states to transition\n"); 636 return -ENODEV; 637 } 638 639 if (check_pst_table(data, pst, maxvid)) 640 return -EINVAL; 641 642 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) 643 * (data->numps + 1)), GFP_KERNEL); 644 if (!powernow_table) { 645 printk(KERN_ERR PFX "powernow_table memory alloc failure\n"); 646 return -ENOMEM; 647 } 648 649 for (j = 0; j < data->numps; j++) { 650 powernow_table[j].index = pst[j].fid; /* lower 8 bits */ 651 powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */ 652 powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid); 653 } 654 powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; 655 powernow_table[data->numps].index = 0; 656 657 if (query_current_values_with_pending_wait(data)) { 658 kfree(powernow_table); 659 return -EIO; 660 } 661 662 dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid); 663 data->powernow_table = powernow_table; 664 if (first_cpu(cpu_core_map[data->cpu]) == data->cpu) 665 print_basics(data); 666 667 for (j = 0; j < data->numps; j++) 668 if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid)) 669 return 0; 670 671 dprintk("currfid/vid do not match PST, ignoring\n"); 672 return 0; 673} 674 675/* Find and validate the PSB/PST table in BIOS. */ 676static int find_psb_table(struct powernow_k8_data *data) 677{ 678 struct psb_s *psb; 679 unsigned int i; 680 u32 mvs; 681 u8 maxvid; 682 u32 cpst = 0; 683 u32 thiscpuid; 684 685 for (i = 0xc0000; i < 0xffff0; i += 0x10) { 686 /* Scan BIOS looking for the signature. */ 687 /* It can not be at ffff0 - it is too big. */ 688 689 psb = phys_to_virt(i); 690 if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) 691 continue; 692 693 dprintk("found PSB header at 0x%p\n", psb); 694 695 dprintk("table vers: 0x%x\n", psb->tableversion); 696 if (psb->tableversion != PSB_VERSION_1_4) { 697 printk(KERN_ERR BFX "PSB table is not v1.4\n"); 698 return -ENODEV; 699 } 700 701 dprintk("flags: 0x%x\n", psb->flags1); 702 if (psb->flags1) { 703 printk(KERN_ERR BFX "unknown flags\n"); 704 return -ENODEV; 705 } 706 707 data->vstable = psb->vstable; 708 dprintk("voltage stabilization time: %d(*20us)\n", data->vstable); 709 710 dprintk("flags2: 0x%x\n", psb->flags2); 711 data->rvo = psb->flags2 & 3; 712 data->irt = ((psb->flags2) >> 2) & 3; 713 mvs = ((psb->flags2) >> 4) & 3; 714 data->vidmvs = 1 << mvs; 715 data->batps = ((psb->flags2) >> 6) & 3; 716 717 dprintk("ramp voltage offset: %d\n", data->rvo); 718 dprintk("isochronous relief time: %d\n", data->irt); 719 dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs); 720 721 dprintk("numpst: 0x%x\n", psb->num_tables); 722 cpst = psb->num_tables; 723 if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){ 724 thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); 725 if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) { 726 cpst = 1; 727 } 728 } 729 if (cpst != 1) { 730 printk(KERN_ERR BFX "numpst must be 1\n"); 731 return -ENODEV; 732 } 733 734 data->plllock = psb->plllocktime; 735 dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime); 736 dprintk("maxfid: 0x%x\n", psb->maxfid); 737 dprintk("maxvid: 0x%x\n", psb->maxvid); 738 maxvid = psb->maxvid; 739 740 data->numps = psb->numps; 741 dprintk("numpstates: 0x%x\n", data->numps); 742 return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid); 743 } 744 /* 745 * If you see this message, complain to BIOS manufacturer. If 746 * he tells you "we do not support Linux" or some similar 747 * nonsense, remember that Windows 2000 uses the same legacy 748 * mechanism that the old Linux PSB driver uses. Tell them it 749 * is broken with Windows 2000. 750 * 751 * The reference to the AMD documentation is chapter 9 in the 752 * BIOS and Kernel Developer's Guide, which is available on 753 * www.amd.com 754 */ 755 printk(KERN_ERR PFX "BIOS error - no PSB or ACPI _PSS objects\n"); 756 return -ENODEV; 757} 758 759#ifdef CONFIG_X86_POWERNOW_K8_ACPI 760static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) 761{ 762 if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE)) 763 return; 764 765 data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK; 766 data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK; 767 data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; 768 data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK; 769 data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK); 770 data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK; 771} 772 773static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) 774{ 775 struct cpufreq_frequency_table *powernow_table; 776 int ret_val; 777 778 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { 779 dprintk("register performance failed: bad ACPI data\n"); 780 return -EIO; 781 } 782 783 /* verify the data contained in the ACPI structures */ 784 if (data->acpi_data.state_count <= 1) { 785 dprintk("No ACPI P-States\n"); 786 goto err_out; 787 } 788 789 if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) || 790 (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) { 791 dprintk("Invalid control/status registers (%x - %x)\n", 792 data->acpi_data.control_register.space_id, 793 data->acpi_data.status_register.space_id); 794 goto err_out; 795 } 796 797 /* fill in data->powernow_table */ 798 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) 799 * (data->acpi_data.state_count + 1)), GFP_KERNEL); 800 if (!powernow_table) { 801 dprintk("powernow_table memory alloc failure\n"); 802 goto err_out; 803 } 804 805 if (cpu_family == CPU_HW_PSTATE) 806 ret_val = fill_powernow_table_pstate(data, powernow_table); 807 else 808 ret_val = fill_powernow_table_fidvid(data, powernow_table); 809 if (ret_val) 810 goto err_out_mem; 811 812 powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END; 813 powernow_table[data->acpi_data.state_count].index = 0; 814 data->powernow_table = powernow_table; 815 816 /* fill in data */ 817 data->numps = data->acpi_data.state_count; 818 if (first_cpu(cpu_core_map[data->cpu]) == data->cpu) 819 print_basics(data); 820 powernow_k8_acpi_pst_values(data, 0); 821 822 /* notify BIOS that we exist */ 823 acpi_processor_notify_smm(THIS_MODULE); 824 825 return 0; 826 827err_out_mem: 828 kfree(powernow_table); 829 830err_out: 831 acpi_processor_unregister_performance(&data->acpi_data, data->cpu); 832 833 /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */ 834 data->acpi_data.state_count = 0; 835 836 return -ENODEV; 837} 838 839static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table) 840{ 841 int i; 842 843 for (i = 0; i < data->acpi_data.state_count; i++) { 844 u32 index; 845 u32 hi = 0, lo = 0; 846 u32 fid; 847 u32 did; 848 849 index = data->acpi_data.states[i].control & HW_PSTATE_MASK; 850 if (index > MAX_HW_PSTATE) { 851 printk(KERN_ERR PFX "invalid pstate %d - bad value %d.\n", i, index); 852 printk(KERN_ERR PFX "Please report to BIOS manufacturer\n"); 853 } 854 rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi); 855 if (!(hi & HW_PSTATE_VALID_MASK)) { 856 dprintk("invalid pstate %d, ignoring\n", index); 857 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; 858 continue; 859 } 860 861 fid = lo & HW_PSTATE_FID_MASK; 862 did = (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT; 863 864 dprintk(" %d : fid 0x%x, did 0x%x\n", index, fid, did); 865 866 powernow_table[i].index = index | (fid << HW_FID_INDEX_SHIFT) | (did << HW_DID_INDEX_SHIFT); 867 868 powernow_table[i].frequency = find_khz_freq_from_fiddid(fid, did); 869 870 if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) { 871 printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n", 872 powernow_table[i].frequency, 873 (unsigned int) (data->acpi_data.states[i].core_frequency * 1000)); 874 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; 875 continue; 876 } 877 } 878 return 0; 879} 880 881static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table) 882{ 883 int i; 884 int cntlofreq = 0; 885 for (i = 0; i < data->acpi_data.state_count; i++) { 886 u32 fid; 887 u32 vid; 888 889 if (data->exttype) { 890 fid = data->acpi_data.states[i].status & EXT_FID_MASK; 891 vid = (data->acpi_data.states[i].status >> VID_SHIFT) & EXT_VID_MASK; 892 } else { 893 fid = data->acpi_data.states[i].control & FID_MASK; 894 vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK; 895 } 896 897 dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); 898 899 powernow_table[i].index = fid; /* lower 8 bits */ 900 powernow_table[i].index |= (vid << 8); /* upper 8 bits */ 901 powernow_table[i].frequency = find_khz_freq_from_fid(fid); 902 903 /* verify frequency is OK */ 904 if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) || 905 (powernow_table[i].frequency < (MIN_FREQ * 1000))) { 906 dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency); 907 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; 908 continue; 909 } 910 911 /* verify voltage is OK - BIOSs are using "off" to indicate invalid */ 912 if (vid == VID_OFF) { 913 dprintk("invalid vid %u, ignoring\n", vid); 914 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; 915 continue; 916 } 917 918 /* verify only 1 entry from the lo frequency table */ 919 if (fid < HI_FID_TABLE_BOTTOM) { 920 if (cntlofreq) { 921 /* if both entries are the same, ignore this one ... */ 922 if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) || 923 (powernow_table[i].index != powernow_table[cntlofreq].index)) { 924 printk(KERN_ERR PFX "Too many lo freq table entries\n"); 925 return 1; 926 } 927 928 dprintk("double low frequency table entry, ignoring it.\n"); 929 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; 930 continue; 931 } else 932 cntlofreq = i; 933 } 934 935 if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) { 936 printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n", 937 powernow_table[i].frequency, 938 (unsigned int) (data->acpi_data.states[i].core_frequency * 1000)); 939 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; 940 continue; 941 } 942 } 943 return 0; 944} 945 946static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) 947{ 948 if (data->acpi_data.state_count) 949 acpi_processor_unregister_performance(&data->acpi_data, data->cpu); 950} 951 952#else 953static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; } 954static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; } 955static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; } 956#endif /* CONFIG_X86_POWERNOW_K8_ACPI */ 957 958/* Take a frequency, and issue the fid/vid transition command */ 959static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned int index) 960{ 961 u32 fid = 0; 962 u32 vid = 0; 963 int res, i; 964 struct cpufreq_freqs freqs; 965 966 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); 967 968 /* fid/vid correctness check for k8 */ 969 /* fid are the lower 8 bits of the index we stored into 970 * the cpufreq frequency table in find_psb_table, vid 971 * are the upper 8 bits. 972 */ 973 fid = data->powernow_table[index].index & 0xFF; 974 vid = (data->powernow_table[index].index & 0xFF00) >> 8; 975 976 dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); 977 978 if (query_current_values_with_pending_wait(data)) 979 return 1; 980 981 if ((data->currvid == vid) && (data->currfid == fid)) { 982 dprintk("target matches current values (fid 0x%x, vid 0x%x)\n", 983 fid, vid); 984 return 0; 985 } 986 987 if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) { 988 printk(KERN_ERR PFX 989 "ignoring illegal change in lo freq table-%x to 0x%x\n", 990 data->currfid, fid); 991 return 1; 992 } 993 994 dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n", 995 smp_processor_id(), fid, vid); 996 freqs.old = find_khz_freq_from_fid(data->currfid); 997 freqs.new = find_khz_freq_from_fid(fid); 998 999 for_each_cpu_mask(i, *(data->available_cores)) { 1000 freqs.cpu = i; 1001 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 1002 } 1003 1004 res = transition_fid_vid(data, fid, vid); 1005 freqs.new = find_khz_freq_from_fid(data->currfid); 1006 1007 for_each_cpu_mask(i, *(data->available_cores)) { 1008 freqs.cpu = i; 1009 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 1010 } 1011 return res; 1012} 1013 1014/* Take a frequency, and issue the hardware pstate transition command */ 1015static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned int index) 1016{ 1017 u32 fid = 0; 1018 u32 did = 0; 1019 u32 pstate = 0; 1020 int res, i; 1021 struct cpufreq_freqs freqs; 1022 1023 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); 1024 1025 /* get fid did for hardware pstate transition */ 1026 pstate = index & HW_PSTATE_MASK; 1027 if (pstate > MAX_HW_PSTATE) 1028 return 0; 1029 fid = (index & HW_FID_INDEX_MASK) >> HW_FID_INDEX_SHIFT; 1030 did = (index & HW_DID_INDEX_MASK) >> HW_DID_INDEX_SHIFT; 1031 freqs.old = find_khz_freq_from_fiddid(data->currfid, data->currdid); 1032 freqs.new = find_khz_freq_from_fiddid(fid, did); 1033 1034 for_each_cpu_mask(i, *(data->available_cores)) { 1035 freqs.cpu = i; 1036 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 1037 } 1038 1039 res = transition_pstate(data, pstate); 1040 data->currfid = find_fid_from_pstate(pstate); 1041 data->currdid = find_did_from_pstate(pstate); 1042 freqs.new = find_khz_freq_from_fiddid(data->currfid, data->currdid); 1043 1044 for_each_cpu_mask(i, *(data->available_cores)) { 1045 freqs.cpu = i; 1046 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 1047 } 1048 return res; 1049} 1050 1051/* Driver entry point to switch to the target frequency */ 1052static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation) 1053{ 1054 cpumask_t oldmask = CPU_MASK_ALL; 1055 struct powernow_k8_data *data = powernow_data[pol->cpu]; 1056 u32 checkfid; 1057 u32 checkvid; 1058 unsigned int newstate; 1059 int ret = -EIO; 1060 1061 if (!data) 1062 return -EINVAL; 1063 1064 checkfid = data->currfid; 1065 checkvid = data->currvid; 1066 1067 /* only run on specific CPU from here on */ 1068 oldmask = current->cpus_allowed; 1069 set_cpus_allowed(current, cpumask_of_cpu(pol->cpu)); 1070 1071 if (smp_processor_id() != pol->cpu) { 1072 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); 1073 goto err_out; 1074 } 1075 1076 if (pending_bit_stuck()) { 1077 printk(KERN_ERR PFX "failing targ, change pending bit set\n"); 1078 goto err_out; 1079 } 1080 1081 dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n", 1082 pol->cpu, targfreq, pol->min, pol->max, relation); 1083 1084 if (query_current_values_with_pending_wait(data)) 1085 goto err_out; 1086 1087 if (cpu_family == CPU_HW_PSTATE) 1088 dprintk("targ: curr fid 0x%x, did 0x%x\n", 1089 data->currfid, data->currvid); 1090 else { 1091 dprintk("targ: curr fid 0x%x, vid 0x%x\n", 1092 data->currfid, data->currvid); 1093 1094 if ((checkvid != data->currvid) || (checkfid != data->currfid)) { 1095 printk(KERN_INFO PFX 1096 "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n", 1097 checkfid, data->currfid, checkvid, data->currvid); 1098 } 1099 } 1100 1101 if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate)) 1102 goto err_out; 1103 1104 mutex_lock(&fidvid_mutex); 1105 1106 powernow_k8_acpi_pst_values(data, newstate); 1107 1108 if (cpu_family == CPU_HW_PSTATE) 1109 ret = transition_frequency_pstate(data, newstate); 1110 else 1111 ret = transition_frequency_fidvid(data, newstate); 1112 if (ret) { 1113 printk(KERN_ERR PFX "transition frequency failed\n"); 1114 ret = 1; 1115 mutex_unlock(&fidvid_mutex); 1116 goto err_out; 1117 } 1118 mutex_unlock(&fidvid_mutex); 1119 1120 if (cpu_family == CPU_HW_PSTATE) 1121 pol->cur = find_khz_freq_from_fiddid(data->currfid, data->currdid); 1122 else 1123 pol->cur = find_khz_freq_from_fid(data->currfid); 1124 ret = 0; 1125 1126err_out: 1127 set_cpus_allowed(current, oldmask); 1128 return ret; 1129} 1130 1131/* Driver entry point to verify the policy and range of frequencies */ 1132static int powernowk8_verify(struct cpufreq_policy *pol) 1133{ 1134 struct powernow_k8_data *data = powernow_data[pol->cpu]; 1135 1136 if (!data) 1137 return -EINVAL; 1138 1139 return cpufreq_frequency_table_verify(pol, data->powernow_table); 1140} 1141 1142/* per CPU init entry point to the driver */ 1143static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol) 1144{ 1145 struct powernow_k8_data *data; 1146 cpumask_t oldmask = CPU_MASK_ALL; 1147 int rc; 1148 1149 if (!cpu_online(pol->cpu)) 1150 return -ENODEV; 1151 1152 if (!check_supported_cpu(pol->cpu)) 1153 return -ENODEV; 1154 1155 data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL); 1156 if (!data) { 1157 printk(KERN_ERR PFX "unable to alloc powernow_k8_data"); 1158 return -ENOMEM; 1159 } 1160 1161 data->cpu = pol->cpu; 1162 1163 if (powernow_k8_cpu_init_acpi(data)) { 1164 /* 1165 * Use the PSB BIOS structure. This is only availabe on 1166 * an UP version, and is deprecated by AMD. 1167 */ 1168 if (num_online_cpus() != 1) { 1169 printk(KERN_ERR PFX "MP systems not supported by PSB BIOS structure\n"); 1170 kfree(data); 1171 return -ENODEV; 1172 } 1173 if (pol->cpu != 0) { 1174 printk(KERN_ERR PFX "No _PSS objects for CPU other than CPU0\n"); 1175 kfree(data); 1176 return -ENODEV; 1177 } 1178 rc = find_psb_table(data); 1179 if (rc) { 1180 kfree(data); 1181 return -ENODEV; 1182 } 1183 } 1184 1185 /* only run on specific CPU from here on */ 1186 oldmask = current->cpus_allowed; 1187 set_cpus_allowed(current, cpumask_of_cpu(pol->cpu)); 1188 1189 if (smp_processor_id() != pol->cpu) { 1190 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); 1191 goto err_out; 1192 } 1193 1194 if (pending_bit_stuck()) { 1195 printk(KERN_ERR PFX "failing init, change pending bit set\n"); 1196 goto err_out; 1197 } 1198 1199 if (query_current_values_with_pending_wait(data)) 1200 goto err_out; 1201 1202 if (cpu_family == CPU_OPTERON) 1203 fidvid_msr_init(); 1204 1205 /* run on any CPU again */ 1206 set_cpus_allowed(current, oldmask); 1207 1208 pol->governor = CPUFREQ_DEFAULT_GOVERNOR; 1209 if (cpu_family == CPU_HW_PSTATE) 1210 pol->cpus = cpumask_of_cpu(pol->cpu); 1211 else 1212 pol->cpus = cpu_core_map[pol->cpu]; 1213 data->available_cores = &(pol->cpus); 1214 1215 /* Take a crude guess here. 1216 * That guess was in microseconds, so multiply with 1000 */ 1217 pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US) 1218 + (3 * (1 << data->irt) * 10)) * 1000; 1219 1220 if (cpu_family == CPU_HW_PSTATE) 1221 pol->cur = find_khz_freq_from_fiddid(data->currfid, data->currdid); 1222 else 1223 pol->cur = find_khz_freq_from_fid(data->currfid); 1224 dprintk("policy current frequency %d kHz\n", pol->cur); 1225 1226 /* min/max the cpu is capable of */ 1227 if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) { 1228 printk(KERN_ERR PFX "invalid powernow_table\n"); 1229 powernow_k8_cpu_exit_acpi(data); 1230 kfree(data->powernow_table); 1231 kfree(data); 1232 return -EINVAL; 1233 } 1234 1235 cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu); 1236 1237 if (cpu_family == CPU_HW_PSTATE) 1238 dprintk("cpu_init done, current fid 0x%x, did 0x%x\n", 1239 data->currfid, data->currdid); 1240 else 1241 dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n", 1242 data->currfid, data->currvid); 1243 1244 powernow_data[pol->cpu] = data; 1245 1246 return 0; 1247 1248err_out: 1249 set_cpus_allowed(current, oldmask); 1250 powernow_k8_cpu_exit_acpi(data); 1251 1252 kfree(data); 1253 return -ENODEV; 1254} 1255 1256static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol) 1257{ 1258 struct powernow_k8_data *data = powernow_data[pol->cpu]; 1259 1260 if (!data) 1261 return -EINVAL; 1262 1263 powernow_k8_cpu_exit_acpi(data); 1264 1265 cpufreq_frequency_table_put_attr(pol->cpu); 1266 1267 kfree(data->powernow_table); 1268 kfree(data); 1269 1270 return 0; 1271} 1272 1273static unsigned int powernowk8_get (unsigned int cpu) 1274{ 1275 struct powernow_k8_data *data; 1276 cpumask_t oldmask = current->cpus_allowed; 1277 unsigned int khz = 0; 1278 1279 data = powernow_data[first_cpu(cpu_core_map[cpu])]; 1280 1281 if (!data) 1282 return -EINVAL; 1283 1284 set_cpus_allowed(current, cpumask_of_cpu(cpu)); 1285 if (smp_processor_id() != cpu) { 1286 printk(KERN_ERR PFX "limiting to CPU %d failed in powernowk8_get\n", cpu); 1287 set_cpus_allowed(current, oldmask); 1288 return 0; 1289 } 1290 1291 if (query_current_values_with_pending_wait(data)) 1292 goto out; 1293 1294 if (cpu_family == CPU_HW_PSTATE) 1295 khz = find_khz_freq_from_fiddid(data->currfid, data->currdid); 1296 else 1297 khz = find_khz_freq_from_fid(data->currfid); 1298 1299 1300out: 1301 set_cpus_allowed(current, oldmask); 1302 return khz; 1303} 1304 1305static struct freq_attr* powernow_k8_attr[] = { 1306 &cpufreq_freq_attr_scaling_available_freqs, 1307 NULL, 1308}; 1309 1310static struct cpufreq_driver cpufreq_amd64_driver = { 1311 .verify = powernowk8_verify, 1312 .target = powernowk8_target, 1313 .init = powernowk8_cpu_init, 1314 .exit = __devexit_p(powernowk8_cpu_exit), 1315 .get = powernowk8_get, 1316 .name = "powernow-k8", 1317 .owner = THIS_MODULE, 1318 .attr = powernow_k8_attr, 1319}; 1320 1321/* driver entry point for init */ 1322static int __cpuinit powernowk8_init(void) 1323{ 1324 unsigned int i, supported_cpus = 0; 1325 1326 for_each_online_cpu(i) { 1327 if (check_supported_cpu(i)) 1328 supported_cpus++; 1329 } 1330 1331 if (supported_cpus == num_online_cpus()) { 1332 printk(KERN_INFO PFX "Found %d %s " 1333 "processors (" VERSION ")\n", supported_cpus, 1334 boot_cpu_data.x86_model_id); 1335 return cpufreq_register_driver(&cpufreq_amd64_driver); 1336 } 1337 1338 return -ENODEV; 1339} 1340 1341/* driver entry point for term */ 1342static void __exit powernowk8_exit(void) 1343{ 1344 dprintk("exit\n"); 1345 1346 cpufreq_unregister_driver(&cpufreq_amd64_driver); 1347} 1348 1349MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com>"); 1350MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); 1351MODULE_LICENSE("GPL"); 1352 1353late_initcall(powernowk8_init); 1354module_exit(powernowk8_exit); 1355