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  • only in /netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/h8300/platform/h8s/edosk2674/
1/*
2 *  linux/arch/h8300/platform/h8s/edosk2674/crt0_rom.S
3 *
4 *  Yoshinori Sato <ysato@users.sourceforge.jp>
5 *
6 *  Platform depend startup
7 *  Target Archtecture:	EDOSK-2674
8 *  Memory Layout     :	ROM
9 */
10
11#define ASSEMBLY
12
13#include <asm/linkage.h>
14#include <asm/regs267x.h>
15
16	.global SYMBOL_NAME(_start)
17	.global SYMBOL_NAME(_command_line)
18	.global SYMBOL_NAME(_platform_gpio_table)
19	.global SYMBOL_NAME(_target_name)
20
21	.h8300s
22	.section .text
23	.file	"crt0_rom.S"
24
25	/* CPU Reset entry */
26SYMBOL_NAME_LABEL(_start)
27	mov.l	#__ramend,sp
28	ldc	#0x80,ccr
29	ldc	#0,exr
30
31	/* Peripheral Setup */
32;BSC/GPIO setup
33	mov.l	#init_regs,er0
34	mov.w	#0xffff,e2
351:
36	mov.w	@er0+,r2
37	beq	2f
38	mov.w	@er0+,r1
39	mov.b	r1l,@er2
40	bra	1b
41
422:
43;SDRAM setup
44#define SDRAM_SMR 0x400040
45
46	mov.b	#0,r0l
47	mov.b	r0l,@DRACCR:16
48	mov.w	#0x188,r0
49	mov.w	r0,@REFCR:16
50	mov.w	#0x85b4,r0
51	mov.w	r0,@DRAMCR:16
52	mov.b	#0,r1l
53	mov.b	r1l,@SDRAM_SMR
54	mov.w	#0x84b4,r0
55	mov.w	r0,@DRAMCR:16
56;special thanks to Arizona Cooperative Power
57
58	/* copy .data */
59	mov.l	#__begin_data,er5
60	mov.l	#__sdata,er6
61	mov.l	#__edata,er4
62	sub.l	er6,er4
63	shlr.l	#2,er4
641:
65	mov.l	@er5+,er0
66	mov.l	er0,@er6
67	adds	#4,er6
68	dec.l	#1,er4
69	bne	1b
70
71	/* .bss clear */
72	mov.l	#__sbss,er5
73	mov.l	#__ebss,er4
74	sub.l	er5,er4
75	shlr.l	#2,er4
76	sub.l	er0,er0
771:
78	mov.l	er0,@er5
79	adds	#4,er5
80	dec.l	#1,er4
81	bne	1b
82
83	/* copy kernel commandline */
84	mov.l	#COMMAND_START,er5
85	mov.l	#SYMBOL_NAME(_command_line),er6
86	mov.w	#512,r4
87	eepmov.w
88
89	/* linux kernel start */
90	ldc	#0x90,ccr	/* running kernel */
91	mov.l	#SYMBOL_NAME(init_thread_union),sp
92	add.l	#0x2000,sp
93	jsr	@_start_kernel
94_exit:
95
96	jmp	_exit
97
98	rts
99
100	/* I/O port assign information */
101__platform_gpio_table:
102	mov.l	#gpio_table,er0
103	rts
104
105#define INIT_REGS_DATA(REGS,DATA) \
106	.word	((REGS) & 0xffff),DATA
107
108init_regs:
109INIT_REGS_DATA(ASTCR,0xff)
110INIT_REGS_DATA(RDNCR,0x00)
111INIT_REGS_DATA(ABWCR,0x80)
112INIT_REGS_DATA(WTCRAH,0x27)
113INIT_REGS_DATA(WTCRAL,0x77)
114INIT_REGS_DATA(WTCRBH,0x71)
115INIT_REGS_DATA(WTCRBL,0x22)
116INIT_REGS_DATA(CSACRH,0x80)
117INIT_REGS_DATA(CSACRL,0x80)
118INIT_REGS_DATA(BROMCRH,0xa0)
119INIT_REGS_DATA(BROMCRL,0xa0)
120INIT_REGS_DATA(P3DDR,0x3a)
121INIT_REGS_DATA(P3ODR,0x06)
122INIT_REGS_DATA(PADDR,0xff)
123INIT_REGS_DATA(PFDDR,0xfe)
124INIT_REGS_DATA(PGDDR,0x0f)
125INIT_REGS_DATA(PHDDR,0x0f)
126INIT_REGS_DATA(PFCR0,0xff)
127INIT_REGS_DATA(PFCR2,0x0d)
128INIT_REGS_DATA(ITSR, 0x00)
129INIT_REGS_DATA(ITSR+1,0x3f)
130INIT_REGS_DATA(INTCR,0x20)
131
132	.word	0
133
134gpio_table:
135	;; P1DDR
136	.byte	0x00,0x00
137	;; P2DDR
138	.byte	0x00,0x00
139	;; P3DDR
140	.byte	0x00,0x00
141	;; dummy
142	.byte	0x00,0x00
143	;; P5DDR
144	.byte	0x00,0x00
145	;; P6DDR
146	.byte	0x00,0x00
147	;; P7DDR
148	.byte	0x00,0x00
149	;; P8DDR
150	.byte	0x00,0x00
151	;; dummy
152	.byte	0x00,0x00
153	;; PADDR
154	.byte	0x00,0x00
155	;; PBDDR
156	.byte	0x00,0x00
157	;; PCDDR
158	.byte	0x00,0x00
159	;; PDDDR
160	.byte	0x00,0x00
161	;; PEDDR
162	.byte	0x00,0x00
163	;; PFDDR
164	.byte	0x00,0x00
165	;; PGDDR
166	.byte	0x00,0x00
167	;; PHDDR
168	.byte	0x00,0x00
169
170	.section .rodata
171__target_name:
172	.asciz	"EDOSK-2674"
173
174	.section .bss
175__command_line:
176	.space	512
177
178	/* interrupt vector */
179	.section .vectors,"ax"
180	.long	__start
181	.long	__start
182vector	=	2
183	.rept	126
184	.long	_interrupt_redirect_table+vector*4
185vector	=	vector + 1
186	.endr
187