1/* 2 * File: arch/blackfin/mach-bf537/boards/stamp.c 3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c 4 * Author: Aidan Williams <aidan@nicta.com.au> 5 * 6 * Created: 7 * Description: 8 * 9 * Modified: 10 * Copyright 2005 National ICT Australia (NICTA) 11 * Copyright 2004-2006 Analog Devices Inc. 12 * 13 * Bugs: Enter bugs at http://blackfin.uclinux.org/ 14 * 15 * This program is free software; you can redistribute it and/or modify 16 * it under the terms of the GNU General Public License as published by 17 * the Free Software Foundation; either version 2 of the License, or 18 * (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, see the file COPYING, or write 27 * to the Free Software Foundation, Inc., 28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 29 */ 30 31#include <linux/device.h> 32#include <linux/platform_device.h> 33#include <linux/mtd/mtd.h> 34#include <linux/mtd/partitions.h> 35#include <linux/spi/spi.h> 36#include <linux/spi/flash.h> 37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 38#include <linux/usb_isp1362.h> 39#endif 40#include <asm/irq.h> 41#include <linux/irq.h> 42#include <linux/interrupt.h> 43#include <asm/bfin5xx_spi.h> 44#include <linux/usb_sl811.h> 45 46#include <linux/spi/ad7877.h> 47 48/* 49 * Name the Board for the /proc/cpuinfo 50 */ 51char *bfin_board_name = "ADDS-BF537-STAMP"; 52 53/* 54 * Driver needs to know address, irq and flag pin. 55 */ 56 57#define ISP1761_BASE 0x203C0000 58#define ISP1761_IRQ IRQ_PF7 59 60#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) 61static struct resource bfin_isp1761_resources[] = { 62 [0] = { 63 .name = "isp1761-regs", 64 .start = ISP1761_BASE + 0x00000000, 65 .end = ISP1761_BASE + 0x000fffff, 66 .flags = IORESOURCE_MEM, 67 }, 68 [1] = { 69 .start = ISP1761_IRQ, 70 .end = ISP1761_IRQ, 71 .flags = IORESOURCE_IRQ, 72 }, 73}; 74 75static struct platform_device bfin_isp1761_device = { 76 .name = "isp1761", 77 .id = 0, 78 .num_resources = ARRAY_SIZE(bfin_isp1761_resources), 79 .resource = bfin_isp1761_resources, 80}; 81 82static struct platform_device *bfin_isp1761_devices[] = { 83 &bfin_isp1761_device, 84}; 85 86int __init bfin_isp1761_init(void) 87{ 88 unsigned int num_devices=ARRAY_SIZE(bfin_isp1761_devices); 89 90 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); 91 set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING); 92 93 return platform_add_devices(bfin_isp1761_devices, num_devices); 94} 95 96void __exit bfin_isp1761_exit(void) 97{ 98 platform_device_unregister(&bfin_isp1761_device); 99} 100 101arch_initcall(bfin_isp1761_init); 102#endif 103 104#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 105static struct resource bfin_pcmcia_cf_resources[] = { 106 { 107 .start = 0x20310000, /* IO PORT */ 108 .end = 0x20312000, 109 .flags = IORESOURCE_MEM, 110 },{ 111 .start = 0x20311000, /* Attribute Memory */ 112 .end = 0x20311FFF, 113 .flags = IORESOURCE_MEM, 114 },{ 115 .start = IRQ_PF4, 116 .end = IRQ_PF4, 117 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, 118 },{ 119 .start = 6, /* Card Detect PF6 */ 120 .end = 6, 121 .flags = IORESOURCE_IRQ, 122 }, 123}; 124 125static struct platform_device bfin_pcmcia_cf_device = { 126 .name = "bfin_cf_pcmcia", 127 .id = -1, 128 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources), 129 .resource = bfin_pcmcia_cf_resources, 130}; 131#endif 132 133#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 134static struct platform_device rtc_device = { 135 .name = "rtc-bfin", 136 .id = -1, 137}; 138#endif 139 140#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 141static struct resource smc91x_resources[] = { 142 { 143 .name = "smc91x-regs", 144 .start = 0x20300300, 145 .end = 0x20300300 + 16, 146 .flags = IORESOURCE_MEM, 147 },{ 148 149 .start = IRQ_PF7, 150 .end = IRQ_PF7, 151 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 152 }, 153}; 154static struct platform_device smc91x_device = { 155 .name = "smc91x", 156 .id = 0, 157 .num_resources = ARRAY_SIZE(smc91x_resources), 158 .resource = smc91x_resources, 159}; 160#endif 161 162#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) 163static struct resource sl811_hcd_resources[] = { 164 { 165 .start = 0x20340000, 166 .end = 0x20340000, 167 .flags = IORESOURCE_MEM, 168 },{ 169 .start = 0x20340004, 170 .end = 0x20340004, 171 .flags = IORESOURCE_MEM, 172 },{ 173 .start = CONFIG_USB_SL811_BFIN_IRQ, 174 .end = CONFIG_USB_SL811_BFIN_IRQ, 175 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 176 }, 177}; 178 179#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) 180void sl811_port_power(struct device *dev, int is_on) 181{ 182 unsigned short mask = (1 << CONFIG_USB_SL811_BFIN_GPIO_VBUS); 183 184 bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask); 185 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask); 186 187 if (is_on) 188 bfin_write_FIO_FLAG_S(mask); 189 else 190 bfin_write_FIO_FLAG_C(mask); 191} 192#endif 193 194static struct sl811_platform_data sl811_priv = { 195 .potpg = 10, 196 .power = 250, /* == 500mA */ 197#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS) 198 .port_power = &sl811_port_power, 199#endif 200}; 201 202static struct platform_device sl811_hcd_device = { 203 .name = "sl811-hcd", 204 .id = 0, 205 .dev = { 206 .platform_data = &sl811_priv, 207 }, 208 .num_resources = ARRAY_SIZE(sl811_hcd_resources), 209 .resource = sl811_hcd_resources, 210}; 211#endif 212 213#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 214static struct resource isp1362_hcd_resources[] = { 215 { 216 .start = 0x20360000, 217 .end = 0x20360000, 218 .flags = IORESOURCE_MEM, 219 },{ 220 .start = 0x20360004, 221 .end = 0x20360004, 222 .flags = IORESOURCE_MEM, 223 },{ 224 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, 225 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ, 226 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 227 }, 228}; 229 230static struct isp1362_platform_data isp1362_priv = { 231 .sel15Kres = 1, 232 .clknotstop = 0, 233 .oc_enable = 0, 234 .int_act_high = 0, 235 .int_edge_triggered = 0, 236 .remote_wakeup_connected = 0, 237 .no_power_switching = 1, 238 .power_switching_mode = 0, 239}; 240 241static struct platform_device isp1362_hcd_device = { 242 .name = "isp1362-hcd", 243 .id = 0, 244 .dev = { 245 .platform_data = &isp1362_priv, 246 }, 247 .num_resources = ARRAY_SIZE(isp1362_hcd_resources), 248 .resource = isp1362_hcd_resources, 249}; 250#endif 251 252#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 253static struct platform_device bfin_mac_device = { 254 .name = "bfin_mac", 255}; 256#endif 257 258#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 259static struct resource net2272_bfin_resources[] = { 260 { 261 .start = 0x20300000, 262 .end = 0x20300000 + 0x100, 263 .flags = IORESOURCE_MEM, 264 },{ 265 .start = IRQ_PF7, 266 .end = IRQ_PF7, 267 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 268 }, 269}; 270 271static struct platform_device net2272_bfin_device = { 272 .name = "net2272", 273 .id = -1, 274 .num_resources = ARRAY_SIZE(net2272_bfin_resources), 275 .resource = net2272_bfin_resources, 276}; 277#endif 278 279#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 280/* all SPI peripherals info goes here */ 281 282#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 283static struct mtd_partition bfin_spi_flash_partitions[] = { 284 { 285 .name = "bootloader", 286 .size = 0x00020000, 287 .offset = 0, 288 .mask_flags = MTD_CAP_ROM 289 },{ 290 .name = "kernel", 291 .size = 0xe0000, 292 .offset = 0x20000 293 },{ 294 .name = "file system", 295 .size = 0x700000, 296 .offset = 0x00100000, 297 } 298}; 299 300static struct flash_platform_data bfin_spi_flash_data = { 301 .name = "m25p80", 302 .parts = bfin_spi_flash_partitions, 303 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), 304 .type = "m25p64", 305}; 306 307/* SPI flash chip (m25p64) */ 308static struct bfin5xx_spi_chip spi_flash_chip_info = { 309 .enable_dma = 0, /* use dma transfer with this chip*/ 310 .bits_per_word = 8, 311}; 312#endif 313 314#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) 315/* SPI ADC chip */ 316static struct bfin5xx_spi_chip spi_adc_chip_info = { 317 .enable_dma = 1, /* use dma transfer with this chip*/ 318 .bits_per_word = 16, 319}; 320#endif 321 322#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 323static struct bfin5xx_spi_chip ad1836_spi_chip_info = { 324 .enable_dma = 0, 325 .bits_per_word = 16, 326}; 327#endif 328 329#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) 330static struct bfin5xx_spi_chip ad9960_spi_chip_info = { 331 .enable_dma = 0, 332 .bits_per_word = 16, 333}; 334#endif 335 336#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 337static struct bfin5xx_spi_chip spi_mmc_chip_info = { 338 .enable_dma = 1, 339 .bits_per_word = 8, 340}; 341#endif 342 343#if defined(CONFIG_PBX) 344static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { 345 .ctl_reg = 0x4, /* send zero */ 346 .enable_dma = 0, 347 .bits_per_word = 8, 348 .cs_change_per_word = 1, 349}; 350#endif 351 352#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) 353static struct bfin5xx_spi_chip ad5304_chip_info = { 354 .enable_dma = 0, 355 .bits_per_word = 16, 356}; 357#endif 358 359#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 360static struct bfin5xx_spi_chip spi_ad7877_chip_info = { 361// .cs_change_per_word = 1, 362 .enable_dma = 0, 363 .bits_per_word = 16, 364}; 365 366static const struct ad7877_platform_data bfin_ad7877_ts_info = { 367 .model = 7877, 368 .vref_delay_usecs = 50, /* internal, no capacitor */ 369 .x_plate_ohms = 419, 370 .y_plate_ohms = 486, 371 .pressure_max = 1000, 372 .pressure_min = 0, 373 .stopacq_polarity = 1, 374 .first_conversion_delay = 3, 375 .acquisition_time = 1, 376 .averaging = 1, 377 .pen_down_acc_interval = 1, 378}; 379#endif 380 381static struct spi_board_info bfin_spi_board_info[] __initdata = { 382#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 383 { 384 /* the modalias must be the same as spi device driver name */ 385 .modalias = "m25p80", /* Name of spi_driver for this device */ 386 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 387 .bus_num = 1, /* Framework bus number */ 388 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ 389 .platform_data = &bfin_spi_flash_data, 390 .controller_data = &spi_flash_chip_info, 391 .mode = SPI_MODE_3, 392 }, 393#endif 394 395#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE) 396 { 397 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ 398 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */ 399 .bus_num = 1, /* Framework bus number */ 400 .chip_select = 1, /* Framework chip select. */ 401 .platform_data = NULL, /* No spi_driver specific config */ 402 .controller_data = &spi_adc_chip_info, 403 }, 404#endif 405 406#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) 407 { 408 .modalias = "ad1836-spi", 409 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 410 .bus_num = 1, 411 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, 412 .controller_data = &ad1836_spi_chip_info, 413 }, 414#endif 415#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE) 416 { 417 .modalias = "ad9960-spi", 418 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */ 419 .bus_num = 1, 420 .chip_select = 1, 421 .controller_data = &ad9960_spi_chip_info, 422 }, 423#endif 424#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) 425 { 426 .modalias = "spi_mmc_dummy", 427 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 428 .bus_num = 1, 429 .chip_select = 0, 430 .platform_data = NULL, 431 .controller_data = &spi_mmc_chip_info, 432 .mode = SPI_MODE_3, 433 }, 434 { 435 .modalias = "spi_mmc", 436 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 437 .bus_num = 1, 438 .chip_select = CONFIG_SPI_MMC_CS_CHAN, 439 .platform_data = NULL, 440 .controller_data = &spi_mmc_chip_info, 441 .mode = SPI_MODE_3, 442 }, 443#endif 444#if defined(CONFIG_PBX) 445 { 446 .modalias = "fxs-spi", 447 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 448 .bus_num = 1, 449 .chip_select = 3, 450 .controller_data= &spi_si3xxx_chip_info, 451 .mode = SPI_MODE_3, 452 }, 453 { 454 .modalias = "fxo-spi", 455 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 456 .bus_num = 1, 457 .chip_select = 2, 458 .controller_data= &spi_si3xxx_chip_info, 459 .mode = SPI_MODE_3, 460 }, 461#endif 462#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE) 463 { 464 .modalias = "ad5304_spi", 465 .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */ 466 .bus_num = 1, 467 .chip_select = 2, 468 .platform_data = NULL, 469 .controller_data = &ad5304_chip_info, 470 .mode = SPI_MODE_2, 471 }, 472#endif 473#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) 474 { 475 .modalias = "ad7877", 476 .platform_data = &bfin_ad7877_ts_info, 477 .irq = IRQ_PF6, 478 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ 479 .bus_num = 1, 480 .chip_select = 1, 481 .controller_data = &spi_ad7877_chip_info, 482 }, 483#endif 484}; 485 486/* SPI controller data */ 487static struct bfin5xx_spi_master spi_bfin_master_info = { 488 .num_chipselect = 8, 489 .enable_dma = 1, /* master has the ability to do dma transfer */ 490}; 491 492static struct platform_device spi_bfin_master_device = { 493 .name = "bfin-spi-master", 494 .id = 1, /* Bus number */ 495 .dev = { 496 .platform_data = &spi_bfin_master_info, /* Passed to driver */ 497 }, 498}; 499#endif /* spi master and devices */ 500 501#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 502static struct platform_device bfin_fb_device = { 503 .name = "bf537-fb", 504}; 505#endif 506 507#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 508static struct resource bfin_uart_resources[] = { 509 { 510 .start = 0xFFC00400, 511 .end = 0xFFC004FF, 512 .flags = IORESOURCE_MEM, 513 },{ 514 .start = 0xFFC02000, 515 .end = 0xFFC020FF, 516 .flags = IORESOURCE_MEM, 517 }, 518}; 519 520static struct platform_device bfin_uart_device = { 521 .name = "bfin-uart", 522 .id = 1, 523 .num_resources = ARRAY_SIZE(bfin_uart_resources), 524 .resource = bfin_uart_resources, 525}; 526#endif 527 528#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 529static struct platform_device i2c_bfin_twi_device = { 530 .name = "i2c-bfin-twi", 531 .id = 0, 532}; 533#endif 534 535#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 536static struct platform_device bfin_sport0_uart_device = { 537 .name = "bfin-sport-uart", 538 .id = 0, 539}; 540 541static struct platform_device bfin_sport1_uart_device = { 542 .name = "bfin-sport-uart", 543 .id = 1, 544}; 545#endif 546 547static struct platform_device *stamp_devices[] __initdata = { 548#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 549 &bfin_pcmcia_cf_device, 550#endif 551 552#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) 553 &rtc_device, 554#endif 555 556#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE) 557 &sl811_hcd_device, 558#endif 559 560#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 561 &isp1362_hcd_device, 562#endif 563 564#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) 565 &smc91x_device, 566#endif 567 568#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) 569 &bfin_mac_device, 570#endif 571 572#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) 573 &net2272_bfin_device, 574#endif 575 576#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 577 &spi_bfin_master_device, 578#endif 579 580#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) 581 &bfin_fb_device, 582#endif 583 584#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 585 &bfin_uart_device, 586#endif 587 588#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) 589 &i2c_bfin_twi_device, 590#endif 591 592#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) 593 &bfin_sport0_uart_device, 594 &bfin_sport1_uart_device, 595#endif 596}; 597 598static int __init stamp_init(void) 599{ 600 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__); 601 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices)); 602#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) 603 spi_register_board_info(bfin_spi_board_info, 604 ARRAY_SIZE(bfin_spi_board_info)); 605#endif 606 return 0; 607} 608 609arch_initcall(stamp_init); 610