1/* 2 * linux/arch/arm/mach-omap1/fpga.c 3 * 4 * Interrupt handler for OMAP-1510 Innovator FPGA 5 * 6 * Copyright (C) 2001 RidgeRun, Inc. 7 * Author: Greg Lonnon <glonnon@ridgerun.com> 8 * 9 * Copyright (C) 2002 MontaVista Software, Inc. 10 * 11 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6 12 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com> 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License version 2 as 16 * published by the Free Software Foundation. 17 */ 18 19#include <linux/types.h> 20#include <linux/init.h> 21#include <linux/kernel.h> 22#include <linux/device.h> 23#include <linux/errno.h> 24 25#include <asm/hardware.h> 26#include <asm/io.h> 27#include <asm/irq.h> 28#include <asm/mach/irq.h> 29 30#include <asm/arch/fpga.h> 31#include <asm/arch/gpio.h> 32 33static void fpga_mask_irq(unsigned int irq) 34{ 35 irq -= OMAP1510_IH_FPGA_BASE; 36 37 if (irq < 8) 38 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) 39 & ~(1 << irq)), OMAP1510_FPGA_IMR_LO); 40 else if (irq < 16) 41 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI) 42 & ~(1 << (irq - 8))), OMAP1510_FPGA_IMR_HI); 43 else 44 __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2) 45 & ~(1 << (irq - 16))), INNOVATOR_FPGA_IMR2); 46} 47 48 49static inline u32 get_fpga_unmasked_irqs(void) 50{ 51 return 52 ((__raw_readb(OMAP1510_FPGA_ISR_LO) & 53 __raw_readb(OMAP1510_FPGA_IMR_LO))) | 54 ((__raw_readb(OMAP1510_FPGA_ISR_HI) & 55 __raw_readb(OMAP1510_FPGA_IMR_HI)) << 8) | 56 ((__raw_readb(INNOVATOR_FPGA_ISR2) & 57 __raw_readb(INNOVATOR_FPGA_IMR2)) << 16); 58} 59 60 61static void fpga_ack_irq(unsigned int irq) 62{ 63 /* Don't need to explicitly ACK FPGA interrupts */ 64} 65 66static void fpga_unmask_irq(unsigned int irq) 67{ 68 irq -= OMAP1510_IH_FPGA_BASE; 69 70 if (irq < 8) 71 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)), 72 OMAP1510_FPGA_IMR_LO); 73 else if (irq < 16) 74 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI) 75 | (1 << (irq - 8))), OMAP1510_FPGA_IMR_HI); 76 else 77 __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2) 78 | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2); 79} 80 81static void fpga_mask_ack_irq(unsigned int irq) 82{ 83 fpga_mask_irq(irq); 84 fpga_ack_irq(irq); 85} 86 87void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) 88{ 89 struct irq_desc *d; 90 u32 stat; 91 int fpga_irq; 92 93 stat = get_fpga_unmasked_irqs(); 94 95 if (!stat) 96 return; 97 98 for (fpga_irq = OMAP1510_IH_FPGA_BASE; 99 (fpga_irq < (OMAP1510_IH_FPGA_BASE + NR_FPGA_IRQS)) && stat; 100 fpga_irq++, stat >>= 1) { 101 if (stat & 1) { 102 d = irq_desc + fpga_irq; 103 desc_handle_irq(fpga_irq, d); 104 } 105 } 106} 107 108static struct irq_chip omap_fpga_irq_ack = { 109 .name = "FPGA-ack", 110 .ack = fpga_mask_ack_irq, 111 .mask = fpga_mask_irq, 112 .unmask = fpga_unmask_irq, 113}; 114 115 116static struct irq_chip omap_fpga_irq = { 117 .name = "FPGA", 118 .ack = fpga_ack_irq, 119 .mask = fpga_mask_irq, 120 .unmask = fpga_unmask_irq, 121}; 122 123void omap1510_fpga_init_irq(void) 124{ 125 int i; 126 127 __raw_writeb(0, OMAP1510_FPGA_IMR_LO); 128 __raw_writeb(0, OMAP1510_FPGA_IMR_HI); 129 __raw_writeb(0, INNOVATOR_FPGA_IMR2); 130 131 for (i = OMAP1510_IH_FPGA_BASE; i < (OMAP1510_IH_FPGA_BASE + NR_FPGA_IRQS); i++) { 132 133 if (i == OMAP1510_INT_FPGA_TS) { 134 /* 135 * The touchscreen interrupt is level-sensitive, so 136 * we'll use the regular mask_ack routine for it. 137 */ 138 set_irq_chip(i, &omap_fpga_irq_ack); 139 } 140 else { 141 /* 142 * All FPGA interrupts except the touchscreen are 143 * edge-sensitive, so we won't mask them. 144 */ 145 set_irq_chip(i, &omap_fpga_irq); 146 } 147 148 set_irq_handler(i, handle_edge_irq); 149 set_irq_flags(i, IRQF_VALID); 150 } 151 152 /* 153 * The FPGA interrupt line is connected to GPIO13. Claim this pin for 154 * the ARM. 155 * 156 * NOTE: For general GPIO/MPUIO access and interrupts, please see 157 * gpio.[ch] 158 */ 159 omap_request_gpio(13); 160 omap_set_gpio_direction(13, 1); 161 set_irq_type(OMAP_GPIO_IRQ(13), IRQT_RISING); 162 set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux); 163} 164 165EXPORT_SYMBOL(omap1510_fpga_init_irq); 166