1/* 2 * arch/arm/mach-at91/pm.c 3 * AT91 Power Management 4 * 5 * Copyright (C) 2005 David Brownell 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 */ 12 13#include <linux/pm.h> 14#include <linux/sched.h> 15#include <linux/proc_fs.h> 16#include <linux/pm.h> 17#include <linux/interrupt.h> 18#include <linux/sysfs.h> 19#include <linux/module.h> 20#include <linux/platform_device.h> 21 22#include <asm/io.h> 23#include <asm/irq.h> 24#include <asm/atomic.h> 25#include <asm/mach/time.h> 26#include <asm/mach/irq.h> 27#include <asm/mach-types.h> 28 29#include <asm/arch/at91_pmc.h> 30#include <asm/arch/at91rm9200_mc.h> 31#include <asm/arch/gpio.h> 32#include <asm/arch/cpu.h> 33 34#include "generic.h" 35 36 37static int at91_pm_valid_state(suspend_state_t state) 38{ 39 switch (state) { 40 case PM_SUSPEND_ON: 41 case PM_SUSPEND_STANDBY: 42 case PM_SUSPEND_MEM: 43 return 1; 44 45 default: 46 return 0; 47 } 48} 49 50 51static suspend_state_t target_state; 52 53/* 54 * Called after processes are frozen, but before we shutdown devices. 55 */ 56static int at91_pm_set_target(suspend_state_t state) 57{ 58 target_state = state; 59 return 0; 60} 61 62/* 63 * Verify that all the clocks are correct before entering 64 * slow-clock mode. 65 */ 66static int at91_pm_verify_clocks(void) 67{ 68 unsigned long scsr; 69 int i; 70 71 scsr = at91_sys_read(AT91_PMC_SCSR); 72 73 /* USB must not be using PLLB */ 74 if (cpu_is_at91rm9200()) { 75 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) { 76 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); 77 return 0; 78 } 79 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()) { 80 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) { 81 pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); 82 return 0; 83 } 84 } 85 86#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS 87 /* PCK0..PCK3 must be disabled, or configured to use clk32k */ 88 for (i = 0; i < 4; i++) { 89 u32 css; 90 91 if ((scsr & (AT91_PMC_PCK0 << i)) == 0) 92 continue; 93 94 css = at91_sys_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; 95 if (css != AT91_PMC_CSS_SLOW) { 96 pr_debug("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); 97 return 0; 98 } 99 } 100#endif 101 102 return 1; 103} 104 105/* 106 * Call this from platform driver suspend() to see how deeply to suspend. 107 * For example, some controllers (like OHCI) need one of the PLL clocks 108 * in order to act as a wakeup source, and those are not available when 109 * going into slow clock mode. 110 * 111 * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have 112 * the very same problem (but not using at91 main_clk), and it'd be better 113 * to add one generic API rather than lots of platform-specific ones. 114 */ 115int at91_suspend_entering_slow_clock(void) 116{ 117 return (target_state == PM_SUSPEND_MEM); 118} 119EXPORT_SYMBOL(at91_suspend_entering_slow_clock); 120 121 122static void (*slow_clock)(void); 123 124 125static int at91_pm_enter(suspend_state_t state) 126{ 127 at91_gpio_suspend(); 128 at91_irq_suspend(); 129 130 pr_debug("AT91: PM - wake mask %08x, pm state %d\n", 131 /* remember all the always-wake irqs */ 132 (at91_sys_read(AT91_PMC_PCSR) 133 | (1 << AT91_ID_FIQ) 134 | (1 << AT91_ID_SYS) 135 | (at91_extern_irq)) 136 & at91_sys_read(AT91_AIC_IMR), 137 state); 138 139 switch (state) { 140 /* 141 * Suspend-to-RAM is like STANDBY plus slow clock mode, so 142 * drivers must suspend more deeply: only the master clock 143 * controller may be using the main oscillator. 144 */ 145 case PM_SUSPEND_MEM: 146 /* 147 * Ensure that clocks are in a valid state. 148 */ 149 if (!at91_pm_verify_clocks()) 150 goto error; 151 152 /* 153 * Enter slow clock mode by switching over to clk32k and 154 * turning off the main oscillator; reverse on wakeup. 155 */ 156 if (slow_clock) { 157 slow_clock(); 158 break; 159 } else { 160 /* DEVELOPMENT ONLY */ 161 pr_info("AT91: PM - no slow clock mode yet ...\n"); 162 /* FALLTHROUGH leaving master clock alone */ 163 } 164 165 /* 166 * STANDBY mode has *all* drivers suspended; ignores irqs not 167 * marked as 'wakeup' event sources; and reduces DRAM power. 168 * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and 169 * nothing fancy done with main or cpu clocks. 170 */ 171 case PM_SUSPEND_STANDBY: 172 /* 173 * NOTE: the Wait-for-Interrupt instruction needs to be 174 * in icache so the SDRAM stays in self-refresh mode until 175 * the wakeup IRQ occurs. 176 */ 177 asm("b 1f; .align 5; 1:"); 178 asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ 179 at91_sys_write(AT91_SDRAMC_SRR, 1); /* self-refresh mode */ 180 /* fall though to next state */ 181 182 case PM_SUSPEND_ON: 183 asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */ 184 break; 185 186 default: 187 pr_debug("AT91: PM - bogus suspend state %d\n", state); 188 goto error; 189 } 190 191 pr_debug("AT91: PM - wakeup %08x\n", 192 at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); 193 194error: 195 target_state = PM_SUSPEND_ON; 196 at91_irq_resume(); 197 at91_gpio_resume(); 198 return 0; 199} 200 201 202static struct pm_ops at91_pm_ops ={ 203 .valid = at91_pm_valid_state, 204 .set_target = at91_pm_set_target, 205 .enter = at91_pm_enter, 206}; 207 208static int __init at91_pm_init(void) 209{ 210 printk("AT91: Power Management\n"); 211 212#ifdef CONFIG_AT91_PM_SLOW_CLOCK 213 /* REVISIT allocations of SRAM should be dynamically managed. 214 * FIQ handlers and other components will want SRAM/TCM too... 215 */ 216 slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K)); 217 memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz); 218#endif 219 220 /* Disable SDRAM low-power mode. Cannot be used with self-refresh. */ 221 at91_sys_write(AT91_SDRAMC_LPR, 0); 222 223 pm_set_ops(&at91_pm_ops); 224 225 return 0; 226} 227arch_initcall(at91_pm_init); 228