1/* longlong.h -- definitions for mixed size 32/64 bit arithmetic. 2 Note: I added some stuff for use with gnupg 3 4Copyright (C) 1991, 1992, 1993, 1994, 1996, 1998, 5 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. 6 7This file is free software; you can redistribute it and/or modify 8it under the terms of the GNU Lesser General Public License as published by 9the Free Software Foundation; either version 2.1 of the License, or (at your 10option) any later version. 11 12This file is distributed in the hope that it will be useful, but 13WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public 15License for more details. 16 17You should have received a copy of the GNU Library General Public License 18along with this file; see the file COPYING.LIB. If not, write to 19the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, 20MA 02111-1307, USA. */ 21 22/* You have to define the following before including this file: 23 24 UWtype -- An unsigned type, default type for operations (typically a "word") 25 UHWtype -- An unsigned type, at least half the size of UWtype. 26 UDWtype -- An unsigned type, at least twice as large a UWtype 27 W_TYPE_SIZE -- size in bits of UWtype 28 29 SItype, USItype -- Signed and unsigned 32 bit types. 30 DItype, UDItype -- Signed and unsigned 64 bit types. 31 32 On a 32 bit machine UWtype should typically be USItype; 33 on a 64 bit machine, UWtype should typically be UDItype. 34*/ 35 36#define __BITS4 (W_TYPE_SIZE / 4) 37#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2)) 38#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1)) 39#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2)) 40 41/* This is used to make sure no undesirable sharing between different libraries 42 that use this file takes place. */ 43#ifndef __MPN 44#define __MPN(x) __##x 45#endif 46 47/* Define auxiliary asm macros. 48 49 1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two 50 UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype 51 word product in HIGH_PROD and LOW_PROD. 52 53 2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a 54 UDWtype product. This is just a variant of umul_ppmm. 55 56 3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator, 57 denominator) divides a UDWtype, composed by the UWtype integers 58 HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient 59 in QUOTIENT and the remainder in REMAINDER. HIGH_NUMERATOR must be less 60 than DENOMINATOR for correct operation. If, in addition, the most 61 significant bit of DENOMINATOR must be 1, then the pre-processor symbol 62 UDIV_NEEDS_NORMALIZATION is defined to 1. 63 64 4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator, 65 denominator). Like udiv_qrnnd but the numbers are signed. The quotient 66 is rounded towards 0. 67 68 5) count_leading_zeros(count, x) counts the number of zero-bits from the 69 msb to the first non-zero bit in the UWtype X. This is the number of 70 steps X needs to be shifted left to set the msb. Undefined for X == 0, 71 unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value. 72 73 6) count_trailing_zeros(count, x) like count_leading_zeros, but counts 74 from the least significant end. 75 76 7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1, 77 high_addend_2, low_addend_2) adds two UWtype integers, composed by 78 HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2 79 respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow 80 (i.e. carry out) is not stored anywhere, and is lost. 81 82 8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend, 83 high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers, 84 composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and 85 LOW_SUBTRAHEND_2 respectively. The result is placed in HIGH_DIFFERENCE 86 and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere, 87 and is lost. 88 89 If any of these macros are left undefined for a particular CPU, 90 C macros are used. */ 91 92/* The CPUs come in alphabetical order below. 93 94 Please add support for more CPUs here, or improve the current support 95 for the CPUs below! */ 96 97#ifdef __riscos__ 98#pragma continue_after_hash_error 99#else /* !__riscos__ */ 100#if defined (__GNUC__) && !defined (NO_ASM) 101 102/* We sometimes need to clobber "cc" with gcc2, but that would not be 103 understood by gcc1. Use cpp to avoid major code duplication. */ 104#if __GNUC__ < 2 105#define __CLOBBER_CC 106#define __AND_CLOBBER_CC 107#else /* __GNUC__ >= 2 */ 108#define __CLOBBER_CC : "cc" 109#define __AND_CLOBBER_CC , "cc" 110#endif /* __GNUC__ < 2 */ 111 112 113/*************************************** 114 ************** A29K ***************** 115 ***************************************/ 116#if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32 117#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 118 __asm__ ("add %1,%4,%5\n" \ 119 "addc %0,%2,%3" \ 120 : "=r" ((USItype)(sh)), \ 121 "=&r" ((USItype)(sl)) \ 122 : "%r" ((USItype)(ah)), \ 123 "rI" ((USItype)(bh)), \ 124 "%r" ((USItype)(al)), \ 125 "rI" ((USItype)(bl))) 126#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 127 __asm__ ("sub %1,%4,%5\n" \ 128 "subc %0,%2,%3" \ 129 : "=r" ((USItype)(sh)), \ 130 "=&r" ((USItype)(sl)) \ 131 : "r" ((USItype)(ah)), \ 132 "rI" ((USItype)(bh)), \ 133 "r" ((USItype)(al)), \ 134 "rI" ((USItype)(bl))) 135#define umul_ppmm(xh, xl, m0, m1) \ 136 do { \ 137 USItype __m0 = (m0), __m1 = (m1); \ 138 __asm__ ("multiplu %0,%1,%2" \ 139 : "=r" ((USItype)(xl)) \ 140 : "r" (__m0), \ 141 "r" (__m1)); \ 142 __asm__ ("multmu %0,%1,%2" \ 143 : "=r" ((USItype)(xh)) \ 144 : "r" (__m0), \ 145 "r" (__m1)); \ 146 } while (0) 147#define udiv_qrnnd(q, r, n1, n0, d) \ 148 __asm__ ("dividu %0,%3,%4" \ 149 : "=r" ((USItype)(q)), \ 150 "=q" ((USItype)(r)) \ 151 : "1" ((USItype)(n1)), \ 152 "r" ((USItype)(n0)), \ 153 "r" ((USItype)(d))) 154#define count_leading_zeros(count, x) \ 155 __asm__ ("clz %0,%1" \ 156 : "=r" ((USItype)(count)) \ 157 : "r" ((USItype)(x))) 158#define COUNT_LEADING_ZEROS_0 32 159#endif /* __a29k__ */ 160 161 162#if defined (__alpha) && W_TYPE_SIZE == 64 163#define umul_ppmm(ph, pl, m0, m1) \ 164 do { \ 165 UDItype __m0 = (m0), __m1 = (m1); \ 166 __asm__ ("umulh %r1,%2,%0" \ 167 : "=r" ((UDItype) ph) \ 168 : "%rJ" (__m0), \ 169 "rI" (__m1)); \ 170 (pl) = __m0 * __m1; \ 171 } while (0) 172#define UMUL_TIME 46 173#ifndef LONGLONG_STANDALONE 174#define udiv_qrnnd(q, r, n1, n0, d) \ 175 do { UDItype __r; \ 176 (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \ 177 (r) = __r; \ 178 } while (0) 179extern UDItype __udiv_qrnnd (); 180#define UDIV_TIME 220 181#endif /* LONGLONG_STANDALONE */ 182#endif /* __alpha */ 183 184/*************************************** 185 ************** ARM ****************** 186 ***************************************/ 187#if defined (__arm__) && W_TYPE_SIZE == 32 188#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 189 __asm__ ("adds %1, %4, %5\n" \ 190 "adc %0, %2, %3" \ 191 : "=r" ((USItype)(sh)), \ 192 "=&r" ((USItype)(sl)) \ 193 : "%r" ((USItype)(ah)), \ 194 "rI" ((USItype)(bh)), \ 195 "%r" ((USItype)(al)), \ 196 "rI" ((USItype)(bl))) 197#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 198 __asm__ ("subs %1, %4, %5\n" \ 199 "sbc %0, %2, %3" \ 200 : "=r" ((USItype)(sh)), \ 201 "=&r" ((USItype)(sl)) \ 202 : "r" ((USItype)(ah)), \ 203 "rI" ((USItype)(bh)), \ 204 "r" ((USItype)(al)), \ 205 "rI" ((USItype)(bl))) 206#if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__ 207#define umul_ppmm(xh, xl, a, b) \ 208 __asm__ ("%@ Inlined umul_ppmm\n" \ 209 "mov %|r0, %2, lsr #16 @ AAAA\n" \ 210 "mov %|r2, %3, lsr #16 @ BBBB\n" \ 211 "bic %|r1, %2, %|r0, lsl #16 @ aaaa\n" \ 212 "bic %0, %3, %|r2, lsl #16 @ bbbb\n" \ 213 "mul %1, %|r1, %|r2 @ aaaa * BBBB\n" \ 214 "mul %|r2, %|r0, %|r2 @ AAAA * BBBB\n" \ 215 "mul %|r1, %0, %|r1 @ aaaa * bbbb\n" \ 216 "mul %0, %|r0, %0 @ AAAA * bbbb\n" \ 217 "adds %|r0, %1, %0 @ central sum\n" \ 218 "addcs %|r2, %|r2, #65536\n" \ 219 "adds %1, %|r1, %|r0, lsl #16\n" \ 220 "adc %0, %|r2, %|r0, lsr #16" \ 221 : "=&r" ((USItype)(xh)), \ 222 "=r" ((USItype)(xl)) \ 223 : "r" ((USItype)(a)), \ 224 "r" ((USItype)(b)) \ 225 : "r0", "r1", "r2") 226#else 227#define umul_ppmm(xh, xl, a, b) \ 228 __asm__ ("%@ Inlined umul_ppmm\n" \ 229 "umull %r1, %r0, %r2, %r3" \ 230 : "=&r" ((USItype)(xh)), \ 231 "=r" ((USItype)(xl)) \ 232 : "r" ((USItype)(a)), \ 233 "r" ((USItype)(b)) \ 234 : "r0", "r1") 235#endif 236#define UMUL_TIME 20 237#define UDIV_TIME 100 238#endif /* __arm__ */ 239 240/*************************************** 241 ************** CLIPPER ************** 242 ***************************************/ 243#if defined (__clipper__) && W_TYPE_SIZE == 32 244#define umul_ppmm(w1, w0, u, v) \ 245 ({union {UDItype __ll; \ 246 struct {USItype __l, __h;} __i; \ 247 } __xx; \ 248 __asm__ ("mulwux %2,%0" \ 249 : "=r" (__xx.__ll) \ 250 : "%0" ((USItype)(u)), \ 251 "r" ((USItype)(v))); \ 252 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;}) 253#define smul_ppmm(w1, w0, u, v) \ 254 ({union {DItype __ll; \ 255 struct {SItype __l, __h;} __i; \ 256 } __xx; \ 257 __asm__ ("mulwx %2,%0" \ 258 : "=r" (__xx.__ll) \ 259 : "%0" ((SItype)(u)), \ 260 "r" ((SItype)(v))); \ 261 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;}) 262#define __umulsidi3(u, v) \ 263 ({UDItype __w; \ 264 __asm__ ("mulwux %2,%0" \ 265 : "=r" (__w) \ 266 : "%0" ((USItype)(u)), \ 267 "r" ((USItype)(v))); \ 268 __w; }) 269#endif /* __clipper__ */ 270 271 272/*************************************** 273 ************** GMICRO *************** 274 ***************************************/ 275#if defined (__gmicro__) && W_TYPE_SIZE == 32 276#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 277 __asm__ ("add.w %5,%1\n" \ 278 "addx %3,%0" \ 279 : "=g" ((USItype)(sh)), \ 280 "=&g" ((USItype)(sl)) \ 281 : "%0" ((USItype)(ah)), \ 282 "g" ((USItype)(bh)), \ 283 "%1" ((USItype)(al)), \ 284 "g" ((USItype)(bl))) 285#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 286 __asm__ ("sub.w %5,%1\n" \ 287 "subx %3,%0" \ 288 : "=g" ((USItype)(sh)), \ 289 "=&g" ((USItype)(sl)) \ 290 : "0" ((USItype)(ah)), \ 291 "g" ((USItype)(bh)), \ 292 "1" ((USItype)(al)), \ 293 "g" ((USItype)(bl))) 294#define umul_ppmm(ph, pl, m0, m1) \ 295 __asm__ ("mulx %3,%0,%1" \ 296 : "=g" ((USItype)(ph)), \ 297 "=r" ((USItype)(pl)) \ 298 : "%0" ((USItype)(m0)), \ 299 "g" ((USItype)(m1))) 300#define udiv_qrnnd(q, r, nh, nl, d) \ 301 __asm__ ("divx %4,%0,%1" \ 302 : "=g" ((USItype)(q)), \ 303 "=r" ((USItype)(r)) \ 304 : "1" ((USItype)(nh)), \ 305 "0" ((USItype)(nl)), \ 306 "g" ((USItype)(d))) 307#define count_leading_zeros(count, x) \ 308 __asm__ ("bsch/1 %1,%0" \ 309 : "=g" (count) \ 310 : "g" ((USItype)(x)), \ 311 "0" ((USItype)0)) 312#endif 313 314 315/*************************************** 316 ************** HPPA ***************** 317 ***************************************/ 318#if defined (__hppa) && W_TYPE_SIZE == 32 319#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 320 __asm__ (" add %4,%5,%1\n" \ 321 " addc %2,%3,%0" \ 322 : "=r" ((USItype)(sh)), \ 323 "=&r" ((USItype)(sl)) \ 324 : "%rM" ((USItype)(ah)), \ 325 "rM" ((USItype)(bh)), \ 326 "%rM" ((USItype)(al)), \ 327 "rM" ((USItype)(bl))) 328#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 329 __asm__ (" sub %4,%5,%1\n" \ 330 " subb %2,%3,%0" \ 331 : "=r" ((USItype)(sh)), \ 332 "=&r" ((USItype)(sl)) \ 333 : "rM" ((USItype)(ah)), \ 334 "rM" ((USItype)(bh)), \ 335 "rM" ((USItype)(al)), \ 336 "rM" ((USItype)(bl))) 337#if defined (_PA_RISC1_1) 338#define umul_ppmm(wh, wl, u, v) \ 339 do { \ 340 union {UDItype __ll; \ 341 struct {USItype __h, __l;} __i; \ 342 } __xx; \ 343 __asm__ (" xmpyu %1,%2,%0" \ 344 : "=*f" (__xx.__ll) \ 345 : "*f" ((USItype)(u)), \ 346 "*f" ((USItype)(v))); \ 347 (wh) = __xx.__i.__h; \ 348 (wl) = __xx.__i.__l; \ 349 } while (0) 350#define UMUL_TIME 8 351#define UDIV_TIME 60 352#else 353#define UMUL_TIME 40 354#define UDIV_TIME 80 355#endif 356#ifndef LONGLONG_STANDALONE 357#define udiv_qrnnd(q, r, n1, n0, d) \ 358 do { USItype __r; \ 359 (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \ 360 (r) = __r; \ 361 } while (0) 362extern USItype __udiv_qrnnd (); 363#endif /* LONGLONG_STANDALONE */ 364#define count_leading_zeros(count, x) \ 365 do { \ 366 USItype __tmp; \ 367 __asm__ ( \ 368 " ldi 1,%0 \n" \ 369 " extru,= %1,15,16,%%r0 ; Bits 31..16 zero? \n" \ 370 " extru,tr %1,15,16,%1 ; No. Shift down, skip add.\n" \ 371 " ldo 16(%0),%0 ; Yes. Perform add. \n" \ 372 " extru,= %1,23,8,%%r0 ; Bits 15..8 zero? \n" \ 373 " extru,tr %1,23,8,%1 ; No. Shift down, skip add.\n" \ 374 " ldo 8(%0),%0 ; Yes. Perform add. \n" \ 375 " extru,= %1,27,4,%%r0 ; Bits 7..4 zero? \n" \ 376 " extru,tr %1,27,4,%1 ; No. Shift down, skip add.\n" \ 377 " ldo 4(%0),%0 ; Yes. Perform add. \n" \ 378 " extru,= %1,29,2,%%r0 ; Bits 3..2 zero? \n" \ 379 " extru,tr %1,29,2,%1 ; No. Shift down, skip add.\n" \ 380 " ldo 2(%0),%0 ; Yes. Perform add. \n" \ 381 " extru %1,30,1,%1 ; Extract bit 1. \n" \ 382 " sub %0,%1,%0 ; Subtract it. " \ 383 : "=r" (count), "=r" (__tmp) : "1" (x)); \ 384 } while (0) 385#endif /* hppa */ 386 387 388/*************************************** 389 ************** I370 ***************** 390 ***************************************/ 391#if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32 392#define umul_ppmm(xh, xl, m0, m1) \ 393 do { \ 394 union {UDItype __ll; \ 395 struct {USItype __h, __l;} __i; \ 396 } __xx; \ 397 USItype __m0 = (m0), __m1 = (m1); \ 398 __asm__ ("mr %0,%3" \ 399 : "=r" (__xx.__i.__h), \ 400 "=r" (__xx.__i.__l) \ 401 : "%1" (__m0), \ 402 "r" (__m1)); \ 403 (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \ 404 (xh) += ((((SItype) __m0 >> 31) & __m1) \ 405 + (((SItype) __m1 >> 31) & __m0)); \ 406 } while (0) 407#define smul_ppmm(xh, xl, m0, m1) \ 408 do { \ 409 union {DItype __ll; \ 410 struct {USItype __h, __l;} __i; \ 411 } __xx; \ 412 __asm__ ("mr %0,%3" \ 413 : "=r" (__xx.__i.__h), \ 414 "=r" (__xx.__i.__l) \ 415 : "%1" (m0), \ 416 "r" (m1)); \ 417 (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \ 418 } while (0) 419#define sdiv_qrnnd(q, r, n1, n0, d) \ 420 do { \ 421 union {DItype __ll; \ 422 struct {USItype __h, __l;} __i; \ 423 } __xx; \ 424 __xx.__i.__h = n1; __xx.__i.__l = n0; \ 425 __asm__ ("dr %0,%2" \ 426 : "=r" (__xx.__ll) \ 427 : "0" (__xx.__ll), "r" (d)); \ 428 (q) = __xx.__i.__l; (r) = __xx.__i.__h; \ 429 } while (0) 430#endif 431 432 433/*************************************** 434 ************** I386 ***************** 435 ***************************************/ 436#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32 437#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 438 __asm__ ("addl %5,%1\n" \ 439 "adcl %3,%0" \ 440 : "=r" ((USItype)(sh)), \ 441 "=&r" ((USItype)(sl)) \ 442 : "%0" ((USItype)(ah)), \ 443 "g" ((USItype)(bh)), \ 444 "%1" ((USItype)(al)), \ 445 "g" ((USItype)(bl))) 446#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 447 __asm__ ("subl %5,%1\n" \ 448 "sbbl %3,%0" \ 449 : "=r" ((USItype)(sh)), \ 450 "=&r" ((USItype)(sl)) \ 451 : "0" ((USItype)(ah)), \ 452 "g" ((USItype)(bh)), \ 453 "1" ((USItype)(al)), \ 454 "g" ((USItype)(bl))) 455#define umul_ppmm(w1, w0, u, v) \ 456 __asm__ ("mull %3" \ 457 : "=a" ((USItype)(w0)), \ 458 "=d" ((USItype)(w1)) \ 459 : "%0" ((USItype)(u)), \ 460 "rm" ((USItype)(v))) 461#define udiv_qrnnd(q, r, n1, n0, d) \ 462 __asm__ ("divl %4" \ 463 : "=a" ((USItype)(q)), \ 464 "=d" ((USItype)(r)) \ 465 : "0" ((USItype)(n0)), \ 466 "1" ((USItype)(n1)), \ 467 "rm" ((USItype)(d))) 468#define count_leading_zeros(count, x) \ 469 do { \ 470 USItype __cbtmp; \ 471 __asm__ ("bsrl %1,%0" \ 472 : "=r" (__cbtmp) : "rm" ((USItype)(x))); \ 473 (count) = __cbtmp ^ 31; \ 474 } while (0) 475#define count_trailing_zeros(count, x) \ 476 __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x))) 477#ifndef UMUL_TIME 478#define UMUL_TIME 40 479#endif 480#ifndef UDIV_TIME 481#define UDIV_TIME 40 482#endif 483#endif /* 80x86 */ 484 485 486/*************************************** 487 ************** I860 ***************** 488 ***************************************/ 489#if defined (__i860__) && W_TYPE_SIZE == 32 490#define rshift_rhlc(r,h,l,c) \ 491 __asm__ ("shr %3,r0,r0\n" \ 492 "shrd %1,%2,%0" \ 493 "=r" (r) : "r" (h), "r" (l), "rn" (c)) 494#endif /* i860 */ 495 496/*************************************** 497 ************** I960 ***************** 498 ***************************************/ 499#if defined (__i960__) && W_TYPE_SIZE == 32 500#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 501 __asm__ ("cmpo 1,0\n" \ 502 "addc %5,%4,%1\n" \ 503 "addc %3,%2,%0" \ 504 : "=r" ((USItype)(sh)), \ 505 "=&r" ((USItype)(sl)) \ 506 : "%dI" ((USItype)(ah)), \ 507 "dI" ((USItype)(bh)), \ 508 "%dI" ((USItype)(al)), \ 509 "dI" ((USItype)(bl))) 510#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 511 __asm__ ("cmpo 0,0\n" \ 512 "subc %5,%4,%1\n" \ 513 "subc %3,%2,%0" \ 514 : "=r" ((USItype)(sh)), \ 515 "=&r" ((USItype)(sl)) \ 516 : "dI" ((USItype)(ah)), \ 517 "dI" ((USItype)(bh)), \ 518 "dI" ((USItype)(al)), \ 519 "dI" ((USItype)(bl))) 520#define umul_ppmm(w1, w0, u, v) \ 521 ({union {UDItype __ll; \ 522 struct {USItype __l, __h;} __i; \ 523 } __xx; \ 524 __asm__ ("emul %2,%1,%0" \ 525 : "=d" (__xx.__ll) \ 526 : "%dI" ((USItype)(u)), \ 527 "dI" ((USItype)(v))); \ 528 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;}) 529#define __umulsidi3(u, v) \ 530 ({UDItype __w; \ 531 __asm__ ("emul %2,%1,%0" \ 532 : "=d" (__w) \ 533 : "%dI" ((USItype)(u)), \ 534 "dI" ((USItype)(v))); \ 535 __w; }) 536#define udiv_qrnnd(q, r, nh, nl, d) \ 537 do { \ 538 union {UDItype __ll; \ 539 struct {USItype __l, __h;} __i; \ 540 } __nn; \ 541 __nn.__i.__h = (nh); __nn.__i.__l = (nl); \ 542 __asm__ ("ediv %d,%n,%0" \ 543 : "=d" (__rq.__ll) \ 544 : "dI" (__nn.__ll), \ 545 "dI" ((USItype)(d))); \ 546 (r) = __rq.__i.__l; (q) = __rq.__i.__h; \ 547 } while (0) 548#define count_leading_zeros(count, x) \ 549 do { \ 550 USItype __cbtmp; \ 551 __asm__ ("scanbit %1,%0" \ 552 : "=r" (__cbtmp) \ 553 : "r" ((USItype)(x))); \ 554 (count) = __cbtmp ^ 31; \ 555 } while (0) 556#define COUNT_LEADING_ZEROS_0 (-32) /* sic */ 557#if defined (__i960mx) /* what is the proper symbol to test??? */ 558#define rshift_rhlc(r,h,l,c) \ 559 do { \ 560 union {UDItype __ll; \ 561 struct {USItype __l, __h;} __i; \ 562 } __nn; \ 563 __nn.__i.__h = (h); __nn.__i.__l = (l); \ 564 __asm__ ("shre %2,%1,%0" \ 565 : "=d" (r) : "dI" (__nn.__ll), "dI" (c)); \ 566 } 567#endif /* i960mx */ 568#endif /* i960 */ 569 570 571/*************************************** 572 ************** 68000 **************** 573 ***************************************/ 574#if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32 575#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 576 __asm__ ("add%.l %5,%1\n" \ 577 "addx%.l %3,%0" \ 578 : "=d" ((USItype)(sh)), \ 579 "=&d" ((USItype)(sl)) \ 580 : "%0" ((USItype)(ah)), \ 581 "d" ((USItype)(bh)), \ 582 "%1" ((USItype)(al)), \ 583 "g" ((USItype)(bl))) 584#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 585 __asm__ ("sub%.l %5,%1\n" \ 586 "subx%.l %3,%0" \ 587 : "=d" ((USItype)(sh)), \ 588 "=&d" ((USItype)(sl)) \ 589 : "0" ((USItype)(ah)), \ 590 "d" ((USItype)(bh)), \ 591 "1" ((USItype)(al)), \ 592 "g" ((USItype)(bl))) 593#if (defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) 594#define umul_ppmm(w1, w0, u, v) \ 595 __asm__ ("mulu%.l %3,%1:%0" \ 596 : "=d" ((USItype)(w0)), \ 597 "=d" ((USItype)(w1)) \ 598 : "%0" ((USItype)(u)), \ 599 "dmi" ((USItype)(v))) 600#define UMUL_TIME 45 601#define udiv_qrnnd(q, r, n1, n0, d) \ 602 __asm__ ("divu%.l %4,%1:%0" \ 603 : "=d" ((USItype)(q)), \ 604 "=d" ((USItype)(r)) \ 605 : "0" ((USItype)(n0)), \ 606 "1" ((USItype)(n1)), \ 607 "dmi" ((USItype)(d))) 608#define UDIV_TIME 90 609#define sdiv_qrnnd(q, r, n1, n0, d) \ 610 __asm__ ("divs%.l %4,%1:%0" \ 611 : "=d" ((USItype)(q)), \ 612 "=d" ((USItype)(r)) \ 613 : "0" ((USItype)(n0)), \ 614 "1" ((USItype)(n1)), \ 615 "dmi" ((USItype)(d))) 616#define count_leading_zeros(count, x) \ 617 __asm__ ("bfffo %1{%b2:%b2},%0" \ 618 : "=d" ((USItype)(count)) \ 619 : "od" ((USItype)(x)), "n" (0)) 620#define COUNT_LEADING_ZEROS_0 32 621#else /* not mc68020 */ 622#define umul_ppmm(xh, xl, a, b) \ 623 do { USItype __umul_tmp1, __umul_tmp2; \ 624 __asm__ ("| Inlined umul_ppmm \n" \ 625 " move%.l %5,%3 \n" \ 626 " move%.l %2,%0 \n" \ 627 " move%.w %3,%1 \n" \ 628 " swap %3 \n" \ 629 " swap %0 \n" \ 630 " mulu %2,%1 \n" \ 631 " mulu %3,%0 \n" \ 632 " mulu %2,%3 \n" \ 633 " swap %2 \n" \ 634 " mulu %5,%2 \n" \ 635 " add%.l %3,%2 \n" \ 636 " jcc 1f \n" \ 637 " add%.l %#0x10000,%0 \n" \ 638 "1: move%.l %2,%3 \n" \ 639 " clr%.w %2 \n" \ 640 " swap %2 \n" \ 641 " swap %3 \n" \ 642 " clr%.w %3 \n" \ 643 " add%.l %3,%1 \n" \ 644 " addx%.l %2,%0 \n" \ 645 " | End inlined umul_ppmm" \ 646 : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)), \ 647 "=d" (__umul_tmp1), "=&d" (__umul_tmp2) \ 648 : "%2" ((USItype)(a)), "d" ((USItype)(b))); \ 649 } while (0) 650#define UMUL_TIME 100 651#define UDIV_TIME 400 652#endif /* not mc68020 */ 653#endif /* mc68000 */ 654 655 656/*************************************** 657 ************** 88000 **************** 658 ***************************************/ 659#if defined (__m88000__) && W_TYPE_SIZE == 32 660#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 661 __asm__ ("addu.co %1,%r4,%r5\n" \ 662 "addu.ci %0,%r2,%r3" \ 663 : "=r" ((USItype)(sh)), \ 664 "=&r" ((USItype)(sl)) \ 665 : "%rJ" ((USItype)(ah)), \ 666 "rJ" ((USItype)(bh)), \ 667 "%rJ" ((USItype)(al)), \ 668 "rJ" ((USItype)(bl))) 669#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 670 __asm__ ("subu.co %1,%r4,%r5\n" \ 671 "subu.ci %0,%r2,%r3" \ 672 : "=r" ((USItype)(sh)), \ 673 "=&r" ((USItype)(sl)) \ 674 : "rJ" ((USItype)(ah)), \ 675 "rJ" ((USItype)(bh)), \ 676 "rJ" ((USItype)(al)), \ 677 "rJ" ((USItype)(bl))) 678#define count_leading_zeros(count, x) \ 679 do { \ 680 USItype __cbtmp; \ 681 __asm__ ("ff1 %0,%1" \ 682 : "=r" (__cbtmp) \ 683 : "r" ((USItype)(x))); \ 684 (count) = __cbtmp ^ 31; \ 685 } while (0) 686#define COUNT_LEADING_ZEROS_0 63 /* sic */ 687#if defined (__m88110__) 688#define umul_ppmm(wh, wl, u, v) \ 689 do { \ 690 union {UDItype __ll; \ 691 struct {USItype __h, __l;} __i; \ 692 } __x; \ 693 __asm__ ("mulu.d %0,%1,%2" : "=r" (__x.__ll) : "r" (u), "r" (v)); \ 694 (wh) = __x.__i.__h; \ 695 (wl) = __x.__i.__l; \ 696 } while (0) 697#define udiv_qrnnd(q, r, n1, n0, d) \ 698 ({union {UDItype __ll; \ 699 struct {USItype __h, __l;} __i; \ 700 } __x, __q; \ 701 __x.__i.__h = (n1); __x.__i.__l = (n0); \ 702 __asm__ ("divu.d %0,%1,%2" \ 703 : "=r" (__q.__ll) : "r" (__x.__ll), "r" (d)); \ 704 (r) = (n0) - __q.__l * (d); (q) = __q.__l; }) 705#define UMUL_TIME 5 706#define UDIV_TIME 25 707#else 708#define UMUL_TIME 17 709#define UDIV_TIME 150 710#endif /* __m88110__ */ 711#endif /* __m88000__ */ 712 713/*************************************** 714 ************** MIPS ***************** 715 ***************************************/ 716#if defined (__mips__) && W_TYPE_SIZE == 32 717#if (__GNUC__ >= 5) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4) 718#define umul_ppmm(w1, w0, u, v) \ 719 do { \ 720 UDItype _r; \ 721 _r = (UDItype) u * v; \ 722 (w1) = _r >> 32; \ 723 (w0) = (USItype) _r; \ 724 } while (0) 725#elif __GNUC__ > 2 || __GNUC_MINOR__ >= 7 726#define umul_ppmm(w1, w0, u, v) \ 727 __asm__ ("multu %2,%3" \ 728 : "=l" ((USItype)(w0)), \ 729 "=h" ((USItype)(w1)) \ 730 : "d" ((USItype)(u)), \ 731 "d" ((USItype)(v))) 732#else 733#define umul_ppmm(w1, w0, u, v) \ 734 __asm__ ("multu %2,%3 \n" \ 735 "mflo %0 \n" \ 736 "mfhi %1" \ 737 : "=d" ((USItype)(w0)), \ 738 "=d" ((USItype)(w1)) \ 739 : "d" ((USItype)(u)), \ 740 "d" ((USItype)(v))) 741#endif 742#define UMUL_TIME 10 743#define UDIV_TIME 100 744#endif /* __mips__ */ 745 746/*************************************** 747 ************** MIPS/64 ************** 748 ***************************************/ 749#if (defined (__mips) && __mips >= 3) && W_TYPE_SIZE == 64 750#if (__GNUC__ >= 5) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4) 751typedef unsigned int UTItype __attribute__ ((mode (TI))); 752#define umul_ppmm(w1, w0, u, v) \ 753 do { \ 754 UTItype _r; \ 755 _r = (UTItype) u * v; \ 756 (w1) = _r >> 64; \ 757 (w0) = (UDItype) _r; \ 758 } while (0) 759#elif __GNUC__ > 2 || __GNUC_MINOR__ >= 7 760#define umul_ppmm(w1, w0, u, v) \ 761 __asm__ ("dmultu %2,%3" \ 762 : "=l" ((UDItype)(w0)), \ 763 "=h" ((UDItype)(w1)) \ 764 : "d" ((UDItype)(u)), \ 765 "d" ((UDItype)(v))) 766#else 767#define umul_ppmm(w1, w0, u, v) \ 768 __asm__ ("dmultu %2,%3 \n" \ 769 "mflo %0 \n" \ 770 "mfhi %1" \ 771 : "=d" ((UDItype)(w0)), \ 772 "=d" ((UDItype)(w1)) \ 773 : "d" ((UDItype)(u)), \ 774 "d" ((UDItype)(v))) 775#endif 776#define UMUL_TIME 20 777#define UDIV_TIME 140 778#endif /* __mips__ */ 779 780 781/*************************************** 782 ************** 32000 **************** 783 ***************************************/ 784#if defined (__ns32000__) && W_TYPE_SIZE == 32 785#define umul_ppmm(w1, w0, u, v) \ 786 ({union {UDItype __ll; \ 787 struct {USItype __l, __h;} __i; \ 788 } __xx; \ 789 __asm__ ("meid %2,%0" \ 790 : "=g" (__xx.__ll) \ 791 : "%0" ((USItype)(u)), \ 792 "g" ((USItype)(v))); \ 793 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;}) 794#define __umulsidi3(u, v) \ 795 ({UDItype __w; \ 796 __asm__ ("meid %2,%0" \ 797 : "=g" (__w) \ 798 : "%0" ((USItype)(u)), \ 799 "g" ((USItype)(v))); \ 800 __w; }) 801#define udiv_qrnnd(q, r, n1, n0, d) \ 802 ({union {UDItype __ll; \ 803 struct {USItype __l, __h;} __i; \ 804 } __xx; \ 805 __xx.__i.__h = (n1); __xx.__i.__l = (n0); \ 806 __asm__ ("deid %2,%0" \ 807 : "=g" (__xx.__ll) \ 808 : "0" (__xx.__ll), \ 809 "g" ((USItype)(d))); \ 810 (r) = __xx.__i.__l; (q) = __xx.__i.__h; }) 811#define count_trailing_zeros(count,x) \ 812 do { 813 __asm__ ("ffsd %2,%0" \ 814 : "=r" ((USItype) (count)) \ 815 : "0" ((USItype) 0), \ 816 "r" ((USItype) (x))); \ 817 } while (0) 818#endif /* __ns32000__ */ 819 820 821/*************************************** 822 ************** PPC ****************** 823 ***************************************/ 824#if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32 825#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 826 do { \ 827 if (__builtin_constant_p (bh) && (bh) == 0) \ 828 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \ 829 : "=r" ((USItype)(sh)), \ 830 "=&r" ((USItype)(sl)) \ 831 : "%r" ((USItype)(ah)), \ 832 "%r" ((USItype)(al)), \ 833 "rI" ((USItype)(bl))); \ 834 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \ 835 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \ 836 : "=r" ((USItype)(sh)), \ 837 "=&r" ((USItype)(sl)) \ 838 : "%r" ((USItype)(ah)), \ 839 "%r" ((USItype)(al)), \ 840 "rI" ((USItype)(bl))); \ 841 else \ 842 __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \ 843 : "=r" ((USItype)(sh)), \ 844 "=&r" ((USItype)(sl)) \ 845 : "%r" ((USItype)(ah)), \ 846 "r" ((USItype)(bh)), \ 847 "%r" ((USItype)(al)), \ 848 "rI" ((USItype)(bl))); \ 849 } while (0) 850#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 851 do { \ 852 if (__builtin_constant_p (ah) && (ah) == 0) \ 853 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \ 854 : "=r" ((USItype)(sh)), \ 855 "=&r" ((USItype)(sl)) \ 856 : "r" ((USItype)(bh)), \ 857 "rI" ((USItype)(al)), \ 858 "r" ((USItype)(bl))); \ 859 else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0) \ 860 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \ 861 : "=r" ((USItype)(sh)), \ 862 "=&r" ((USItype)(sl)) \ 863 : "r" ((USItype)(bh)), \ 864 "rI" ((USItype)(al)), \ 865 "r" ((USItype)(bl))); \ 866 else if (__builtin_constant_p (bh) && (bh) == 0) \ 867 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \ 868 : "=r" ((USItype)(sh)), \ 869 "=&r" ((USItype)(sl)) \ 870 : "r" ((USItype)(ah)), \ 871 "rI" ((USItype)(al)), \ 872 "r" ((USItype)(bl))); \ 873 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \ 874 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \ 875 : "=r" ((USItype)(sh)), \ 876 "=&r" ((USItype)(sl)) \ 877 : "r" ((USItype)(ah)), \ 878 "rI" ((USItype)(al)), \ 879 "r" ((USItype)(bl))); \ 880 else \ 881 __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \ 882 : "=r" ((USItype)(sh)), \ 883 "=&r" ((USItype)(sl)) \ 884 : "r" ((USItype)(ah)), \ 885 "r" ((USItype)(bh)), \ 886 "rI" ((USItype)(al)), \ 887 "r" ((USItype)(bl))); \ 888 } while (0) 889#define count_leading_zeros(count, x) \ 890 __asm__ ("{cntlz|cntlzw} %0,%1" \ 891 : "=r" ((USItype)(count)) \ 892 : "r" ((USItype)(x))) 893#define COUNT_LEADING_ZEROS_0 32 894#if defined (_ARCH_PPC) 895#define umul_ppmm(ph, pl, m0, m1) \ 896 do { \ 897 USItype __m0 = (m0), __m1 = (m1); \ 898 __asm__ ("mulhwu %0,%1,%2" \ 899 : "=r" ((USItype) ph) \ 900 : "%r" (__m0), \ 901 "r" (__m1)); \ 902 (pl) = __m0 * __m1; \ 903 } while (0) 904#define UMUL_TIME 15 905#define smul_ppmm(ph, pl, m0, m1) \ 906 do { \ 907 SItype __m0 = (m0), __m1 = (m1); \ 908 __asm__ ("mulhw %0,%1,%2" \ 909 : "=r" ((SItype) ph) \ 910 : "%r" (__m0), \ 911 "r" (__m1)); \ 912 (pl) = __m0 * __m1; \ 913 } while (0) 914#define SMUL_TIME 14 915#define UDIV_TIME 120 916#else 917#define umul_ppmm(xh, xl, m0, m1) \ 918 do { \ 919 USItype __m0 = (m0), __m1 = (m1); \ 920 __asm__ ("mul %0,%2,%3" \ 921 : "=r" ((USItype)(xh)), \ 922 "=q" ((USItype)(xl)) \ 923 : "r" (__m0), \ 924 "r" (__m1)); \ 925 (xh) += ((((SItype) __m0 >> 31) & __m1) \ 926 + (((SItype) __m1 >> 31) & __m0)); \ 927 } while (0) 928#define UMUL_TIME 8 929#define smul_ppmm(xh, xl, m0, m1) \ 930 __asm__ ("mul %0,%2,%3" \ 931 : "=r" ((SItype)(xh)), \ 932 "=q" ((SItype)(xl)) \ 933 : "r" (m0), \ 934 "r" (m1)) 935#define SMUL_TIME 4 936#define sdiv_qrnnd(q, r, nh, nl, d) \ 937 __asm__ ("div %0,%2,%4" \ 938 : "=r" ((SItype)(q)), "=q" ((SItype)(r)) \ 939 : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d))) 940#define UDIV_TIME 100 941#endif 942#endif /* Power architecture variants. */ 943 944/* Powerpc 64 bit support taken from gmp-4.1.2. */ 945/* We should test _IBMR2 here when we add assembly support for the system 946 vendor compilers. */ 947#if 0 /* Not yet enabled because we don't have hardware for a test. */ 948#if (defined (_ARCH_PPC) || defined (__powerpc__)) && W_TYPE_SIZE == 64 949#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 950 do { \ 951 if (__builtin_constant_p (bh) && (bh) == 0) \ 952 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \ 953 : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ 954 else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \ 955 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \ 956 : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\ 957 else \ 958 __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \ 959 : "=r" (sh), "=&r" (sl) \ 960 : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl)); \ 961 } while (0) 962#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 963 do { \ 964 if (__builtin_constant_p (ah) && (ah) == 0) \ 965 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \ 966 : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ 967 else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0) \ 968 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \ 969 : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\ 970 else if (__builtin_constant_p (bh) && (bh) == 0) \ 971 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \ 972 : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ 973 else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0) \ 974 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \ 975 : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\ 976 else \ 977 __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \ 978 : "=r" (sh), "=&r" (sl) \ 979 : "r" (ah), "r" (bh), "rI" (al), "r" (bl)); \ 980 } while (0) 981#define count_leading_zeros(count, x) \ 982 __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x)) 983#define COUNT_LEADING_ZEROS_0 64 984#define umul_ppmm(ph, pl, m0, m1) \ 985 do { \ 986 UDItype __m0 = (m0), __m1 = (m1); \ 987 __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ 988 (pl) = __m0 * __m1; \ 989 } while (0) 990#define UMUL_TIME 15 991#define smul_ppmm(ph, pl, m0, m1) \ 992 do { \ 993 DItype __m0 = (m0), __m1 = (m1); \ 994 __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1)); \ 995 (pl) = __m0 * __m1; \ 996 } while (0) 997#define SMUL_TIME 14 /* ??? */ 998#define UDIV_TIME 120 /* ??? */ 999#endif /* 64-bit PowerPC. */ 1000#endif /* if 0 */ 1001 1002/*************************************** 1003 ************** PYR ****************** 1004 ***************************************/ 1005#if defined (__pyr__) && W_TYPE_SIZE == 32 1006#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 1007 __asm__ ("addw %5,%1 \n" \ 1008 "addwc %3,%0" \ 1009 : "=r" ((USItype)(sh)), \ 1010 "=&r" ((USItype)(sl)) \ 1011 : "%0" ((USItype)(ah)), \ 1012 "g" ((USItype)(bh)), \ 1013 "%1" ((USItype)(al)), \ 1014 "g" ((USItype)(bl))) 1015#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 1016 __asm__ ("subw %5,%1 \n" \ 1017 "subwb %3,%0" \ 1018 : "=r" ((USItype)(sh)), \ 1019 "=&r" ((USItype)(sl)) \ 1020 : "0" ((USItype)(ah)), \ 1021 "g" ((USItype)(bh)), \ 1022 "1" ((USItype)(al)), \ 1023 "g" ((USItype)(bl))) 1024/* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP. */ 1025#define umul_ppmm(w1, w0, u, v) \ 1026 ({union {UDItype __ll; \ 1027 struct {USItype __h, __l;} __i; \ 1028 } __xx; \ 1029 __asm__ ("movw %1,%R0 \n" \ 1030 "uemul %2,%0" \ 1031 : "=&r" (__xx.__ll) \ 1032 : "g" ((USItype) (u)), \ 1033 "g" ((USItype)(v))); \ 1034 (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;}) 1035#endif /* __pyr__ */ 1036 1037 1038/*************************************** 1039 ************** RT/ROMP ************** 1040 ***************************************/ 1041#if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32 1042#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 1043 __asm__ ("a %1,%5 \n" \ 1044 "ae %0,%3" \ 1045 : "=r" ((USItype)(sh)), \ 1046 "=&r" ((USItype)(sl)) \ 1047 : "%0" ((USItype)(ah)), \ 1048 "r" ((USItype)(bh)), \ 1049 "%1" ((USItype)(al)), \ 1050 "r" ((USItype)(bl))) 1051#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 1052 __asm__ ("s %1,%5\n" \ 1053 "se %0,%3" \ 1054 : "=r" ((USItype)(sh)), \ 1055 "=&r" ((USItype)(sl)) \ 1056 : "0" ((USItype)(ah)), \ 1057 "r" ((USItype)(bh)), \ 1058 "1" ((USItype)(al)), \ 1059 "r" ((USItype)(bl))) 1060#define umul_ppmm(ph, pl, m0, m1) \ 1061 do { \ 1062 USItype __m0 = (m0), __m1 = (m1); \ 1063 __asm__ ( \ 1064 "s r2,r2 \n" \ 1065 "mts r10,%2 \n" \ 1066 "m r2,%3 \n" \ 1067 "m r2,%3 \n" \ 1068 "m r2,%3 \n" \ 1069 "m r2,%3 \n" \ 1070 "m r2,%3 \n" \ 1071 "m r2,%3 \n" \ 1072 "m r2,%3 \n" \ 1073 "m r2,%3 \n" \ 1074 "m r2,%3 \n" \ 1075 "m r2,%3 \n" \ 1076 "m r2,%3 \n" \ 1077 "m r2,%3 \n" \ 1078 "m r2,%3 \n" \ 1079 "m r2,%3 \n" \ 1080 "m r2,%3 \n" \ 1081 "m r2,%3 \n" \ 1082 "cas %0,r2,r0 \n" \ 1083 "mfs r10,%1" \ 1084 : "=r" ((USItype)(ph)), \ 1085 "=r" ((USItype)(pl)) \ 1086 : "%r" (__m0), \ 1087 "r" (__m1) \ 1088 : "r2"); \ 1089 (ph) += ((((SItype) __m0 >> 31) & __m1) \ 1090 + (((SItype) __m1 >> 31) & __m0)); \ 1091 } while (0) 1092#define UMUL_TIME 20 1093#define UDIV_TIME 200 1094#define count_leading_zeros(count, x) \ 1095 do { \ 1096 if ((x) >= 0x10000) \ 1097 __asm__ ("clz %0,%1" \ 1098 : "=r" ((USItype)(count)) \ 1099 : "r" ((USItype)(x) >> 16)); \ 1100 else \ 1101 { \ 1102 __asm__ ("clz %0,%1" \ 1103 : "=r" ((USItype)(count)) \ 1104 : "r" ((USItype)(x))); \ 1105 (count) += 16; \ 1106 } \ 1107 } while (0) 1108#endif /* RT/ROMP */ 1109 1110 1111/*************************************** 1112 ************** SH2 ****************** 1113 ***************************************/ 1114#if (defined (__sh2__) || defined(__sh3__) || defined(__SH4__) ) \ 1115 && W_TYPE_SIZE == 32 1116#define umul_ppmm(w1, w0, u, v) \ 1117 __asm__ ( \ 1118 "dmulu.l %2,%3\n" \ 1119 "sts macl,%1\n" \ 1120 "sts mach,%0" \ 1121 : "=r" ((USItype)(w1)), \ 1122 "=r" ((USItype)(w0)) \ 1123 : "r" ((USItype)(u)), \ 1124 "r" ((USItype)(v)) \ 1125 : "macl", "mach") 1126#define UMUL_TIME 5 1127#endif 1128 1129/*************************************** 1130 ************** SPARC **************** 1131 ***************************************/ 1132#if defined (__sparc__) && W_TYPE_SIZE == 32 1133#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 1134 __asm__ ("addcc %r4,%5,%1\n" \ 1135 "addx %r2,%3,%0" \ 1136 : "=r" ((USItype)(sh)), \ 1137 "=&r" ((USItype)(sl)) \ 1138 : "%rJ" ((USItype)(ah)), \ 1139 "rI" ((USItype)(bh)), \ 1140 "%rJ" ((USItype)(al)), \ 1141 "rI" ((USItype)(bl)) \ 1142 __CLOBBER_CC) 1143#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 1144 __asm__ ("subcc %r4,%5,%1\n" \ 1145 "subx %r2,%3,%0" \ 1146 : "=r" ((USItype)(sh)), \ 1147 "=&r" ((USItype)(sl)) \ 1148 : "rJ" ((USItype)(ah)), \ 1149 "rI" ((USItype)(bh)), \ 1150 "rJ" ((USItype)(al)), \ 1151 "rI" ((USItype)(bl)) \ 1152 __CLOBBER_CC) 1153#if defined (__sparc_v8__) 1154/* Don't match immediate range because, 1) it is not often useful, 1155 2) the 'I' flag thinks of the range as a 13 bit signed interval, 1156 while we want to match a 13 bit interval, sign extended to 32 bits, 1157 but INTERPRETED AS UNSIGNED. */ 1158#define umul_ppmm(w1, w0, u, v) \ 1159 __asm__ ("umul %2,%3,%1;rd %%y,%0" \ 1160 : "=r" ((USItype)(w1)), \ 1161 "=r" ((USItype)(w0)) \ 1162 : "r" ((USItype)(u)), \ 1163 "r" ((USItype)(v))) 1164#define UMUL_TIME 5 1165#ifndef SUPERSPARC /* SuperSPARC's udiv only handles 53 bit dividends */ 1166#define udiv_qrnnd(q, r, n1, n0, d) \ 1167 do { \ 1168 USItype __q; \ 1169 __asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0" \ 1170 : "=r" ((USItype)(__q)) \ 1171 : "r" ((USItype)(n1)), \ 1172 "r" ((USItype)(n0)), \ 1173 "r" ((USItype)(d))); \ 1174 (r) = (n0) - __q * (d); \ 1175 (q) = __q; \ 1176 } while (0) 1177#define UDIV_TIME 25 1178#endif /* SUPERSPARC */ 1179#else /* ! __sparc_v8__ */ 1180#if defined (__sparclite__) 1181/* This has hardware multiply but not divide. It also has two additional 1182 instructions scan (ffs from high bit) and divscc. */ 1183#define umul_ppmm(w1, w0, u, v) \ 1184 __asm__ ("umul %2,%3,%1;rd %%y,%0" \ 1185 : "=r" ((USItype)(w1)), \ 1186 "=r" ((USItype)(w0)) \ 1187 : "r" ((USItype)(u)), \ 1188 "r" ((USItype)(v))) 1189#define UMUL_TIME 5 1190#define udiv_qrnnd(q, r, n1, n0, d) \ 1191 __asm__ ("! Inlined udiv_qrnnd \n" \ 1192 " wr %%g0,%2,%%y ! Not a delayed write for sparclite \n" \ 1193 " tst %%g0 \n" \ 1194 " divscc %3,%4,%%g1 \n" \ 1195 " divscc %%g1,%4,%%g1 \n" \ 1196 " divscc %%g1,%4,%%g1 \n" \ 1197 " divscc %%g1,%4,%%g1 \n" \ 1198 " divscc %%g1,%4,%%g1 \n" \ 1199 " divscc %%g1,%4,%%g1 \n" \ 1200 " divscc %%g1,%4,%%g1 \n" \ 1201 " divscc %%g1,%4,%%g1 \n" \ 1202 " divscc %%g1,%4,%%g1 \n" \ 1203 " divscc %%g1,%4,%%g1 \n" \ 1204 " divscc %%g1,%4,%%g1 \n" \ 1205 " divscc %%g1,%4,%%g1 \n" \ 1206 " divscc %%g1,%4,%%g1 \n" \ 1207 " divscc %%g1,%4,%%g1 \n" \ 1208 " divscc %%g1,%4,%%g1 \n" \ 1209 " divscc %%g1,%4,%%g1 \n" \ 1210 " divscc %%g1,%4,%%g1 \n" \ 1211 " divscc %%g1,%4,%%g1 \n" \ 1212 " divscc %%g1,%4,%%g1 \n" \ 1213 " divscc %%g1,%4,%%g1 \n" \ 1214 " divscc %%g1,%4,%%g1 \n" \ 1215 " divscc %%g1,%4,%%g1 \n" \ 1216 " divscc %%g1,%4,%%g1 \n" \ 1217 " divscc %%g1,%4,%%g1 \n" \ 1218 " divscc %%g1,%4,%%g1 \n" \ 1219 " divscc %%g1,%4,%%g1 \n" \ 1220 " divscc %%g1,%4,%%g1 \n" \ 1221 " divscc %%g1,%4,%%g1 \n" \ 1222 " divscc %%g1,%4,%%g1 \n" \ 1223 " divscc %%g1,%4,%%g1 \n" \ 1224 " divscc %%g1,%4,%%g1 \n" \ 1225 " divscc %%g1,%4,%0 \n" \ 1226 " rd %%y,%1 \n" \ 1227 " bl,a 1f \n" \ 1228 " add %1,%4,%1 \n" \ 1229 "1: ! End of inline udiv_qrnnd" \ 1230 : "=r" ((USItype)(q)), \ 1231 "=r" ((USItype)(r)) \ 1232 : "r" ((USItype)(n1)), \ 1233 "r" ((USItype)(n0)), \ 1234 "rI" ((USItype)(d)) \ 1235 : "%g1" __AND_CLOBBER_CC) 1236#define UDIV_TIME 37 1237#define count_leading_zeros(count, x) \ 1238 __asm__ ("scan %1,0,%0" \ 1239 : "=r" ((USItype)(x)) \ 1240 : "r" ((USItype)(count))) 1241/* Early sparclites return 63 for an argument of 0, but they warn that future 1242 implementations might change this. Therefore, leave COUNT_LEADING_ZEROS_0 1243 undefined. */ 1244#endif /* __sparclite__ */ 1245#endif /* __sparc_v8__ */ 1246/* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd. */ 1247#ifndef umul_ppmm 1248#define umul_ppmm(w1, w0, u, v) \ 1249 __asm__ ("! Inlined umul_ppmm \n" \ 1250 " wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr \n" \ 1251 " sra %3,31,%%g2 ! Don't move this insn \n" \ 1252 " and %2,%%g2,%%g2 ! Don't move this insn \n" \ 1253 " andcc %%g0,0,%%g1 ! Don't move this insn \n" \ 1254 " mulscc %%g1,%3,%%g1 \n" \ 1255 " mulscc %%g1,%3,%%g1 \n" \ 1256 " mulscc %%g1,%3,%%g1 \n" \ 1257 " mulscc %%g1,%3,%%g1 \n" \ 1258 " mulscc %%g1,%3,%%g1 \n" \ 1259 " mulscc %%g1,%3,%%g1 \n" \ 1260 " mulscc %%g1,%3,%%g1 \n" \ 1261 " mulscc %%g1,%3,%%g1 \n" \ 1262 " mulscc %%g1,%3,%%g1 \n" \ 1263 " mulscc %%g1,%3,%%g1 \n" \ 1264 " mulscc %%g1,%3,%%g1 \n" \ 1265 " mulscc %%g1,%3,%%g1 \n" \ 1266 " mulscc %%g1,%3,%%g1 \n" \ 1267 " mulscc %%g1,%3,%%g1 \n" \ 1268 " mulscc %%g1,%3,%%g1 \n" \ 1269 " mulscc %%g1,%3,%%g1 \n" \ 1270 " mulscc %%g1,%3,%%g1 \n" \ 1271 " mulscc %%g1,%3,%%g1 \n" \ 1272 " mulscc %%g1,%3,%%g1 \n" \ 1273 " mulscc %%g1,%3,%%g1 \n" \ 1274 " mulscc %%g1,%3,%%g1 \n" \ 1275 " mulscc %%g1,%3,%%g1 \n" \ 1276 " mulscc %%g1,%3,%%g1 \n" \ 1277 " mulscc %%g1,%3,%%g1 \n" \ 1278 " mulscc %%g1,%3,%%g1 \n" \ 1279 " mulscc %%g1,%3,%%g1 \n" \ 1280 " mulscc %%g1,%3,%%g1 \n" \ 1281 " mulscc %%g1,%3,%%g1 \n" \ 1282 " mulscc %%g1,%3,%%g1 \n" \ 1283 " mulscc %%g1,%3,%%g1 \n" \ 1284 " mulscc %%g1,%3,%%g1 \n" \ 1285 " mulscc %%g1,%3,%%g1 \n" \ 1286 " mulscc %%g1,0,%%g1 \n" \ 1287 " add %%g1,%%g2,%0 \n" \ 1288 " rd %%y,%1" \ 1289 : "=r" ((USItype)(w1)), \ 1290 "=r" ((USItype)(w0)) \ 1291 : "%rI" ((USItype)(u)), \ 1292 "r" ((USItype)(v)) \ 1293 : "%g1", "%g2" __AND_CLOBBER_CC) 1294#define UMUL_TIME 39 /* 39 instructions */ 1295#endif 1296#ifndef udiv_qrnnd 1297#ifndef LONGLONG_STANDALONE 1298#define udiv_qrnnd(q, r, n1, n0, d) \ 1299 do { USItype __r; \ 1300 (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \ 1301 (r) = __r; \ 1302 } while (0) 1303extern USItype __udiv_qrnnd (); 1304#define UDIV_TIME 140 1305#endif /* LONGLONG_STANDALONE */ 1306#endif /* udiv_qrnnd */ 1307#endif /* __sparc__ */ 1308 1309 1310/*************************************** 1311 ************** VAX ****************** 1312 ***************************************/ 1313#if defined (__vax__) && W_TYPE_SIZE == 32 1314#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 1315 __asm__ ("addl2 %5,%1\n" \ 1316 "adwc %3,%0" \ 1317 : "=g" ((USItype)(sh)), \ 1318 "=&g" ((USItype)(sl)) \ 1319 : "%0" ((USItype)(ah)), \ 1320 "g" ((USItype)(bh)), \ 1321 "%1" ((USItype)(al)), \ 1322 "g" ((USItype)(bl))) 1323#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 1324 __asm__ ("subl2 %5,%1\n" \ 1325 "sbwc %3,%0" \ 1326 : "=g" ((USItype)(sh)), \ 1327 "=&g" ((USItype)(sl)) \ 1328 : "0" ((USItype)(ah)), \ 1329 "g" ((USItype)(bh)), \ 1330 "1" ((USItype)(al)), \ 1331 "g" ((USItype)(bl))) 1332#define umul_ppmm(xh, xl, m0, m1) \ 1333 do { \ 1334 union {UDItype __ll; \ 1335 struct {USItype __l, __h;} __i; \ 1336 } __xx; \ 1337 USItype __m0 = (m0), __m1 = (m1); \ 1338 __asm__ ("emul %1,%2,$0,%0" \ 1339 : "=g" (__xx.__ll) \ 1340 : "g" (__m0), \ 1341 "g" (__m1)); \ 1342 (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \ 1343 (xh) += ((((SItype) __m0 >> 31) & __m1) \ 1344 + (((SItype) __m1 >> 31) & __m0)); \ 1345 } while (0) 1346#define sdiv_qrnnd(q, r, n1, n0, d) \ 1347 do { \ 1348 union {DItype __ll; \ 1349 struct {SItype __l, __h;} __i; \ 1350 } __xx; \ 1351 __xx.__i.__h = n1; __xx.__i.__l = n0; \ 1352 __asm__ ("ediv %3,%2,%0,%1" \ 1353 : "=g" (q), "=g" (r) \ 1354 : "g" (__xx.__ll), "g" (d)); \ 1355 } while (0) 1356#endif /* __vax__ */ 1357 1358 1359/*************************************** 1360 ************** Z8000 **************** 1361 ***************************************/ 1362#if defined (__z8000__) && W_TYPE_SIZE == 16 1363#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 1364 __asm__ ("add %H1,%H5\n\tadc %H0,%H3" \ 1365 : "=r" ((unsigned int)(sh)), \ 1366 "=&r" ((unsigned int)(sl)) \ 1367 : "%0" ((unsigned int)(ah)), \ 1368 "r" ((unsigned int)(bh)), \ 1369 "%1" ((unsigned int)(al)), \ 1370 "rQR" ((unsigned int)(bl))) 1371#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 1372 __asm__ ("sub %H1,%H5\n\tsbc %H0,%H3" \ 1373 : "=r" ((unsigned int)(sh)), \ 1374 "=&r" ((unsigned int)(sl)) \ 1375 : "0" ((unsigned int)(ah)), \ 1376 "r" ((unsigned int)(bh)), \ 1377 "1" ((unsigned int)(al)), \ 1378 "rQR" ((unsigned int)(bl))) 1379#define umul_ppmm(xh, xl, m0, m1) \ 1380 do { \ 1381 union {long int __ll; \ 1382 struct {unsigned int __h, __l;} __i; \ 1383 } __xx; \ 1384 unsigned int __m0 = (m0), __m1 = (m1); \ 1385 __asm__ ("mult %S0,%H3" \ 1386 : "=r" (__xx.__i.__h), \ 1387 "=r" (__xx.__i.__l) \ 1388 : "%1" (__m0), \ 1389 "rQR" (__m1)); \ 1390 (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \ 1391 (xh) += ((((signed int) __m0 >> 15) & __m1) \ 1392 + (((signed int) __m1 >> 15) & __m0)); \ 1393 } while (0) 1394#endif /* __z8000__ */ 1395 1396#endif /* __GNUC__ */ 1397#endif /* !__riscos__ */ 1398 1399 1400/*************************************** 1401 *********** Generic Versions ******** 1402 ***************************************/ 1403#if !defined (umul_ppmm) && defined (__umulsidi3) 1404#define umul_ppmm(ph, pl, m0, m1) \ 1405 { \ 1406 UDWtype __ll = __umulsidi3 (m0, m1); \ 1407 ph = (UWtype) (__ll >> W_TYPE_SIZE); \ 1408 pl = (UWtype) __ll; \ 1409 } 1410#endif 1411 1412#if !defined (__umulsidi3) 1413#define __umulsidi3(u, v) \ 1414 ({UWtype __hi, __lo; \ 1415 umul_ppmm (__hi, __lo, u, v); \ 1416 ((UDWtype) __hi << W_TYPE_SIZE) | __lo; }) 1417#endif 1418 1419/* If this machine has no inline assembler, use C macros. */ 1420 1421#if !defined (add_ssaaaa) 1422#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 1423 do { \ 1424 UWtype __x; \ 1425 __x = (al) + (bl); \ 1426 (sh) = (ah) + (bh) + (__x < (al)); \ 1427 (sl) = __x; \ 1428 } while (0) 1429#endif 1430 1431#if !defined (sub_ddmmss) 1432#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 1433 do { \ 1434 UWtype __x; \ 1435 __x = (al) - (bl); \ 1436 (sh) = (ah) - (bh) - (__x > (al)); \ 1437 (sl) = __x; \ 1438 } while (0) 1439#endif 1440 1441#if !defined (umul_ppmm) 1442#define umul_ppmm(w1, w0, u, v) \ 1443 do { \ 1444 UWtype __x0, __x1, __x2, __x3; \ 1445 UHWtype __ul, __vl, __uh, __vh; \ 1446 UWtype __u = (u), __v = (v); \ 1447 \ 1448 __ul = __ll_lowpart (__u); \ 1449 __uh = __ll_highpart (__u); \ 1450 __vl = __ll_lowpart (__v); \ 1451 __vh = __ll_highpart (__v); \ 1452 \ 1453 __x0 = (UWtype) __ul * __vl; \ 1454 __x1 = (UWtype) __ul * __vh; \ 1455 __x2 = (UWtype) __uh * __vl; \ 1456 __x3 = (UWtype) __uh * __vh; \ 1457 \ 1458 __x1 += __ll_highpart (__x0);/* this can't give carry */ \ 1459 __x1 += __x2; /* but this indeed can */ \ 1460 if (__x1 < __x2) /* did we get it? */ \ 1461 __x3 += __ll_B; /* yes, add it in the proper pos. */ \ 1462 \ 1463 (w1) = __x3 + __ll_highpart (__x1); \ 1464 (w0) = (__ll_lowpart (__x1) << W_TYPE_SIZE/2) + __ll_lowpart (__x0);\ 1465 } while (0) 1466#endif 1467 1468#if !defined (umul_ppmm) 1469#define smul_ppmm(w1, w0, u, v) \ 1470 do { \ 1471 UWtype __w1; \ 1472 UWtype __m0 = (u), __m1 = (v); \ 1473 umul_ppmm (__w1, w0, __m0, __m1); \ 1474 (w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1) \ 1475 - (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0); \ 1476 } while (0) 1477#endif 1478 1479/* Define this unconditionally, so it can be used for debugging. */ 1480#define __udiv_qrnnd_c(q, r, n1, n0, d) \ 1481 do { \ 1482 UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m; \ 1483 __d1 = __ll_highpart (d); \ 1484 __d0 = __ll_lowpart (d); \ 1485 \ 1486 __r1 = (n1) % __d1; \ 1487 __q1 = (n1) / __d1; \ 1488 __m = (UWtype) __q1 * __d0; \ 1489 __r1 = __r1 * __ll_B | __ll_highpart (n0); \ 1490 if (__r1 < __m) \ 1491 { \ 1492 __q1--, __r1 += (d); \ 1493 if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\ 1494 if (__r1 < __m) \ 1495 __q1--, __r1 += (d); \ 1496 } \ 1497 __r1 -= __m; \ 1498 \ 1499 __r0 = __r1 % __d1; \ 1500 __q0 = __r1 / __d1; \ 1501 __m = (UWtype) __q0 * __d0; \ 1502 __r0 = __r0 * __ll_B | __ll_lowpart (n0); \ 1503 if (__r0 < __m) \ 1504 { \ 1505 __q0--, __r0 += (d); \ 1506 if (__r0 >= (d)) \ 1507 if (__r0 < __m) \ 1508 __q0--, __r0 += (d); \ 1509 } \ 1510 __r0 -= __m; \ 1511 \ 1512 (q) = (UWtype) __q1 * __ll_B | __q0; \ 1513 (r) = __r0; \ 1514 } while (0) 1515 1516/* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through 1517 __udiv_w_sdiv (defined in libgcc or elsewhere). */ 1518#if !defined (udiv_qrnnd) && defined (sdiv_qrnnd) 1519#define udiv_qrnnd(q, r, nh, nl, d) \ 1520 do { \ 1521 UWtype __r; \ 1522 (q) = __MPN(udiv_w_sdiv) (&__r, nh, nl, d); \ 1523 (r) = __r; \ 1524 } while (0) 1525#endif 1526 1527/* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c. */ 1528#if !defined (udiv_qrnnd) 1529#define UDIV_NEEDS_NORMALIZATION 1 1530#define udiv_qrnnd __udiv_qrnnd_c 1531#endif 1532 1533#if !defined (count_leading_zeros) 1534extern 1535#ifdef __STDC__ 1536const 1537#endif 1538unsigned char _gcry_clz_tab[]; 1539#define MPI_INTERNAL_NEED_CLZ_TAB 1 1540#define count_leading_zeros(count, x) \ 1541 do { \ 1542 UWtype __xr = (x); \ 1543 UWtype __a; \ 1544 \ 1545 if (W_TYPE_SIZE <= 32) \ 1546 { \ 1547 __a = __xr < ((UWtype) 1 << 2*__BITS4) \ 1548 ? (__xr < ((UWtype) 1 << __BITS4) ? 0 : __BITS4) \ 1549 : (__xr < ((UWtype) 1 << 3*__BITS4) ? 2*__BITS4 : 3*__BITS4);\ 1550 } \ 1551 else \ 1552 { \ 1553 for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8) \ 1554 if (((__xr >> __a) & 0xff) != 0) \ 1555 break; \ 1556 } \ 1557 \ 1558 (count) = W_TYPE_SIZE - (_gcry_clz_tab[__xr >> __a] + __a); \ 1559 } while (0) 1560/* This version gives a well-defined value for zero. */ 1561#define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE 1562#endif 1563 1564#if !defined (count_trailing_zeros) 1565/* Define count_trailing_zeros using count_leading_zeros. The latter might be 1566 defined in asm, but if it is not, the C version above is good enough. */ 1567#define count_trailing_zeros(count, x) \ 1568 do { \ 1569 UWtype __ctz_x = (x); \ 1570 UWtype __ctz_c; \ 1571 count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x); \ 1572 (count) = W_TYPE_SIZE - 1 - __ctz_c; \ 1573 } while (0) 1574#endif 1575 1576#ifndef UDIV_NEEDS_NORMALIZATION 1577#define UDIV_NEEDS_NORMALIZATION 0 1578#endif 1579