1/* 2 * ALSA driver for ICEnsemble VT1724 (Envy24HT) 3 * 4 * Lowlevel functions for Pontis MS300 5 * 6 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 * 22 */ 23 24#include <sound/driver.h> 25#include <asm/io.h> 26#include <linux/delay.h> 27#include <linux/interrupt.h> 28#include <linux/init.h> 29#include <linux/slab.h> 30#include <linux/mutex.h> 31 32#include <sound/core.h> 33#include <sound/info.h> 34#include <sound/tlv.h> 35 36#include "ice1712.h" 37#include "envy24ht.h" 38#include "pontis.h" 39 40/* I2C addresses */ 41#define WM_DEV 0x34 42#define CS_DEV 0x20 43 44/* WM8776 registers */ 45#define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */ 46#define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */ 47#define WM_HP_MASTER 0x02 /* headphone master (both channels), override LLR */ 48#define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */ 49#define WM_DAC_ATTEN_R 0x04 50#define WM_DAC_MASTER 0x05 51#define WM_PHASE_SWAP 0x06 /* DAC phase swap */ 52#define WM_DAC_CTRL1 0x07 53#define WM_DAC_MUTE 0x08 54#define WM_DAC_CTRL2 0x09 55#define WM_DAC_INT 0x0a 56#define WM_ADC_INT 0x0b 57#define WM_MASTER_CTRL 0x0c 58#define WM_POWERDOWN 0x0d 59#define WM_ADC_ATTEN_L 0x0e 60#define WM_ADC_ATTEN_R 0x0f 61#define WM_ALC_CTRL1 0x10 62#define WM_ALC_CTRL2 0x11 63#define WM_ALC_CTRL3 0x12 64#define WM_NOISE_GATE 0x13 65#define WM_LIMITER 0x14 66#define WM_ADC_MUX 0x15 67#define WM_OUT_MUX 0x16 68#define WM_RESET 0x17 69 70/* 71 * GPIO 72 */ 73#define PONTIS_CS_CS (1<<4) /* CS */ 74#define PONTIS_CS_CLK (1<<5) /* CLK */ 75#define PONTIS_CS_RDATA (1<<6) /* CS8416 -> VT1720 */ 76#define PONTIS_CS_WDATA (1<<7) /* VT1720 -> CS8416 */ 77 78 79/* 80 * get the current register value of WM codec 81 */ 82static unsigned short wm_get(struct snd_ice1712 *ice, int reg) 83{ 84 reg <<= 1; 85 return ((unsigned short)ice->akm[0].images[reg] << 8) | 86 ice->akm[0].images[reg + 1]; 87} 88 89/* 90 * set the register value of WM codec and remember it 91 */ 92static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val) 93{ 94 unsigned short cval; 95 cval = (reg << 9) | val; 96 snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff); 97} 98 99static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val) 100{ 101 wm_put_nocache(ice, reg, val); 102 reg <<= 1; 103 ice->akm[0].images[reg] = val >> 8; 104 ice->akm[0].images[reg + 1] = val; 105} 106 107/* 108 * DAC volume attenuation mixer control (-64dB to 0dB) 109 */ 110 111#define DAC_0dB 0xff 112#define DAC_RES 128 113#define DAC_MIN (DAC_0dB - DAC_RES) 114 115static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 116{ 117 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 118 uinfo->count = 2; 119 uinfo->value.integer.min = 0; /* mute */ 120 uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */ 121 return 0; 122} 123 124static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 125{ 126 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 127 unsigned short val; 128 int i; 129 130 mutex_lock(&ice->gpio_mutex); 131 for (i = 0; i < 2; i++) { 132 val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff; 133 val = val > DAC_MIN ? (val - DAC_MIN) : 0; 134 ucontrol->value.integer.value[i] = val; 135 } 136 mutex_unlock(&ice->gpio_mutex); 137 return 0; 138} 139 140static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 141{ 142 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 143 unsigned short oval, nval; 144 int i, idx, change = 0; 145 146 mutex_lock(&ice->gpio_mutex); 147 for (i = 0; i < 2; i++) { 148 nval = ucontrol->value.integer.value[i]; 149 nval = (nval ? (nval + DAC_MIN) : 0) & 0xff; 150 idx = WM_DAC_ATTEN_L + i; 151 oval = wm_get(ice, idx) & 0xff; 152 if (oval != nval) { 153 wm_put(ice, idx, nval); 154 wm_put_nocache(ice, idx, nval | 0x100); 155 change = 1; 156 } 157 } 158 mutex_unlock(&ice->gpio_mutex); 159 return change; 160} 161 162/* 163 * ADC gain mixer control (-64dB to 0dB) 164 */ 165 166#define ADC_0dB 0xcf 167#define ADC_RES 128 168#define ADC_MIN (ADC_0dB - ADC_RES) 169 170static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 171{ 172 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 173 uinfo->count = 2; 174 uinfo->value.integer.min = 0; /* mute (-64dB) */ 175 uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */ 176 return 0; 177} 178 179static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 180{ 181 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 182 unsigned short val; 183 int i; 184 185 mutex_lock(&ice->gpio_mutex); 186 for (i = 0; i < 2; i++) { 187 val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff; 188 val = val > ADC_MIN ? (val - ADC_MIN) : 0; 189 ucontrol->value.integer.value[i] = val; 190 } 191 mutex_unlock(&ice->gpio_mutex); 192 return 0; 193} 194 195static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 196{ 197 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 198 unsigned short ovol, nvol; 199 int i, idx, change = 0; 200 201 mutex_lock(&ice->gpio_mutex); 202 for (i = 0; i < 2; i++) { 203 nvol = ucontrol->value.integer.value[i]; 204 nvol = nvol ? (nvol + ADC_MIN) : 0; 205 idx = WM_ADC_ATTEN_L + i; 206 ovol = wm_get(ice, idx) & 0xff; 207 if (ovol != nvol) { 208 wm_put(ice, idx, nvol); 209 change = 1; 210 } 211 } 212 mutex_unlock(&ice->gpio_mutex); 213 return change; 214} 215 216/* 217 * ADC input mux mixer control 218 */ 219static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 220{ 221 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 222 uinfo->count = 1; 223 uinfo->value.integer.min = 0; 224 uinfo->value.integer.max = 1; 225 return 0; 226} 227 228static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 229{ 230 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 231 int bit = kcontrol->private_value; 232 233 mutex_lock(&ice->gpio_mutex); 234 ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0; 235 mutex_unlock(&ice->gpio_mutex); 236 return 0; 237} 238 239static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 240{ 241 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 242 int bit = kcontrol->private_value; 243 unsigned short oval, nval; 244 int change; 245 246 mutex_lock(&ice->gpio_mutex); 247 nval = oval = wm_get(ice, WM_ADC_MUX); 248 if (ucontrol->value.integer.value[0]) 249 nval |= (1 << bit); 250 else 251 nval &= ~(1 << bit); 252 change = nval != oval; 253 if (change) { 254 wm_put(ice, WM_ADC_MUX, nval); 255 } 256 mutex_unlock(&ice->gpio_mutex); 257 return 0; 258} 259 260/* 261 * Analog bypass (In -> Out) 262 */ 263static int wm_bypass_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 264{ 265 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 266 uinfo->count = 1; 267 uinfo->value.integer.min = 0; 268 uinfo->value.integer.max = 1; 269 return 0; 270} 271 272static int wm_bypass_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 273{ 274 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 275 276 mutex_lock(&ice->gpio_mutex); 277 ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0; 278 mutex_unlock(&ice->gpio_mutex); 279 return 0; 280} 281 282static int wm_bypass_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 283{ 284 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 285 unsigned short val, oval; 286 int change = 0; 287 288 mutex_lock(&ice->gpio_mutex); 289 val = oval = wm_get(ice, WM_OUT_MUX); 290 if (ucontrol->value.integer.value[0]) 291 val |= 0x04; 292 else 293 val &= ~0x04; 294 if (val != oval) { 295 wm_put(ice, WM_OUT_MUX, val); 296 change = 1; 297 } 298 mutex_unlock(&ice->gpio_mutex); 299 return change; 300} 301 302/* 303 * Left/Right swap 304 */ 305static int wm_chswap_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 306{ 307 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 308 uinfo->count = 1; 309 uinfo->value.integer.min = 0; 310 uinfo->value.integer.max = 1; 311 return 0; 312} 313 314static int wm_chswap_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 315{ 316 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 317 318 mutex_lock(&ice->gpio_mutex); 319 ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90; 320 mutex_unlock(&ice->gpio_mutex); 321 return 0; 322} 323 324static int wm_chswap_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 325{ 326 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 327 unsigned short val, oval; 328 int change = 0; 329 330 mutex_lock(&ice->gpio_mutex); 331 oval = wm_get(ice, WM_DAC_CTRL1); 332 val = oval & 0x0f; 333 if (ucontrol->value.integer.value[0]) 334 val |= 0x60; 335 else 336 val |= 0x90; 337 if (val != oval) { 338 wm_put(ice, WM_DAC_CTRL1, val); 339 wm_put_nocache(ice, WM_DAC_CTRL1, val); 340 change = 1; 341 } 342 mutex_unlock(&ice->gpio_mutex); 343 return change; 344} 345 346/* 347 * write data in the SPI mode 348 */ 349static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val) 350{ 351 unsigned int tmp = snd_ice1712_gpio_read(ice); 352 if (val) 353 tmp |= bit; 354 else 355 tmp &= ~bit; 356 snd_ice1712_gpio_write(ice, tmp); 357} 358 359static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data) 360{ 361 int i; 362 for (i = 0; i < 8; i++) { 363 set_gpio_bit(ice, PONTIS_CS_CLK, 0); 364 udelay(1); 365 set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80); 366 udelay(1); 367 set_gpio_bit(ice, PONTIS_CS_CLK, 1); 368 udelay(1); 369 data <<= 1; 370 } 371} 372 373static unsigned int spi_read_byte(struct snd_ice1712 *ice) 374{ 375 int i; 376 unsigned int val = 0; 377 378 for (i = 0; i < 8; i++) { 379 val <<= 1; 380 set_gpio_bit(ice, PONTIS_CS_CLK, 0); 381 udelay(1); 382 if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA) 383 val |= 1; 384 udelay(1); 385 set_gpio_bit(ice, PONTIS_CS_CLK, 1); 386 udelay(1); 387 } 388 return val; 389} 390 391 392static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data) 393{ 394 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK); 395 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK)); 396 set_gpio_bit(ice, PONTIS_CS_CS, 0); 397 spi_send_byte(ice, dev & ~1); /* WRITE */ 398 spi_send_byte(ice, reg); /* MAP */ 399 spi_send_byte(ice, data); /* DATA */ 400 /* trigger */ 401 set_gpio_bit(ice, PONTIS_CS_CS, 1); 402 udelay(1); 403 /* restore */ 404 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 405 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 406} 407 408static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg) 409{ 410 unsigned int val; 411 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK); 412 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK)); 413 set_gpio_bit(ice, PONTIS_CS_CS, 0); 414 spi_send_byte(ice, dev & ~1); /* WRITE */ 415 spi_send_byte(ice, reg); /* MAP */ 416 /* trigger */ 417 set_gpio_bit(ice, PONTIS_CS_CS, 1); 418 udelay(1); 419 set_gpio_bit(ice, PONTIS_CS_CS, 0); 420 spi_send_byte(ice, dev | 1); /* READ */ 421 val = spi_read_byte(ice); 422 /* trigger */ 423 set_gpio_bit(ice, PONTIS_CS_CS, 1); 424 udelay(1); 425 /* restore */ 426 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 427 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 428 return val; 429} 430 431 432/* 433 * SPDIF input source 434 */ 435static int cs_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 436{ 437 static const char * const texts[] = { 438 "Coax", /* RXP0 */ 439 "Optical", /* RXP1 */ 440 "CD", /* RXP2 */ 441 }; 442 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 443 uinfo->count = 1; 444 uinfo->value.enumerated.items = 3; 445 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 446 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 447 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 448 return 0; 449} 450 451static int cs_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 452{ 453 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 454 455 mutex_lock(&ice->gpio_mutex); 456 ucontrol->value.enumerated.item[0] = ice->gpio.saved[0]; 457 mutex_unlock(&ice->gpio_mutex); 458 return 0; 459} 460 461static int cs_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 462{ 463 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 464 unsigned char val; 465 int change = 0; 466 467 mutex_lock(&ice->gpio_mutex); 468 if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) { 469 ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3; 470 val = 0x80 | (ice->gpio.saved[0] << 3); 471 spi_write(ice, CS_DEV, 0x04, val); 472 change = 1; 473 } 474 mutex_unlock(&ice->gpio_mutex); 475 return 0; 476} 477 478 479/* 480 * GPIO controls 481 */ 482static int pontis_gpio_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 483{ 484 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 485 uinfo->count = 1; 486 uinfo->value.integer.min = 0; 487 uinfo->value.integer.max = 0xffff; /* 16bit */ 488 return 0; 489} 490 491static int pontis_gpio_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 492{ 493 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 494 mutex_lock(&ice->gpio_mutex); 495 /* 4-7 reserved */ 496 ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0; 497 mutex_unlock(&ice->gpio_mutex); 498 return 0; 499} 500 501static int pontis_gpio_mask_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 502{ 503 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 504 unsigned int val; 505 int changed; 506 mutex_lock(&ice->gpio_mutex); 507 /* 4-7 reserved */ 508 val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0; 509 changed = val != ice->gpio.write_mask; 510 ice->gpio.write_mask = val; 511 mutex_unlock(&ice->gpio_mutex); 512 return changed; 513} 514 515static int pontis_gpio_dir_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 516{ 517 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 518 mutex_lock(&ice->gpio_mutex); 519 /* 4-7 reserved */ 520 ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f; 521 mutex_unlock(&ice->gpio_mutex); 522 return 0; 523} 524 525static int pontis_gpio_dir_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 526{ 527 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 528 unsigned int val; 529 int changed; 530 mutex_lock(&ice->gpio_mutex); 531 /* 4-7 reserved */ 532 val = ucontrol->value.integer.value[0] & 0xff0f; 533 changed = (val != ice->gpio.direction); 534 ice->gpio.direction = val; 535 mutex_unlock(&ice->gpio_mutex); 536 return changed; 537} 538 539static int pontis_gpio_data_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 540{ 541 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 542 mutex_lock(&ice->gpio_mutex); 543 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 544 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 545 ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff; 546 mutex_unlock(&ice->gpio_mutex); 547 return 0; 548} 549 550static int pontis_gpio_data_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 551{ 552 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 553 unsigned int val, nval; 554 int changed = 0; 555 mutex_lock(&ice->gpio_mutex); 556 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 557 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 558 val = snd_ice1712_gpio_read(ice) & 0xffff; 559 nval = ucontrol->value.integer.value[0] & 0xffff; 560 if (val != nval) { 561 snd_ice1712_gpio_write(ice, nval); 562 changed = 1; 563 } 564 mutex_unlock(&ice->gpio_mutex); 565 return changed; 566} 567 568static const DECLARE_TLV_DB_SCALE(db_scale_volume, -6400, 50, 1); 569 570/* 571 * mixers 572 */ 573 574static struct snd_kcontrol_new pontis_controls[] __devinitdata = { 575 { 576 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 577 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 578 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 579 .name = "PCM Playback Volume", 580 .info = wm_dac_vol_info, 581 .get = wm_dac_vol_get, 582 .put = wm_dac_vol_put, 583 .tlv = { .p = db_scale_volume }, 584 }, 585 { 586 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 587 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 588 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 589 .name = "Capture Volume", 590 .info = wm_adc_vol_info, 591 .get = wm_adc_vol_get, 592 .put = wm_adc_vol_put, 593 .tlv = { .p = db_scale_volume }, 594 }, 595 { 596 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 597 .name = "CD Capture Switch", 598 .info = wm_adc_mux_info, 599 .get = wm_adc_mux_get, 600 .put = wm_adc_mux_put, 601 .private_value = 0, 602 }, 603 { 604 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 605 .name = "Line Capture Switch", 606 .info = wm_adc_mux_info, 607 .get = wm_adc_mux_get, 608 .put = wm_adc_mux_put, 609 .private_value = 1, 610 }, 611 { 612 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 613 .name = "Analog Bypass Switch", 614 .info = wm_bypass_info, 615 .get = wm_bypass_get, 616 .put = wm_bypass_put, 617 }, 618 { 619 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 620 .name = "Swap Output Channels", 621 .info = wm_chswap_info, 622 .get = wm_chswap_get, 623 .put = wm_chswap_put, 624 }, 625 { 626 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 627 .name = "IEC958 Input Source", 628 .info = cs_source_info, 629 .get = cs_source_get, 630 .put = cs_source_put, 631 }, 632 { 633 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 634 .name = "GPIO Mask", 635 .info = pontis_gpio_mask_info, 636 .get = pontis_gpio_mask_get, 637 .put = pontis_gpio_mask_put, 638 }, 639 { 640 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 641 .name = "GPIO Direction", 642 .info = pontis_gpio_mask_info, 643 .get = pontis_gpio_dir_get, 644 .put = pontis_gpio_dir_put, 645 }, 646 { 647 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 648 .name = "GPIO Data", 649 .info = pontis_gpio_mask_info, 650 .get = pontis_gpio_data_get, 651 .put = pontis_gpio_data_put, 652 }, 653}; 654 655 656/* 657 * WM codec registers 658 */ 659static void wm_proc_regs_write(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 660{ 661 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data; 662 char line[64]; 663 unsigned int reg, val; 664 mutex_lock(&ice->gpio_mutex); 665 while (!snd_info_get_line(buffer, line, sizeof(line))) { 666 if (sscanf(line, "%x %x", ®, &val) != 2) 667 continue; 668 if (reg <= 0x17 && val <= 0xffff) 669 wm_put(ice, reg, val); 670 } 671 mutex_unlock(&ice->gpio_mutex); 672} 673 674static void wm_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 675{ 676 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data; 677 int reg, val; 678 679 mutex_lock(&ice->gpio_mutex); 680 for (reg = 0; reg <= 0x17; reg++) { 681 val = wm_get(ice, reg); 682 snd_iprintf(buffer, "%02x = %04x\n", reg, val); 683 } 684 mutex_unlock(&ice->gpio_mutex); 685} 686 687static void wm_proc_init(struct snd_ice1712 *ice) 688{ 689 struct snd_info_entry *entry; 690 if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) { 691 snd_info_set_text_ops(entry, ice, wm_proc_regs_read); 692 entry->mode |= S_IWUSR; 693 entry->c.text.write = wm_proc_regs_write; 694 } 695} 696 697static void cs_proc_regs_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 698{ 699 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data; 700 int reg, val; 701 702 mutex_lock(&ice->gpio_mutex); 703 for (reg = 0; reg <= 0x26; reg++) { 704 val = spi_read(ice, CS_DEV, reg); 705 snd_iprintf(buffer, "%02x = %02x\n", reg, val); 706 } 707 val = spi_read(ice, CS_DEV, 0x7f); 708 snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val); 709 mutex_unlock(&ice->gpio_mutex); 710} 711 712static void cs_proc_init(struct snd_ice1712 *ice) 713{ 714 struct snd_info_entry *entry; 715 if (! snd_card_proc_new(ice->card, "cs_codec", &entry)) 716 snd_info_set_text_ops(entry, ice, cs_proc_regs_read); 717} 718 719 720static int __devinit pontis_add_controls(struct snd_ice1712 *ice) 721{ 722 unsigned int i; 723 int err; 724 725 for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) { 726 err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice)); 727 if (err < 0) 728 return err; 729 } 730 731 wm_proc_init(ice); 732 cs_proc_init(ice); 733 734 return 0; 735} 736 737 738/* 739 * initialize the chip 740 */ 741static int __devinit pontis_init(struct snd_ice1712 *ice) 742{ 743 static const unsigned short wm_inits[] = { 744 /* These come first to reduce init pop noise */ 745 WM_ADC_MUX, 0x00c0, /* ADC mute */ 746 WM_DAC_MUTE, 0x0001, /* DAC softmute */ 747 WM_DAC_CTRL1, 0x0000, /* DAC mute */ 748 749 WM_POWERDOWN, 0x0008, /* All power-up except HP */ 750 WM_RESET, 0x0000, /* reset */ 751 }; 752 static const unsigned short wm_inits2[] = { 753 WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */ 754 WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */ 755 WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */ 756 WM_DAC_CTRL1, 0x0090, /* DAC L/R */ 757 WM_OUT_MUX, 0x0001, /* OUT DAC */ 758 WM_HP_ATTEN_L, 0x0179, /* HP 0dB */ 759 WM_HP_ATTEN_R, 0x0179, /* HP 0dB */ 760 WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */ 761 WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */ 762 WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */ 763 WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */ 764 // WM_DAC_MASTER, 0x0100, /* DAC master muted */ 765 WM_PHASE_SWAP, 0x0000, /* phase normal */ 766 WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */ 767 WM_ADC_ATTEN_L, 0x0000, /* ADC muted */ 768 WM_ADC_ATTEN_R, 0x0000, /* ADC muted */ 769 WM_DAC_MUTE, 0x0000, /* DAC unmute */ 770 WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */ 771 }; 772 static const unsigned char cs_inits[] = { 773 0x04, 0x80, /* RUN, RXP0 */ 774 0x05, 0x05, /* slave, 24bit */ 775 0x01, 0x00, 776 0x02, 0x00, 777 0x03, 0x00, 778 }; 779 unsigned int i; 780 781 ice->vt1720 = 1; 782 ice->num_total_dacs = 2; 783 ice->num_total_adcs = 2; 784 785 /* to remeber the register values */ 786 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); 787 if (! ice->akm) 788 return -ENOMEM; 789 ice->akm_codecs = 1; 790 791 /* HACK - use this as the SPDIF source. 792 * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten 793 */ 794 ice->gpio.saved[0] = 0; 795 796 /* initialize WM8776 codec */ 797 for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2) 798 wm_put(ice, wm_inits[i], wm_inits[i+1]); 799 schedule_timeout_uninterruptible(1); 800 for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2) 801 wm_put(ice, wm_inits2[i], wm_inits2[i+1]); 802 803 /* initialize CS8416 codec */ 804 /* assert PRST#; MT05 bit 7 */ 805 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); 806 mdelay(5); 807 /* deassert PRST# */ 808 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); 809 810 for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2) 811 spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]); 812 813 return 0; 814} 815 816 817/* 818 * Pontis boards don't provide the EEPROM data at all. 819 * hence the driver needs to sets up it properly. 820 */ 821 822static unsigned char pontis_eeprom[] __devinitdata = { 823 [ICE_EEP2_SYSCONF] = 0x08, /* clock 256, mpu401, spdif-in/ADC, 1DAC */ 824 [ICE_EEP2_ACLINK] = 0x80, /* I2S */ 825 [ICE_EEP2_I2S] = 0xf8, /* vol, 96k, 24bit, 192k */ 826 [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */ 827 [ICE_EEP2_GPIO_DIR] = 0x07, 828 [ICE_EEP2_GPIO_DIR1] = 0x00, 829 [ICE_EEP2_GPIO_DIR2] = 0x00, /* ignored */ 830 [ICE_EEP2_GPIO_MASK] = 0x0f, /* 4-7 reserved for CS8416 */ 831 [ICE_EEP2_GPIO_MASK1] = 0xff, 832 [ICE_EEP2_GPIO_MASK2] = 0x00, /* ignored */ 833 [ICE_EEP2_GPIO_STATE] = 0x06, /* 0-low, 1-high, 2-high */ 834 [ICE_EEP2_GPIO_STATE1] = 0x00, 835 [ICE_EEP2_GPIO_STATE2] = 0x00, /* ignored */ 836}; 837 838/* entry point */ 839struct snd_ice1712_card_info snd_vt1720_pontis_cards[] __devinitdata = { 840 { 841 .subvendor = VT1720_SUBDEVICE_PONTIS_MS300, 842 .name = "Pontis MS300", 843 .model = "ms300", 844 .chip_init = pontis_init, 845 .build_controls = pontis_add_controls, 846 .eeprom_size = sizeof(pontis_eeprom), 847 .eeprom_data = pontis_eeprom, 848 }, 849 { } /* terminator */ 850}; 851