1/* 2 * OSS driver for Linux 2.[46].x for 3 * 4 * Trident 4D-Wave 5 * SiS 7018 6 * ALi 5451 7 * Tvia/IGST CyberPro 5050 8 * 9 * Driver: Alan Cox <alan@redhat.com> 10 * 11 * Built from: 12 * Low level code: <audio@tridentmicro.com> from ALSA 13 * Framework: Thomas Sailer <sailer@ife.ee.ethz.ch> 14 * Extended by: Zach Brown <zab@redhat.com> 15 * 16 * Hacked up by: 17 * Aaron Holtzman <aholtzma@ess.engr.uvic.ca> 18 * Ollie Lho <ollie@sis.com.tw> SiS 7018 Audio Core Support 19 * Ching-Ling Lee <cling-li@ali.com.tw> ALi 5451 Audio Core Support 20 * Matt Wu <mattwu@acersoftech.com.cn> ALi 5451 Audio Core Support 21 * Peter W��chtler <pwaechtler@loewe-komp.de> CyberPro5050 support 22 * Muli Ben-Yehuda <mulix@mulix.org> 23 * 24 * 25 * This program is free software; you can redistribute it and/or modify 26 * it under the terms of the GNU General Public License as published by 27 * the Free Software Foundation; either version 2 of the License, or 28 * (at your option) any later version. 29 * 30 * This program is distributed in the hope that it will be useful, 31 * but WITHOUT ANY WARRANTY; without even the implied warranty of 32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 33 * GNU General Public License for more details. 34 * 35 * You should have received a copy of the GNU General Public License 36 * along with this program; if not, write to the Free Software 37 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 38 * 39 * History 40 * v0.14.10j 41 * January 3 2004 Eugene Teo <eugeneteo@eugeneteo.net> 42 * minor cleanup to use pr_debug instead of TRDBG since it is already 43 * defined in linux/kernel.h. 44 * v0.14.10i 45 * December 29 2003 Muli Ben-Yehuda <mulix@mulix.org> 46 * major cleanup for 2.6, fix a few error patch buglets 47 * with returning without properly cleaning up first, 48 * get rid of lock_kernel(). 49 * v0.14.10h 50 * Sept 10 2002 Pascal Schmidt <der.eremit@email.de> 51 * added support for ALi 5451 joystick port 52 * v0.14.10g 53 * Sept 05 2002 Alan Cox <alan@redhat.com> 54 * adapt to new pci joystick attachment interface 55 * v0.14.10f 56 * July 24 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 57 * patch from Eric Lemar (via Ian Soboroff): in suspend and resume, 58 * fix wrong cast from pci_dev* to struct trident_card*. 59 * v0.14.10e 60 * July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 61 * rewrite the DMA buffer allocation/deallcoation functions, to make it 62 * modular and fix a bug where we would call free_pages on memory 63 * obtained with pci_alloc_consistent. Also remove unnecessary #ifdef 64 * CONFIG_PROC_FS and various other cleanups. 65 * v0.14.10d 66 * July 19 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 67 * made several printk(KERN_NOTICE...) into TRDBG(...), to avoid spamming 68 * my syslog with hundreds of messages. 69 * v0.14.10c 70 * July 16 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 71 * Cleaned up Lei Hu's 0.4.10 driver to conform to Documentation/CodingStyle 72 * and the coding style used in the rest of the file. 73 * v0.14.10b 74 * June 23 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 75 * add a missing unlock_set_fmt, remove a superflous lock/unlock pair 76 * with nothing in between. 77 * v0.14.10a 78 * June 21 2002 Muli Ben-Yehuda <mulix@actcom.co.il> 79 * use a debug macro instead of #ifdef CONFIG_DEBUG, trim to 80 columns 80 * per line, use 'do {} while (0)' in statement macros. 81 * v0.14.10 82 * June 6 2002 Lei Hu <Lei_hu@ali.com.tw> 83 * rewrite the part to read/write registers of audio codec for Ali5451 84 * v0.14.9e 85 * January 2 2002 Vojtech Pavlik <vojtech@ucw.cz> added gameport 86 * support to avoid resource conflict with pcigame.c 87 * v0.14.9d 88 * October 8 2001 Arnaldo Carvalho de Melo <acme@conectiva.com.br> 89 * use set_current_state, properly release resources on failure in 90 * trident_probe, get rid of check_region 91 * v0.14.9c 92 * August 10 2001 Peter W��chtler <pwaechtler@loewe-komp.de> 93 * added support for Tvia (formerly Integraphics/IGST) CyberPro5050 94 * this chip is often found in settop boxes (combined video+audio) 95 * v0.14.9b 96 * Switch to static inline not extern inline (gcc 3) 97 * v0.14.9a 98 * Aug 6 2001 Alan Cox 99 * 0.14.9 crashed on rmmod due to a timer/bh left running. Simplified 100 * the existing logic (the BH doesn't help as ac97 is lock_irqsave) 101 * and used del_timer_sync to clean up 102 * Fixed a problem where the ALi change broke my generic card 103 * v0.14.9 104 * Jul 10 2001 Matt Wu 105 * Add H/W Volume Control 106 * v0.14.8a 107 * July 7 2001 Alan Cox 108 * Moved Matt Wu's ac97 register cache into the card structure 109 * v0.14.8 110 * Apr 30 2001 Matt Wu 111 * Set EBUF1 and EBUF2 to still mode 112 * Add dc97/ac97 reset function 113 * Fix power management: ali_restore_regs 114 * unreleased 115 * Mar 09 2001 Matt Wu 116 * Add cache for ac97 access 117 * v0.14.7 118 * Feb 06 2001 Matt Wu 119 * Fix ac97 initialization 120 * Fix bug: an extra tail will be played when playing 121 * Jan 05 2001 Matt Wu 122 * Implement multi-channels and S/PDIF in support for ALi 1535+ 123 * v0.14.6 124 * Nov 1 2000 Ching-Ling Lee 125 * Fix the bug of memory leak when switching 5.1-channels to 2 channels. 126 * Add lock protection into dynamic changing format of data. 127 * Oct 18 2000 Ching-Ling Lee 128 * 5.1-channels support for ALi 129 * June 28 2000 Ching-Ling Lee 130 * S/PDIF out/in(playback/record) support for ALi 1535+, using /proc to be selected by user 131 * Simple Power Management support for ALi 132 * v0.14.5 May 23 2000 Ollie Lho 133 * Misc bug fix from the Net 134 * v0.14.4 May 20 2000 Aaron Holtzman 135 * Fix kfree'd memory access in release 136 * Fix race in open while looking for a free virtual channel slot 137 * remove open_wait wq (which appears to be unused) 138 * v0.14.3 May 10 2000 Ollie Lho 139 * fixed a small bug in trident_update_ptr, xmms 1.0.1 no longer uses 100% CPU 140 * v0.14.2 Mar 29 2000 Ching-Ling Lee 141 * Add clear to silence advance in trident_update_ptr 142 * fix invalid data of the end of the sound 143 * v0.14.1 Mar 24 2000 Ching-Ling Lee 144 * ALi 5451 support added, playback and recording O.K. 145 * ALi 5451 originally developed and structured based on sonicvibes, and 146 * suggested to merge into this file by Alan Cox. 147 * v0.14 Mar 15 2000 Ollie Lho 148 * 5.1 channel output support with channel binding. What's the Matrix ? 149 * v0.13.1 Mar 10 2000 Ollie Lho 150 * few minor bugs on dual codec support, needs more testing 151 * v0.13 Mar 03 2000 Ollie Lho 152 * new pci_* for 2.4 kernel, back ported to 2.2 153 * v0.12 Feb 23 2000 Ollie Lho 154 * Preliminary Recording support 155 * v0.11.2 Feb 19 2000 Ollie Lho 156 * removed incomplete full-dulplex support 157 * v0.11.1 Jan 28 2000 Ollie Lho 158 * small bug in setting sample rate for 4d-nx (reported by Aaron) 159 * v0.11 Jan 27 2000 Ollie Lho 160 * DMA bug, scheduler latency, second try 161 * v0.10 Jan 24 2000 Ollie Lho 162 * DMA bug fixed, found kernel scheduling problem 163 * v0.09 Jan 20 2000 Ollie Lho 164 * Clean up of channel register access routine (prepare for channel binding) 165 * v0.08 Jan 14 2000 Ollie Lho 166 * Isolation of AC97 codec code 167 * v0.07 Jan 13 2000 Ollie Lho 168 * Get rid of ugly old low level access routines (e.g. CHRegs.lp****) 169 * v0.06 Jan 11 2000 Ollie Lho 170 * Preliminary support for dual (more ?) AC97 codecs 171 * v0.05 Jan 08 2000 Luca Montecchiani <m.luca@iname.com> 172 * adapt to 2.3.x new __setup/__init call 173 * v0.04 Dec 31 1999 Ollie Lho 174 * Multiple Open, using Middle Loop Interrupt to smooth playback 175 * v0.03 Dec 24 1999 Ollie Lho 176 * mem leak in prog_dmabuf and dealloc_dmabuf removed 177 * v0.02 Dec 15 1999 Ollie Lho 178 * SiS 7018 support added, playback O.K. 179 * v0.01 Alan Cox et. al. 180 * Initial Release in kernel 2.3.30, does not work 181 * 182 * ToDo 183 * Clean up of low level channel register access code. (done) 184 * Fix the bug on dma buffer management in update_ptr, read/write, drain_dac (done) 185 * Dual AC97 codecs support (done) 186 * Recording support (done) 187 * Mmap support 188 * "Channel Binding" ioctl extension (done) 189 * new pci device driver interface for 2.4 kernel (done) 190 * 191 * Lock order (high->low) 192 * lock - hardware lock 193 * open_mutex - guard opens 194 * sem - guard dmabuf, write re-entry etc 195 */ 196 197#include <linux/module.h> 198#include <linux/string.h> 199#include <linux/ctype.h> 200#include <linux/ioport.h> 201#include <linux/sched.h> 202#include <linux/delay.h> 203#include <linux/sound.h> 204#include <linux/slab.h> 205#include <linux/soundcard.h> 206#include <linux/pci.h> 207#include <linux/init.h> 208#include <linux/poll.h> 209#include <linux/spinlock.h> 210#include <linux/ac97_codec.h> 211#include <linux/bitops.h> 212#include <linux/proc_fs.h> 213#include <linux/interrupt.h> 214#include <linux/pm.h> 215#include <linux/gameport.h> 216#include <linux/kernel.h> 217#include <linux/mutex.h> 218#include <linux/mm.h> 219 220#include <asm/uaccess.h> 221#include <asm/io.h> 222#include <asm/dma.h> 223 224#if defined(CONFIG_ALPHA_NAUTILUS) || defined(CONFIG_ALPHA_GENERIC) 225#include <asm/hwrpb.h> 226#endif 227 228#include "trident.h" 229 230#define DRIVER_VERSION "0.14.10j-2.6" 231 232#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) 233#define SUPPORT_JOYSTICK 1 234#endif 235 236/* magic numbers to protect our data structures */ 237#define TRIDENT_CARD_MAGIC 0x5072696E /* "Prin" */ 238#define TRIDENT_STATE_MAGIC 0x63657373 /* "cess" */ 239 240#define TRIDENT_DMA_MASK 0x3fffffff /* DMA buffer mask for pci_alloc_consist */ 241#define ALI_DMA_MASK 0x7fffffff /* ALI Tridents have 31-bit DMA. Wow. */ 242 243#define NR_HW_CH 32 244 245/* maximum number of AC97 codecs connected, AC97 2.0 defined 4, but 7018 and 4D-NX only 246 have 2 SDATA_IN lines (currently) */ 247#define NR_AC97 2 248 249/* minor number of /dev/swmodem (temporary, experimental) */ 250#define SND_DEV_SWMODEM 7 251 252static const unsigned ali_multi_channels_5_1[] = { 253 /*ALI_SURR_LEFT_CHANNEL, ALI_SURR_RIGHT_CHANNEL, */ 254 ALI_CENTER_CHANNEL, 255 ALI_LEF_CHANNEL, 256 ALI_SURR_LEFT_CHANNEL, 257 ALI_SURR_RIGHT_CHANNEL 258}; 259 260static const unsigned sample_size[] = { 1, 2, 2, 4 }; 261static const unsigned sample_shift[] = { 0, 1, 1, 2 }; 262 263static const char invalid_magic[] = KERN_CRIT "trident: invalid magic value in %s\n"; 264 265enum { 266 TRIDENT_4D_DX = 0, 267 TRIDENT_4D_NX, 268 SIS_7018, 269 ALI_5451, 270 CYBER5050 271}; 272 273static char *card_names[] = { 274 "Trident 4DWave DX", 275 "Trident 4DWave NX", 276 "SiS 7018 PCI Audio", 277 "ALi Audio Accelerator", 278 "Tvia/IGST CyberPro 5050" 279}; 280 281static struct pci_device_id trident_pci_tbl[] = { 282 {PCI_DEVICE(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_DX), 283 PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TRIDENT_4D_DX}, 284 {PCI_DEVICE(PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_TRIDENT_4DWAVE_NX), 285 0, 0, TRIDENT_4D_NX}, 286 {PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7018), 0, 0, SIS_7018}, 287 {PCI_DEVICE(PCI_VENDOR_ID_ALI, PCI_DEVICE_ID_ALI_5451), 0, 0, ALI_5451}, 288 {PCI_DEVICE(PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5050), 289 0, 0, CYBER5050}, 290 {0,} 291}; 292 293MODULE_DEVICE_TABLE(pci, trident_pci_tbl); 294 295/* "software" or virtual channel, an instance of opened /dev/dsp */ 296struct trident_state { 297 unsigned int magic; 298 struct trident_card *card; /* Card info */ 299 300 /* file mode */ 301 mode_t open_mode; 302 303 /* virtual channel number */ 304 int virt; 305 306 struct dmabuf { 307 /* wave sample stuff */ 308 unsigned int rate; 309 unsigned char fmt, enable; 310 311 /* hardware channel */ 312 struct trident_channel *channel; 313 314 /* OSS buffer management stuff */ 315 void *rawbuf; 316 dma_addr_t dma_handle; 317 unsigned buforder; 318 unsigned numfrag; 319 unsigned fragshift; 320 321 /* our buffer acts like a circular ring */ 322 unsigned hwptr; /* where dma last started, updated by update_ptr */ 323 unsigned swptr; /* where driver last clear/filled, updated by read/write */ 324 int count; /* bytes to be comsumed or been generated by dma machine */ 325 unsigned total_bytes; /* total bytes dmaed by hardware */ 326 327 unsigned error; /* number of over/underruns */ 328 /* put process on wait queue when no more space in buffer */ 329 wait_queue_head_t wait; 330 331 /* redundant, but makes calculations easier */ 332 unsigned fragsize; 333 unsigned dmasize; 334 unsigned fragsamples; 335 336 /* OSS stuff */ 337 unsigned mapped:1; 338 unsigned ready:1; 339 unsigned endcleared:1; 340 unsigned update_flag; 341 unsigned ossfragshift; 342 int ossmaxfrags; 343 unsigned subdivision; 344 345 } dmabuf; 346 347 /* 5.1 channels */ 348 struct trident_state *other_states[4]; 349 int multi_channels_adjust_count; 350 unsigned chans_num; 351 unsigned long fmt_flag; 352 /* Guard against mmap/write/read races */ 353 struct mutex sem; 354 355}; 356 357/* hardware channels */ 358struct trident_channel { 359 int num; /* channel number */ 360 u32 lba; /* Loop Begine Address, where dma buffer starts */ 361 u32 eso; /* End Sample Offset, wehre dma buffer ends */ 362 /* (in the unit of samples) */ 363 u32 delta; /* delta value, sample rate / 48k for playback, */ 364 /* 48k/sample rate for recording */ 365 u16 attribute; /* control where PCM data go and come */ 366 u16 fm_vol; 367 u32 control; /* signed/unsigned, 8/16 bits, mono/stereo */ 368}; 369 370struct trident_pcm_bank_address { 371 u32 start; 372 u32 stop; 373 u32 aint; 374 u32 aint_en; 375}; 376 377static struct trident_pcm_bank_address bank_a_addrs = { 378 T4D_START_A, 379 T4D_STOP_A, 380 T4D_AINT_A, 381 T4D_AINTEN_A 382}; 383 384static struct trident_pcm_bank_address bank_b_addrs = { 385 T4D_START_B, 386 T4D_STOP_B, 387 T4D_AINT_B, 388 T4D_AINTEN_B 389}; 390 391struct trident_pcm_bank { 392 /* register addresses to control bank operations */ 393 struct trident_pcm_bank_address *addresses; 394 /* each bank has 32 channels */ 395 u32 bitmap; /* channel allocation bitmap */ 396 struct trident_channel channels[32]; 397}; 398 399struct trident_card { 400 unsigned int magic; 401 402 /* We keep trident cards in a linked list */ 403 struct trident_card *next; 404 405 /* single open lock mechanism, only used for recording */ 406 struct mutex open_mutex; 407 408 /* The trident has a certain amount of cross channel interaction 409 so we use a single per card lock */ 410 spinlock_t lock; 411 412 /* PCI device stuff */ 413 struct pci_dev *pci_dev; 414 u16 pci_id; 415 u8 revision; 416 417 /* soundcore stuff */ 418 int dev_audio; 419 420 /* structures for abstraction of hardware facilities, codecs, */ 421 /* banks and channels */ 422 struct ac97_codec *ac97_codec[NR_AC97]; 423 struct trident_pcm_bank banks[NR_BANKS]; 424 struct trident_state *states[NR_HW_CH]; 425 426 /* hardware resources */ 427 unsigned long iobase; 428 u32 irq; 429 430 /* Function support */ 431 struct trident_channel *(*alloc_pcm_channel) (struct trident_card *); 432 struct trident_channel *(*alloc_rec_pcm_channel) (struct trident_card *); 433 void (*free_pcm_channel) (struct trident_card *, unsigned int chan); 434 void (*address_interrupt) (struct trident_card *); 435 436 /* Added by Matt Wu 01-05-2001 for spdif in */ 437 int multi_channel_use_count; 438 int rec_channel_use_count; 439 u16 mixer_regs[64][NR_AC97]; /* Made card local by Alan */ 440 int mixer_regs_ready; 441 442 /* Added for hardware volume control */ 443 int hwvolctl; 444 struct timer_list timer; 445 446 /* Game port support */ 447 struct gameport *gameport; 448}; 449 450enum dmabuf_mode { 451 DM_PLAYBACK = 0, 452 DM_RECORD 453}; 454 455/* table to map from CHANNELMASK to channel attribute for SiS 7018 */ 456static u16 mask2attr[] = { 457 PCM_LR, PCM_LR, SURR_LR, CENTER_LFE, 458 HSET, MIC, MODEM_LINE1, MODEM_LINE2, 459 I2S_LR, SPDIF_LR 460}; 461 462/* table to map from channel attribute to CHANNELMASK for SiS 7018 */ 463static int attr2mask[] = { 464 DSP_BIND_MODEM1, DSP_BIND_MODEM2, DSP_BIND_FRONT, DSP_BIND_HANDSET, 465 DSP_BIND_I2S, DSP_BIND_CENTER_LFE, DSP_BIND_SURR, DSP_BIND_SPDIF 466}; 467 468/* Added by Matt Wu 01-05-2001 for spdif in */ 469static int ali_close_multi_channels(void); 470static void ali_delay(struct trident_card *card, int interval); 471static void ali_detect_spdif_rate(struct trident_card *card); 472 473static void ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val); 474static u16 ali_ac97_read(struct ac97_codec *codec, u8 reg); 475 476static struct trident_card *devs; 477 478static void trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val); 479static u16 trident_ac97_get(struct ac97_codec *codec, u8 reg); 480 481static int trident_open_mixdev(struct inode *inode, struct file *file); 482static int trident_ioctl_mixdev(struct inode *inode, struct file *file, 483 unsigned int cmd, unsigned long arg); 484 485static void ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val); 486static u16 ali_ac97_get(struct trident_card *card, int secondary, u8 reg); 487static void ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate); 488static void ali_enable_special_channel(struct trident_state *stat); 489static struct trident_channel *ali_alloc_rec_pcm_channel(struct trident_card *card); 490static struct trident_channel *ali_alloc_pcm_channel(struct trident_card *card); 491static void ali_free_pcm_channel(struct trident_card *card, unsigned int channel); 492static int ali_setup_multi_channels(struct trident_card *card, int chan_nums); 493static unsigned int ali_get_spdif_in_rate(struct trident_card *card); 494static void ali_setup_spdif_in(struct trident_card *card); 495static void ali_disable_spdif_in(struct trident_card *card); 496static void ali_disable_special_channel(struct trident_card *card, int ch); 497static void ali_setup_spdif_out(struct trident_card *card, int flag); 498static int ali_write_5_1(struct trident_state *state, 499 const char __user *buffer, 500 int cnt_for_multi_channel, unsigned int *copy_count, 501 unsigned int *state_cnt); 502static int ali_allocate_other_states_resources(struct trident_state *state, 503 int chan_nums); 504static void ali_free_other_states_resources(struct trident_state *state); 505 506#define seek_offset(dma_ptr, buffer, cnt, offset, copy_count) do { \ 507 (dma_ptr) += (offset); \ 508 (buffer) += (offset); \ 509 (cnt) -= (offset); \ 510 (copy_count) += (offset); \ 511} while (0) 512 513static inline int lock_set_fmt(struct trident_state* state) 514{ 515 if (test_and_set_bit(0, &state->fmt_flag)) 516 return -EFAULT; 517 518 return 0; 519} 520 521static inline void unlock_set_fmt(struct trident_state* state) 522{ 523 clear_bit(0, &state->fmt_flag); 524} 525 526static int 527trident_enable_loop_interrupts(struct trident_card *card) 528{ 529 u32 global_control; 530 531 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR)); 532 533 switch (card->pci_id) { 534 case PCI_DEVICE_ID_SI_7018: 535 global_control |= (ENDLP_IE | MIDLP_IE | BANK_B_EN); 536 break; 537 case PCI_DEVICE_ID_ALI_5451: 538 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 539 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 540 case PCI_DEVICE_ID_INTERG_5050: 541 global_control |= (ENDLP_IE | MIDLP_IE); 542 break; 543 default: 544 return 0; 545 } 546 547 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR)); 548 549 pr_debug("trident: Enable Loop Interrupts, globctl = 0x%08X\n", 550 inl(TRID_REG(card, T4D_LFO_GC_CIR))); 551 552 return 1; 553} 554 555static int 556trident_disable_loop_interrupts(struct trident_card *card) 557{ 558 u32 global_control; 559 560 global_control = inl(TRID_REG(card, T4D_LFO_GC_CIR)); 561 global_control &= ~(ENDLP_IE | MIDLP_IE); 562 outl(global_control, TRID_REG(card, T4D_LFO_GC_CIR)); 563 564 pr_debug("trident: Disabled Loop Interrupts, globctl = 0x%08X\n", 565 global_control); 566 567 return 1; 568} 569 570static void 571trident_enable_voice_irq(struct trident_card *card, unsigned int channel) 572{ 573 unsigned int mask = 1 << (channel & 0x1f); 574 struct trident_pcm_bank *bank = &card->banks[channel >> 5]; 575 u32 reg, addr = bank->addresses->aint_en; 576 577 reg = inl(TRID_REG(card, addr)); 578 reg |= mask; 579 outl(reg, TRID_REG(card, addr)); 580 581#ifdef DEBUG 582 reg = inl(TRID_REG(card, addr)); 583 pr_debug("trident: enabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n", 584 channel, addr == T4D_AINTEN_B ? "AINTEN_B" : "AINTEN_A", 585 reg, addr); 586#endif /* DEBUG */ 587} 588 589static void 590trident_disable_voice_irq(struct trident_card *card, unsigned int channel) 591{ 592 unsigned int mask = 1 << (channel & 0x1f); 593 struct trident_pcm_bank *bank = &card->banks[channel >> 5]; 594 u32 reg, addr = bank->addresses->aint_en; 595 596 reg = inl(TRID_REG(card, addr)); 597 reg &= ~mask; 598 outl(reg, TRID_REG(card, addr)); 599 600 /* Ack the channel in case the interrupt was set before we disable it. */ 601 outl(mask, TRID_REG(card, bank->addresses->aint)); 602 603#ifdef DEBUG 604 reg = inl(TRID_REG(card, addr)); 605 pr_debug("trident: disabled IRQ on channel %d, %s = 0x%08x(addr:%X)\n", 606 channel, addr == T4D_AINTEN_B ? "AINTEN_B" : "AINTEN_A", 607 reg, addr); 608#endif /* DEBUG */ 609} 610 611static void 612trident_start_voice(struct trident_card *card, unsigned int channel) 613{ 614 unsigned int mask = 1 << (channel & 0x1f); 615 struct trident_pcm_bank *bank = &card->banks[channel >> 5]; 616 u32 addr = bank->addresses->start; 617 618#ifdef DEBUG 619 u32 reg; 620#endif /* DEBUG */ 621 622 outl(mask, TRID_REG(card, addr)); 623 624#ifdef DEBUG 625 reg = inl(TRID_REG(card, addr)); 626 pr_debug("trident: start voice on channel %d, %s = 0x%08x(addr:%X)\n", 627 channel, addr == T4D_START_B ? "START_B" : "START_A", 628 reg, addr); 629#endif /* DEBUG */ 630} 631 632static void 633trident_stop_voice(struct trident_card *card, unsigned int channel) 634{ 635 unsigned int mask = 1 << (channel & 0x1f); 636 struct trident_pcm_bank *bank = &card->banks[channel >> 5]; 637 u32 addr = bank->addresses->stop; 638 639#ifdef DEBUG 640 u32 reg; 641#endif /* DEBUG */ 642 643 outl(mask, TRID_REG(card, addr)); 644 645#ifdef DEBUG 646 reg = inl(TRID_REG(card, addr)); 647 pr_debug("trident: stop voice on channel %d, %s = 0x%08x(addr:%X)\n", 648 channel, addr == T4D_STOP_B ? "STOP_B" : "STOP_A", 649 reg, addr); 650#endif /* DEBUG */ 651} 652 653static u32 654trident_get_interrupt_mask(struct trident_card *card, unsigned int channel) 655{ 656 struct trident_pcm_bank *bank = &card->banks[channel]; 657 u32 addr = bank->addresses->aint; 658 return inl(TRID_REG(card, addr)); 659} 660 661static int 662trident_check_channel_interrupt(struct trident_card *card, unsigned int channel) 663{ 664 unsigned int mask = 1 << (channel & 0x1f); 665 u32 reg = trident_get_interrupt_mask(card, channel >> 5); 666 667#ifdef DEBUG 668 if (reg & mask) 669 pr_debug("trident: channel %d has interrupt, %s = 0x%08x\n", 670 channel, reg == T4D_AINT_B ? "AINT_B" : "AINT_A", 671 reg); 672#endif /* DEBUG */ 673 return (reg & mask) ? 1 : 0; 674} 675 676static void 677trident_ack_channel_interrupt(struct trident_card *card, unsigned int channel) 678{ 679 unsigned int mask = 1 << (channel & 0x1f); 680 struct trident_pcm_bank *bank = &card->banks[channel >> 5]; 681 u32 reg, addr = bank->addresses->aint; 682 683 reg = inl(TRID_REG(card, addr)); 684 reg &= mask; 685 outl(reg, TRID_REG(card, addr)); 686 687#ifdef DEBUG 688 reg = inl(TRID_REG(card, T4D_AINT_B)); 689 pr_debug("trident: Ack channel %d interrupt, AINT_B = 0x%08x\n", 690 channel, reg); 691#endif /* DEBUG */ 692} 693 694static struct trident_channel * 695trident_alloc_pcm_channel(struct trident_card *card) 696{ 697 struct trident_pcm_bank *bank; 698 int idx; 699 700 bank = &card->banks[BANK_B]; 701 702 for (idx = 31; idx >= 0; idx--) { 703 if (!(bank->bitmap & (1 << idx))) { 704 struct trident_channel *channel = &bank->channels[idx]; 705 bank->bitmap |= 1 << idx; 706 channel->num = idx + 32; 707 return channel; 708 } 709 } 710 711 /* no more free channels available */ 712 printk(KERN_ERR "trident: no more channels available on Bank B.\n"); 713 return NULL; 714} 715 716static void 717trident_free_pcm_channel(struct trident_card *card, unsigned int channel) 718{ 719 int bank; 720 unsigned char b; 721 722 if (channel < 31 || channel > 63) 723 return; 724 725 if (card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_DX || 726 card->pci_id == PCI_DEVICE_ID_TRIDENT_4DWAVE_NX) { 727 b = inb(TRID_REG(card, T4D_REC_CH)); 728 if ((b & ~0x80) == channel) 729 outb(0x0, TRID_REG(card, T4D_REC_CH)); 730 } 731 732 bank = channel >> 5; 733 channel = channel & 0x1f; 734 735 card->banks[bank].bitmap &= ~(1 << (channel)); 736} 737 738static struct trident_channel * 739cyber_alloc_pcm_channel(struct trident_card *card) 740{ 741 struct trident_pcm_bank *bank; 742 int idx; 743 744 /* The cyberpro 5050 has only 32 voices and one bank */ 745 /* .. at least they are not documented (if you want to call that 746 * crap documentation), perhaps broken ? */ 747 748 bank = &card->banks[BANK_A]; 749 750 for (idx = 31; idx >= 0; idx--) { 751 if (!(bank->bitmap & (1 << idx))) { 752 struct trident_channel *channel = &bank->channels[idx]; 753 bank->bitmap |= 1 << idx; 754 channel->num = idx; 755 return channel; 756 } 757 } 758 759 /* no more free channels available */ 760 printk(KERN_ERR "cyberpro5050: no more channels available on Bank A.\n"); 761 return NULL; 762} 763 764static void 765cyber_free_pcm_channel(struct trident_card *card, unsigned int channel) 766{ 767 if (channel > 31) 768 return; 769 card->banks[BANK_A].bitmap &= ~(1 << (channel)); 770} 771 772static inline void 773cyber_outidx(int port, int idx, int data) 774{ 775 outb(idx, port); 776 outb(data, port + 1); 777} 778 779static inline int 780cyber_inidx(int port, int idx) 781{ 782 outb(idx, port); 783 return inb(port + 1); 784} 785 786static int 787cyber_init_ritual(struct trident_card *card) 788{ 789 /* some black magic, taken from SDK samples */ 790 /* remove this and nothing will work */ 791 int portDat; 792 int ret = 0; 793 unsigned long flags; 794 795 /* 796 * Keep interrupts off for the configure - we don't want to 797 * clash with another cyberpro config event 798 */ 799 800 spin_lock_irqsave(&card->lock, flags); 801 portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE); 802 /* enable, if it was disabled */ 803 if ((portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE) { 804 printk(KERN_INFO "cyberpro5050: enabling audio controller\n"); 805 cyber_outidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE, 806 portDat | CYBER_BMSK_AUENZ_ENABLE); 807 /* check again if hardware is enabled now */ 808 portDat = cyber_inidx(CYBER_PORT_AUDIO, CYBER_IDX_AUDIO_ENABLE); 809 } 810 if ((portDat & CYBER_BMSK_AUENZ) != CYBER_BMSK_AUENZ_ENABLE) { 811 printk(KERN_ERR "cyberpro5050: initAudioAccess: no success\n"); 812 ret = -1; 813 } else { 814 cyber_outidx(CYBER_PORT_AUDIO, CYBER_IDX_IRQ_ENABLE, 815 CYBER_BMSK_AUDIO_INT_ENABLE); 816 cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x01); 817 cyber_outidx(CYBER_PORT_AUDIO, 0xba, 0x20); 818 cyber_outidx(CYBER_PORT_AUDIO, 0xbb, 0x08); 819 cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x02); 820 cyber_outidx(CYBER_PORT_AUDIO, 0xb3, 0x06); 821 cyber_outidx(CYBER_PORT_AUDIO, 0xbf, 0x00); 822 } 823 spin_unlock_irqrestore(&card->lock, flags); 824 return ret; 825} 826 827/* called with spin lock held */ 828 829static int 830trident_load_channel_registers(struct trident_card *card, u32 * data, 831 unsigned int channel) 832{ 833 int i; 834 835 if (channel > 63) 836 return 0; 837 838 /* select hardware channel to write */ 839 outb(channel, TRID_REG(card, T4D_LFO_GC_CIR)); 840 841 /* Output the channel registers, but don't write register 842 three to an ALI chip. */ 843 for (i = 0; i < CHANNEL_REGS; i++) { 844 if (i == 3 && card->pci_id == PCI_DEVICE_ID_ALI_5451) 845 continue; 846 outl(data[i], TRID_REG(card, CHANNEL_START + 4 * i)); 847 } 848 if (card->pci_id == PCI_DEVICE_ID_ALI_5451 || 849 card->pci_id == PCI_DEVICE_ID_INTERG_5050) { 850 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF1)); 851 outl(ALI_EMOD_Still, TRID_REG(card, ALI_EBUF2)); 852 } 853 return 1; 854} 855 856/* called with spin lock held */ 857static int 858trident_write_voice_regs(struct trident_state *state) 859{ 860 unsigned int data[CHANNEL_REGS + 1]; 861 struct trident_channel *channel; 862 863 channel = state->dmabuf.channel; 864 865 data[1] = channel->lba; 866 data[4] = channel->control; 867 868 switch (state->card->pci_id) { 869 case PCI_DEVICE_ID_ALI_5451: 870 data[0] = 0; /* Current Sample Offset */ 871 data[2] = (channel->eso << 16) | (channel->delta & 0xffff); 872 data[3] = 0; 873 break; 874 case PCI_DEVICE_ID_SI_7018: 875 case PCI_DEVICE_ID_INTERG_5050: 876 data[0] = 0; /* Current Sample Offset */ 877 data[2] = (channel->eso << 16) | (channel->delta & 0xffff); 878 data[3] = (channel->attribute << 16) | (channel->fm_vol & 0xffff); 879 break; 880 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 881 data[0] = 0; /* Current Sample Offset */ 882 data[2] = (channel->eso << 16) | (channel->delta & 0xffff); 883 data[3] = channel->fm_vol & 0xffff; 884 break; 885 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 886 data[0] = (channel->delta << 24); 887 data[2] = ((channel->delta << 16) & 0xff000000) | 888 (channel->eso & 0x00ffffff); 889 data[3] = channel->fm_vol & 0xffff; 890 break; 891 default: 892 return 0; 893 } 894 895 return trident_load_channel_registers(state->card, data, channel->num); 896} 897 898static int 899compute_rate_play(u32 rate) 900{ 901 int delta; 902 /* We special case 44100 and 8000 since rounding with the equation 903 does not give us an accurate enough value. For 11025 and 22050 904 the equation gives us the best answer. All other frequencies will 905 also use the equation. JDW */ 906 if (rate == 44100) 907 delta = 0xeb3; 908 else if (rate == 8000) 909 delta = 0x2ab; 910 else if (rate == 48000) 911 delta = 0x1000; 912 else 913 delta = (((rate << 12) + rate) / 48000) & 0x0000ffff; 914 return delta; 915} 916 917static int 918compute_rate_rec(u32 rate) 919{ 920 int delta; 921 922 if (rate == 44100) 923 delta = 0x116a; 924 else if (rate == 8000) 925 delta = 0x6000; 926 else if (rate == 48000) 927 delta = 0x1000; 928 else 929 delta = ((48000 << 12) / rate) & 0x0000ffff; 930 931 return delta; 932} 933 934/* set playback sample rate */ 935static unsigned int 936trident_set_dac_rate(struct trident_state *state, unsigned int rate) 937{ 938 struct dmabuf *dmabuf = &state->dmabuf; 939 940 if (rate > 48000) 941 rate = 48000; 942 if (rate < 4000) 943 rate = 4000; 944 945 dmabuf->rate = rate; 946 dmabuf->channel->delta = compute_rate_play(rate); 947 948 trident_write_voice_regs(state); 949 950 pr_debug("trident: called trident_set_dac_rate : rate = %d\n", rate); 951 952 return rate; 953} 954 955/* set recording sample rate */ 956static unsigned int 957trident_set_adc_rate(struct trident_state *state, unsigned int rate) 958{ 959 struct dmabuf *dmabuf = &state->dmabuf; 960 961 if (rate > 48000) 962 rate = 48000; 963 if (rate < 4000) 964 rate = 4000; 965 966 dmabuf->rate = rate; 967 dmabuf->channel->delta = compute_rate_rec(rate); 968 969 trident_write_voice_regs(state); 970 971 pr_debug("trident: called trident_set_adc_rate : rate = %d\n", rate); 972 973 return rate; 974} 975 976/* prepare channel attributes for playback */ 977static void 978trident_play_setup(struct trident_state *state) 979{ 980 struct dmabuf *dmabuf = &state->dmabuf; 981 struct trident_channel *channel = dmabuf->channel; 982 983 channel->lba = dmabuf->dma_handle; 984 channel->delta = compute_rate_play(dmabuf->rate); 985 986 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt]; 987 channel->eso -= 1; 988 989 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) { 990 channel->attribute = 0; 991 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451) { 992 if ((channel->num == ALI_SPDIF_IN_CHANNEL) || 993 (channel->num == ALI_PCM_IN_CHANNEL)) 994 ali_disable_special_channel(state->card, channel->num); 995 else if ((inl(TRID_REG(state->card, ALI_GLOBAL_CONTROL)) 996 & ALI_SPDIF_OUT_CH_ENABLE) 997 && (channel->num == ALI_SPDIF_OUT_CHANNEL)) { 998 ali_set_spdif_out_rate(state->card, 999 state->dmabuf.rate); 1000 state->dmabuf.channel->delta = 0x1000; 1001 } 1002 } 1003 } 1004 1005 channel->fm_vol = 0x0; 1006 1007 channel->control = CHANNEL_LOOP; 1008 if (dmabuf->fmt & TRIDENT_FMT_16BIT) { 1009 /* 16-bits */ 1010 channel->control |= CHANNEL_16BITS; 1011 /* signed */ 1012 channel->control |= CHANNEL_SIGNED; 1013 } 1014 if (dmabuf->fmt & TRIDENT_FMT_STEREO) 1015 /* stereo */ 1016 channel->control |= CHANNEL_STEREO; 1017 1018 pr_debug("trident: trident_play_setup, LBA = 0x%08x, Delta = 0x%08x, " 1019 "ESO = 0x%08x, Control = 0x%08x\n", channel->lba, 1020 channel->delta, channel->eso, channel->control); 1021 1022 trident_write_voice_regs(state); 1023} 1024 1025/* prepare channel attributes for recording */ 1026static void 1027trident_rec_setup(struct trident_state *state) 1028{ 1029 u16 w; 1030 u8 bval; 1031 1032 struct trident_card *card = state->card; 1033 struct dmabuf *dmabuf = &state->dmabuf; 1034 struct trident_channel *channel = dmabuf->channel; 1035 unsigned int rate; 1036 1037 /* Enable AC-97 ADC (capture) */ 1038 switch (card->pci_id) { 1039 case PCI_DEVICE_ID_ALI_5451: 1040 ali_enable_special_channel(state); 1041 break; 1042 case PCI_DEVICE_ID_SI_7018: 1043 /* for 7018, the ac97 is always in playback/record (duplex) mode */ 1044 break; 1045 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 1046 w = inb(TRID_REG(card, DX_ACR2_AC97_COM_STAT)); 1047 outb(w | 0x48, TRID_REG(card, DX_ACR2_AC97_COM_STAT)); 1048 /* enable and set record channel */ 1049 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH)); 1050 break; 1051 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 1052 w = inw(TRID_REG(card, T4D_MISCINT)); 1053 outw(w | 0x1000, TRID_REG(card, T4D_MISCINT)); 1054 /* enable and set record channel */ 1055 outb(0x80 | channel->num, TRID_REG(card, T4D_REC_CH)); 1056 break; 1057 case PCI_DEVICE_ID_INTERG_5050: 1058 /* don't know yet, using special channel 22 in GC1(0xd4)? */ 1059 break; 1060 default: 1061 return; 1062 } 1063 1064 channel->lba = dmabuf->dma_handle; 1065 channel->delta = compute_rate_rec(dmabuf->rate); 1066 if ((card->pci_id == PCI_DEVICE_ID_ALI_5451) && 1067 (channel->num == ALI_SPDIF_IN_CHANNEL)) { 1068 rate = ali_get_spdif_in_rate(card); 1069 if (rate == 0) { 1070 printk(KERN_WARNING "trident: ALi 5451 " 1071 "S/PDIF input setup error!\n"); 1072 rate = 48000; 1073 } 1074 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL)); 1075 if (bval & 0x10) { 1076 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL)); 1077 printk(KERN_WARNING "trident: cleared ALi " 1078 "5451 S/PDIF parity error flag.\n"); 1079 } 1080 1081 if (rate != 48000) 1082 channel->delta = ((rate << 12) / dmabuf->rate) & 0x0000ffff; 1083 } 1084 1085 channel->eso = dmabuf->dmasize >> sample_shift[dmabuf->fmt]; 1086 channel->eso -= 1; 1087 1088 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) { 1089 channel->attribute = 0; 1090 } 1091 1092 channel->fm_vol = 0x0; 1093 1094 channel->control = CHANNEL_LOOP; 1095 if (dmabuf->fmt & TRIDENT_FMT_16BIT) { 1096 /* 16-bits */ 1097 channel->control |= CHANNEL_16BITS; 1098 /* signed */ 1099 channel->control |= CHANNEL_SIGNED; 1100 } 1101 if (dmabuf->fmt & TRIDENT_FMT_STEREO) 1102 /* stereo */ 1103 channel->control |= CHANNEL_STEREO; 1104 1105 pr_debug("trident: trident_rec_setup, LBA = 0x%08x, Delat = 0x%08x, " 1106 "ESO = 0x%08x, Control = 0x%08x\n", channel->lba, 1107 channel->delta, channel->eso, channel->control); 1108 1109 trident_write_voice_regs(state); 1110} 1111 1112/* get current playback/recording dma buffer pointer (byte offset from LBA), 1113 called with spinlock held! */ 1114static inline unsigned 1115trident_get_dma_addr(struct trident_state *state) 1116{ 1117 struct dmabuf *dmabuf = &state->dmabuf; 1118 u32 cso; 1119 1120 if (!dmabuf->enable) 1121 return 0; 1122 1123 outb(dmabuf->channel->num, TRID_REG(state->card, T4D_LFO_GC_CIR)); 1124 1125 switch (state->card->pci_id) { 1126 case PCI_DEVICE_ID_ALI_5451: 1127 case PCI_DEVICE_ID_SI_7018: 1128 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 1129 case PCI_DEVICE_ID_INTERG_5050: 1130 /* 16 bits ESO, CSO for 7018 and DX */ 1131 cso = inw(TRID_REG(state->card, CH_DX_CSO_ALPHA_FMS + 2)); 1132 break; 1133 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 1134 /* 24 bits ESO, CSO for NX */ 1135 cso = inl(TRID_REG(state->card, CH_NX_DELTA_CSO)) & 0x00ffffff; 1136 break; 1137 default: 1138 return 0; 1139 } 1140 1141 pr_debug("trident: trident_get_dma_addr: chip reported channel: %d, " 1142 "cso = 0x%04x\n", dmabuf->channel->num, cso); 1143 1144 /* ESO and CSO are in units of Samples, convert to byte offset */ 1145 cso <<= sample_shift[dmabuf->fmt]; 1146 1147 return (cso % dmabuf->dmasize); 1148} 1149 1150/* Stop recording (lock held) */ 1151static inline void 1152__stop_adc(struct trident_state *state) 1153{ 1154 struct dmabuf *dmabuf = &state->dmabuf; 1155 unsigned int chan_num = dmabuf->channel->num; 1156 struct trident_card *card = state->card; 1157 1158 dmabuf->enable &= ~ADC_RUNNING; 1159 trident_stop_voice(card, chan_num); 1160 trident_disable_voice_irq(card, chan_num); 1161} 1162 1163static void 1164stop_adc(struct trident_state *state) 1165{ 1166 struct trident_card *card = state->card; 1167 unsigned long flags; 1168 1169 spin_lock_irqsave(&card->lock, flags); 1170 __stop_adc(state); 1171 spin_unlock_irqrestore(&card->lock, flags); 1172} 1173 1174static void 1175start_adc(struct trident_state *state) 1176{ 1177 struct dmabuf *dmabuf = &state->dmabuf; 1178 unsigned int chan_num = dmabuf->channel->num; 1179 struct trident_card *card = state->card; 1180 unsigned long flags; 1181 1182 spin_lock_irqsave(&card->lock, flags); 1183 if ((dmabuf->mapped || 1184 dmabuf->count < (signed) dmabuf->dmasize) && 1185 dmabuf->ready) { 1186 dmabuf->enable |= ADC_RUNNING; 1187 trident_enable_voice_irq(card, chan_num); 1188 trident_start_voice(card, chan_num); 1189 } 1190 spin_unlock_irqrestore(&card->lock, flags); 1191} 1192 1193/* stop playback (lock held) */ 1194static inline void 1195__stop_dac(struct trident_state *state) 1196{ 1197 struct dmabuf *dmabuf = &state->dmabuf; 1198 unsigned int chan_num = dmabuf->channel->num; 1199 struct trident_card *card = state->card; 1200 1201 dmabuf->enable &= ~DAC_RUNNING; 1202 trident_stop_voice(card, chan_num); 1203 if (state->chans_num == 6) { 1204 trident_stop_voice(card, state->other_states[0]-> 1205 dmabuf.channel->num); 1206 trident_stop_voice(card, state->other_states[1]-> 1207 dmabuf.channel->num); 1208 trident_stop_voice(card, state->other_states[2]-> 1209 dmabuf.channel->num); 1210 trident_stop_voice(card, state->other_states[3]-> 1211 dmabuf.channel->num); 1212 } 1213 trident_disable_voice_irq(card, chan_num); 1214} 1215 1216static void 1217stop_dac(struct trident_state *state) 1218{ 1219 struct trident_card *card = state->card; 1220 unsigned long flags; 1221 1222 spin_lock_irqsave(&card->lock, flags); 1223 __stop_dac(state); 1224 spin_unlock_irqrestore(&card->lock, flags); 1225} 1226 1227static void 1228start_dac(struct trident_state *state) 1229{ 1230 struct dmabuf *dmabuf = &state->dmabuf; 1231 unsigned int chan_num = dmabuf->channel->num; 1232 struct trident_card *card = state->card; 1233 unsigned long flags; 1234 1235 spin_lock_irqsave(&card->lock, flags); 1236 if ((dmabuf->mapped || dmabuf->count > 0) && dmabuf->ready) { 1237 dmabuf->enable |= DAC_RUNNING; 1238 trident_enable_voice_irq(card, chan_num); 1239 trident_start_voice(card, chan_num); 1240 if (state->chans_num == 6) { 1241 trident_start_voice(card, state->other_states[0]-> 1242 dmabuf.channel->num); 1243 trident_start_voice(card, state->other_states[1]-> 1244 dmabuf.channel->num); 1245 trident_start_voice(card, state->other_states[2]-> 1246 dmabuf.channel->num); 1247 trident_start_voice(card, state->other_states[3]-> 1248 dmabuf.channel->num); 1249 } 1250 } 1251 spin_unlock_irqrestore(&card->lock, flags); 1252} 1253 1254#define DMABUF_DEFAULTORDER (15-PAGE_SHIFT) 1255#define DMABUF_MINORDER 1 1256 1257/* alloc a DMA buffer of with a buffer of this order */ 1258static int 1259alloc_dmabuf(struct dmabuf *dmabuf, struct pci_dev *pci_dev, int order) 1260{ 1261 void *rawbuf = NULL; 1262 struct page *page, *pend; 1263 1264 if (!(rawbuf = pci_alloc_consistent(pci_dev, PAGE_SIZE << order, 1265 &dmabuf->dma_handle))) 1266 return -ENOMEM; 1267 1268 pr_debug("trident: allocated %ld (order = %d) bytes at %p\n", 1269 PAGE_SIZE << order, order, rawbuf); 1270 1271 dmabuf->ready = dmabuf->mapped = 0; 1272 dmabuf->rawbuf = rawbuf; 1273 dmabuf->buforder = order; 1274 1275 /* now mark the pages as reserved; otherwise */ 1276 /* remap_pfn_range doesn't do what we want */ 1277 pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1); 1278 for (page = virt_to_page(rawbuf); page <= pend; page++) 1279 SetPageReserved(page); 1280 1281 return 0; 1282} 1283 1284/* allocate the main DMA buffer, playback and recording buffer should be */ 1285/* allocated separately */ 1286static int 1287alloc_main_dmabuf(struct trident_state *state) 1288{ 1289 struct dmabuf *dmabuf = &state->dmabuf; 1290 int order; 1291 int ret = -ENOMEM; 1292 1293 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--) { 1294 if (!(ret = alloc_dmabuf(dmabuf, state->card->pci_dev, order))) 1295 return 0; 1296 /* else try again */ 1297 } 1298 return ret; 1299} 1300 1301/* deallocate a DMA buffer */ 1302static void 1303dealloc_dmabuf(struct dmabuf *dmabuf, struct pci_dev *pci_dev) 1304{ 1305 struct page *page, *pend; 1306 1307 if (dmabuf->rawbuf) { 1308 /* undo marking the pages as reserved */ 1309 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1); 1310 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++) 1311 ClearPageReserved(page); 1312 pci_free_consistent(pci_dev, PAGE_SIZE << dmabuf->buforder, 1313 dmabuf->rawbuf, dmabuf->dma_handle); 1314 dmabuf->rawbuf = NULL; 1315 } 1316 dmabuf->mapped = dmabuf->ready = 0; 1317} 1318 1319static int 1320prog_dmabuf(struct trident_state *state, enum dmabuf_mode rec) 1321{ 1322 struct dmabuf *dmabuf = &state->dmabuf; 1323 unsigned bytepersec; 1324 struct trident_state *s = state; 1325 unsigned bufsize, dma_nums; 1326 unsigned long flags; 1327 int ret, i, order; 1328 1329 if ((ret = lock_set_fmt(state)) < 0) 1330 return ret; 1331 1332 if (state->chans_num == 6) 1333 dma_nums = 5; 1334 else 1335 dma_nums = 1; 1336 1337 for (i = 0; i < dma_nums; i++) { 1338 if (i > 0) { 1339 s = state->other_states[i - 1]; 1340 dmabuf = &s->dmabuf; 1341 dmabuf->fmt = state->dmabuf.fmt; 1342 dmabuf->rate = state->dmabuf.rate; 1343 } 1344 1345 spin_lock_irqsave(&s->card->lock, flags); 1346 dmabuf->hwptr = dmabuf->swptr = dmabuf->total_bytes = 0; 1347 dmabuf->count = dmabuf->error = 0; 1348 spin_unlock_irqrestore(&s->card->lock, flags); 1349 1350 /* allocate DMA buffer if not allocated yet */ 1351 if (!dmabuf->rawbuf) { 1352 if (i == 0) { 1353 if ((ret = alloc_main_dmabuf(state))) { 1354 unlock_set_fmt(state); 1355 return ret; 1356 } 1357 } else { 1358 ret = -ENOMEM; 1359 order = state->dmabuf.buforder - 1; 1360 if (order >= DMABUF_MINORDER) { 1361 ret = alloc_dmabuf(dmabuf, 1362 state->card->pci_dev, 1363 order); 1364 } 1365 if (ret) { 1366 /* release the main DMA buffer */ 1367 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev); 1368 /* release the auxiliary DMA buffers */ 1369 for (i -= 2; i >= 0; i--) 1370 dealloc_dmabuf(&state->other_states[i]->dmabuf, 1371 state->card->pci_dev); 1372 unlock_set_fmt(state); 1373 return ret; 1374 } 1375 } 1376 } 1377 bytepersec = dmabuf->rate << sample_shift[dmabuf->fmt]; 1378 bufsize = PAGE_SIZE << dmabuf->buforder; 1379 if (dmabuf->ossfragshift) { 1380 if ((1000 << dmabuf->ossfragshift) < bytepersec) 1381 dmabuf->fragshift = ld2(bytepersec / 1000); 1382 else 1383 dmabuf->fragshift = dmabuf->ossfragshift; 1384 } else { 1385 /* lets hand out reasonable big ass buffers by default */ 1386 dmabuf->fragshift = (dmabuf->buforder + PAGE_SHIFT - 2); 1387 } 1388 dmabuf->numfrag = bufsize >> dmabuf->fragshift; 1389 while (dmabuf->numfrag < 4 && dmabuf->fragshift > 3) { 1390 dmabuf->fragshift--; 1391 dmabuf->numfrag = bufsize >> dmabuf->fragshift; 1392 } 1393 dmabuf->fragsize = 1 << dmabuf->fragshift; 1394 if (dmabuf->ossmaxfrags >= 4 && dmabuf->ossmaxfrags < dmabuf->numfrag) 1395 dmabuf->numfrag = dmabuf->ossmaxfrags; 1396 dmabuf->fragsamples = dmabuf->fragsize >> sample_shift[dmabuf->fmt]; 1397 dmabuf->dmasize = dmabuf->numfrag << dmabuf->fragshift; 1398 1399 memset(dmabuf->rawbuf, (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80, 1400 dmabuf->dmasize); 1401 1402 spin_lock_irqsave(&s->card->lock, flags); 1403 if (rec == DM_RECORD) 1404 trident_rec_setup(s); 1405 else /* DM_PLAYBACK */ 1406 trident_play_setup(s); 1407 1408 spin_unlock_irqrestore(&s->card->lock, flags); 1409 1410 /* set the ready flag for the dma buffer */ 1411 dmabuf->ready = 1; 1412 1413 pr_debug("trident: prog_dmabuf(%d), sample rate = %d, " 1414 "format = %d, numfrag = %d, fragsize = %d " 1415 "dmasize = %d\n", dmabuf->channel->num, 1416 dmabuf->rate, dmabuf->fmt, dmabuf->numfrag, 1417 dmabuf->fragsize, dmabuf->dmasize); 1418 } 1419 unlock_set_fmt(state); 1420 return 0; 1421} 1422 1423 1424static inline int prog_dmabuf_record(struct trident_state* state) 1425{ 1426 return prog_dmabuf(state, DM_RECORD); 1427} 1428 1429static inline int prog_dmabuf_playback(struct trident_state* state) 1430{ 1431 return prog_dmabuf(state, DM_PLAYBACK); 1432} 1433 1434/* we are doing quantum mechanics here, the buffer can only be empty, half or full filled i.e. 1435 |------------|------------| or |xxxxxxxxxxxx|------------| or |xxxxxxxxxxxx|xxxxxxxxxxxx| 1436 but we almost always get this 1437 |xxxxxx------|------------| or |xxxxxxxxxxxx|xxxxx-------| 1438 so we have to clear the tail space to "silence" 1439 |xxxxxx000000|------------| or |xxxxxxxxxxxx|xxxxxx000000| 1440*/ 1441static void 1442trident_clear_tail(struct trident_state *state) 1443{ 1444 struct dmabuf *dmabuf = &state->dmabuf; 1445 unsigned swptr; 1446 unsigned char silence = (dmabuf->fmt & TRIDENT_FMT_16BIT) ? 0 : 0x80; 1447 unsigned int len; 1448 unsigned long flags; 1449 1450 spin_lock_irqsave(&state->card->lock, flags); 1451 swptr = dmabuf->swptr; 1452 spin_unlock_irqrestore(&state->card->lock, flags); 1453 1454 if (swptr == 0 || swptr == dmabuf->dmasize / 2 || 1455 swptr == dmabuf->dmasize) 1456 return; 1457 1458 if (swptr < dmabuf->dmasize / 2) 1459 len = dmabuf->dmasize / 2 - swptr; 1460 else 1461 len = dmabuf->dmasize - swptr; 1462 1463 memset(dmabuf->rawbuf + swptr, silence, len); 1464 if (state->card->pci_id != PCI_DEVICE_ID_ALI_5451) { 1465 spin_lock_irqsave(&state->card->lock, flags); 1466 dmabuf->swptr += len; 1467 dmabuf->count += len; 1468 spin_unlock_irqrestore(&state->card->lock, flags); 1469 } 1470 1471 /* restart the dma machine in case it is halted */ 1472 start_dac(state); 1473} 1474 1475static int 1476drain_dac(struct trident_state *state, int nonblock) 1477{ 1478 DECLARE_WAITQUEUE(wait, current); 1479 struct dmabuf *dmabuf = &state->dmabuf; 1480 unsigned long flags; 1481 unsigned long tmo; 1482 int count; 1483 unsigned long diff = 0; 1484 1485 if (dmabuf->mapped || !dmabuf->ready) 1486 return 0; 1487 1488 add_wait_queue(&dmabuf->wait, &wait); 1489 for (;;) { 1490 /* It seems that we have to set the current state to TASK_INTERRUPTIBLE 1491 every time to make the process really go to sleep */ 1492 set_current_state(TASK_INTERRUPTIBLE); 1493 1494 spin_lock_irqsave(&state->card->lock, flags); 1495 count = dmabuf->count; 1496 spin_unlock_irqrestore(&state->card->lock, flags); 1497 1498 if (count <= 0) 1499 break; 1500 1501 if (signal_pending(current)) 1502 break; 1503 1504 if (nonblock) { 1505 remove_wait_queue(&dmabuf->wait, &wait); 1506 set_current_state(TASK_RUNNING); 1507 return -EBUSY; 1508 } 1509 1510 /* No matter how much data is left in the buffer, we have to wait until 1511 CSO == ESO/2 or CSO == ESO when address engine interrupts */ 1512 if (state->card->pci_id == PCI_DEVICE_ID_ALI_5451 || 1513 state->card->pci_id == PCI_DEVICE_ID_INTERG_5050) { 1514 diff = dmabuf->swptr - trident_get_dma_addr(state) + dmabuf->dmasize; 1515 diff = diff % (dmabuf->dmasize); 1516 tmo = (diff * HZ) / dmabuf->rate; 1517 } else { 1518 tmo = (dmabuf->dmasize * HZ) / dmabuf->rate; 1519 } 1520 tmo >>= sample_shift[dmabuf->fmt]; 1521 if (!schedule_timeout(tmo ? tmo : 1) && tmo) { 1522 break; 1523 } 1524 } 1525 remove_wait_queue(&dmabuf->wait, &wait); 1526 set_current_state(TASK_RUNNING); 1527 if (signal_pending(current)) 1528 return -ERESTARTSYS; 1529 1530 return 0; 1531} 1532 1533/* update buffer manangement pointers, especially, */ 1534/* dmabuf->count and dmabuf->hwptr */ 1535static void 1536trident_update_ptr(struct trident_state *state) 1537{ 1538 struct dmabuf *dmabuf = &state->dmabuf; 1539 unsigned hwptr, swptr; 1540 int clear_cnt = 0; 1541 int diff; 1542 unsigned char silence; 1543 unsigned half_dmasize; 1544 1545 /* update hardware pointer */ 1546 hwptr = trident_get_dma_addr(state); 1547 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize; 1548 dmabuf->hwptr = hwptr; 1549 dmabuf->total_bytes += diff; 1550 1551 /* error handling and process wake up for ADC */ 1552 if (dmabuf->enable == ADC_RUNNING) { 1553 if (dmabuf->mapped) { 1554 dmabuf->count -= diff; 1555 if (dmabuf->count >= (signed) dmabuf->fragsize) 1556 wake_up(&dmabuf->wait); 1557 } else { 1558 dmabuf->count += diff; 1559 1560 if (dmabuf->count < 0 || 1561 dmabuf->count > dmabuf->dmasize) { 1562 /* buffer underrun or buffer overrun, */ 1563 /* we have no way to recover it here, just */ 1564 /* stop the machine and let the process */ 1565 /* force hwptr and swptr to sync */ 1566 __stop_adc(state); 1567 dmabuf->error++; 1568 } 1569 if (dmabuf->count < (signed) dmabuf->dmasize / 2) 1570 wake_up(&dmabuf->wait); 1571 } 1572 } 1573 1574 /* error handling and process wake up for DAC */ 1575 if (dmabuf->enable == DAC_RUNNING) { 1576 if (dmabuf->mapped) { 1577 dmabuf->count += diff; 1578 if (dmabuf->count >= (signed) dmabuf->fragsize) 1579 wake_up(&dmabuf->wait); 1580 } else { 1581 dmabuf->count -= diff; 1582 1583 if (dmabuf->count < 0 || 1584 dmabuf->count > dmabuf->dmasize) { 1585 /* buffer underrun or buffer overrun, we have no way to recover 1586 it here, just stop the machine and let the process force hwptr 1587 and swptr to sync */ 1588 __stop_dac(state); 1589 dmabuf->error++; 1590 } else if (!dmabuf->endcleared) { 1591 swptr = dmabuf->swptr; 1592 silence = (dmabuf->fmt & TRIDENT_FMT_16BIT ? 0 : 0x80); 1593 if (dmabuf->update_flag & ALI_ADDRESS_INT_UPDATE) { 1594 /* We must clear end data of 1/2 dmabuf if needed. 1595 According to 1/2 algorithm of Address Engine Interrupt, 1596 check the validation of the data of half dmasize. */ 1597 half_dmasize = dmabuf->dmasize / 2; 1598 if ((diff = hwptr - half_dmasize) < 0) 1599 diff = hwptr; 1600 if ((dmabuf->count + diff) < half_dmasize) { 1601 //there is invalid data in the end of half buffer 1602 if ((clear_cnt = half_dmasize - swptr) < 0) 1603 clear_cnt += half_dmasize; 1604 //clear the invalid data 1605 memset(dmabuf->rawbuf + swptr, silence, clear_cnt); 1606 if (state->chans_num == 6) { 1607 clear_cnt = clear_cnt / 2; 1608 swptr = swptr / 2; 1609 memset(state->other_states[0]->dmabuf.rawbuf + swptr, 1610 silence, clear_cnt); 1611 memset(state->other_states[1]->dmabuf.rawbuf + swptr, 1612 silence, clear_cnt); 1613 memset(state->other_states[2]->dmabuf.rawbuf + swptr, 1614 silence, clear_cnt); 1615 memset(state->other_states[3]->dmabuf.rawbuf + swptr, 1616 silence, clear_cnt); 1617 } 1618 dmabuf->endcleared = 1; 1619 } 1620 } else if (dmabuf->count < (signed) dmabuf->fragsize) { 1621 clear_cnt = dmabuf->fragsize; 1622 if ((swptr + clear_cnt) > dmabuf->dmasize) 1623 clear_cnt = dmabuf->dmasize - swptr; 1624 memset(dmabuf->rawbuf + swptr, silence, clear_cnt); 1625 if (state->chans_num == 6) { 1626 clear_cnt = clear_cnt / 2; 1627 swptr = swptr / 2; 1628 memset(state->other_states[0]->dmabuf.rawbuf + swptr, 1629 silence, clear_cnt); 1630 memset(state->other_states[1]->dmabuf.rawbuf + swptr, 1631 silence, clear_cnt); 1632 memset(state->other_states[2]->dmabuf.rawbuf + swptr, 1633 silence, clear_cnt); 1634 memset(state->other_states[3]->dmabuf.rawbuf + swptr, 1635 silence, clear_cnt); 1636 } 1637 dmabuf->endcleared = 1; 1638 } 1639 } 1640 /* trident_update_ptr is called by interrupt handler or by process via 1641 ioctl/poll, we only wake up the waiting process when we have more 1642 than 1/2 buffer free (always true for interrupt handler) */ 1643 if (dmabuf->count < (signed) dmabuf->dmasize / 2) 1644 wake_up(&dmabuf->wait); 1645 } 1646 } 1647 dmabuf->update_flag &= ~ALI_ADDRESS_INT_UPDATE; 1648} 1649 1650static void 1651trident_address_interrupt(struct trident_card *card) 1652{ 1653 int i; 1654 struct trident_state *state; 1655 unsigned int channel; 1656 1657 /* Update the pointers for all channels we are running. */ 1658 for (i = 0; i < NR_HW_CH; i++) { 1659 channel = 63 - i; 1660 if (trident_check_channel_interrupt(card, channel)) { 1661 trident_ack_channel_interrupt(card, channel); 1662 if ((state = card->states[i]) != NULL) { 1663 trident_update_ptr(state); 1664 } else { 1665 printk(KERN_WARNING "trident: spurious channel " 1666 "irq %d.\n", channel); 1667 trident_stop_voice(card, channel); 1668 trident_disable_voice_irq(card, channel); 1669 } 1670 } 1671 } 1672} 1673 1674static void 1675ali_hwvol_control(struct trident_card *card, int opt) 1676{ 1677 u16 dwTemp, volume[2], mute, diff, *pVol[2]; 1678 1679 dwTemp = ali_ac97_read(card->ac97_codec[0], 0x02); 1680 mute = dwTemp & 0x8000; 1681 volume[0] = dwTemp & 0x001f; 1682 volume[1] = (dwTemp & 0x1f00) >> 8; 1683 if (volume[0] < volume[1]) { 1684 pVol[0] = &volume[0]; 1685 pVol[1] = &volume[1]; 1686 } else { 1687 pVol[1] = &volume[0]; 1688 pVol[0] = &volume[1]; 1689 } 1690 diff = *(pVol[1]) - *(pVol[0]); 1691 1692 if (opt == 1) { // MUTE 1693 dwTemp ^= 0x8000; 1694 ali_ac97_write(card->ac97_codec[0], 1695 0x02, dwTemp); 1696 } else if (opt == 2) { // Down 1697 if (mute) 1698 return; 1699 if (*(pVol[1]) < 0x001f) { 1700 (*pVol[1])++; 1701 *(pVol[0]) = *(pVol[1]) - diff; 1702 } 1703 dwTemp &= 0xe0e0; 1704 dwTemp |= (volume[0]) | (volume[1] << 8); 1705 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp); 1706 card->ac97_codec[0]->mixer_state[0] = ((32 - volume[0]) * 25 / 8) | 1707 (((32 - volume[1]) * 25 / 8) << 8); 1708 } else if (opt == 4) { // Up 1709 if (mute) 1710 return; 1711 if (*(pVol[0]) > 0) { 1712 (*pVol[0])--; 1713 *(pVol[1]) = *(pVol[0]) + diff; 1714 } 1715 dwTemp &= 0xe0e0; 1716 dwTemp |= (volume[0]) | (volume[1] << 8); 1717 ali_ac97_write(card->ac97_codec[0], 0x02, dwTemp); 1718 card->ac97_codec[0]->mixer_state[0] = ((32 - volume[0]) * 25 / 8) | 1719 (((32 - volume[1]) * 25 / 8) << 8); 1720 } else { 1721 /* Nothing needs doing */ 1722 } 1723} 1724 1725/* 1726 * Re-enable reporting of vol change after 0.1 seconds 1727 */ 1728 1729static void 1730ali_timeout(unsigned long ptr) 1731{ 1732 struct trident_card *card = (struct trident_card *) ptr; 1733 u16 temp = 0; 1734 1735 /* Enable GPIO IRQ (MISCINT bit 18h) */ 1736 temp = inw(TRID_REG(card, T4D_MISCINT + 2)); 1737 temp |= 0x0004; 1738 outw(temp, TRID_REG(card, T4D_MISCINT + 2)); 1739} 1740 1741/* 1742 * Set up the timer to clear the vol change notification 1743 */ 1744 1745static void 1746ali_set_timer(struct trident_card *card) 1747{ 1748 /* Add Timer Routine to Enable GPIO IRQ */ 1749 del_timer(&card->timer); /* Never queue twice */ 1750 card->timer.function = ali_timeout; 1751 card->timer.data = (unsigned long) card; 1752 card->timer.expires = jiffies + HZ / 10; 1753 add_timer(&card->timer); 1754} 1755 1756/* 1757 * Process a GPIO event 1758 */ 1759 1760static void 1761ali_queue_task(struct trident_card *card, int opt) 1762{ 1763 u16 temp; 1764 1765 /* Disable GPIO IRQ (MISCINT bit 18h) */ 1766 temp = inw(TRID_REG(card, T4D_MISCINT + 2)); 1767 temp &= (u16) (~0x0004); 1768 outw(temp, TRID_REG(card, T4D_MISCINT + 2)); 1769 1770 /* Adjust the volume */ 1771 ali_hwvol_control(card, opt); 1772 1773 /* Set the timer for 1/10th sec */ 1774 ali_set_timer(card); 1775} 1776 1777static void 1778cyber_address_interrupt(struct trident_card *card) 1779{ 1780 int i, irq_status; 1781 struct trident_state *state; 1782 unsigned int channel; 1783 1784 /* Update the pointers for all channels we are running. */ 1785 /* FIXED: read interrupt status only once */ 1786 irq_status = inl(TRID_REG(card, T4D_AINT_A)); 1787 1788 pr_debug("cyber_address_interrupt: irq_status 0x%X\n", irq_status); 1789 1790 for (i = 0; i < NR_HW_CH; i++) { 1791 channel = 31 - i; 1792 if (irq_status & (1 << channel)) { 1793 /* clear bit by writing a 1, zeroes are ignored */ 1794 outl((1 << channel), TRID_REG(card, T4D_AINT_A)); 1795 1796 pr_debug("cyber_interrupt: channel %d\n", channel); 1797 1798 if ((state = card->states[i]) != NULL) { 1799 trident_update_ptr(state); 1800 } else { 1801 printk(KERN_WARNING "cyber5050: spurious " 1802 "channel irq %d.\n", channel); 1803 trident_stop_voice(card, channel); 1804 trident_disable_voice_irq(card, channel); 1805 } 1806 } 1807 } 1808} 1809 1810static irqreturn_t 1811trident_interrupt(int irq, void *dev_id) 1812{ 1813 struct trident_card *card = (struct trident_card *) dev_id; 1814 u32 event; 1815 u32 gpio; 1816 1817 spin_lock(&card->lock); 1818 event = inl(TRID_REG(card, T4D_MISCINT)); 1819 1820 pr_debug("trident: trident_interrupt called, MISCINT = 0x%08x\n", 1821 event); 1822 1823 if (event & ADDRESS_IRQ) { 1824 card->address_interrupt(card); 1825 } 1826 1827 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 1828 /* GPIO IRQ (H/W Volume Control) */ 1829 event = inl(TRID_REG(card, T4D_MISCINT)); 1830 if (event & (1 << 25)) { 1831 gpio = inl(TRID_REG(card, ALI_GPIO)); 1832 if (!timer_pending(&card->timer)) 1833 ali_queue_task(card, gpio & 0x07); 1834 } 1835 event = inl(TRID_REG(card, T4D_MISCINT)); 1836 outl(event | (ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW), 1837 TRID_REG(card, T4D_MISCINT)); 1838 spin_unlock(&card->lock); 1839 return IRQ_HANDLED; 1840 } 1841 1842 /* manually clear interrupt status, bad hardware design, blame T^2 */ 1843 outl((ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW), 1844 TRID_REG(card, T4D_MISCINT)); 1845 spin_unlock(&card->lock); 1846 return IRQ_HANDLED; 1847} 1848 1849/* in this loop, dmabuf.count signifies the amount of data that is waiting */ 1850/* to be copied to the user's buffer. it is filled by the dma machine and */ 1851/* drained by this loop. */ 1852static ssize_t 1853trident_read(struct file *file, char __user *buffer, size_t count, loff_t * ppos) 1854{ 1855 struct trident_state *state = (struct trident_state *)file->private_data; 1856 struct dmabuf *dmabuf = &state->dmabuf; 1857 ssize_t ret = 0; 1858 unsigned long flags; 1859 unsigned swptr; 1860 int cnt; 1861 1862 pr_debug("trident: trident_read called, count = %zd\n", count); 1863 1864 VALIDATE_STATE(state); 1865 1866 if (dmabuf->mapped) 1867 return -ENXIO; 1868 if (!access_ok(VERIFY_WRITE, buffer, count)) 1869 return -EFAULT; 1870 1871 mutex_lock(&state->sem); 1872 if (!dmabuf->ready && (ret = prog_dmabuf_record(state))) 1873 goto out; 1874 1875 while (count > 0) { 1876 spin_lock_irqsave(&state->card->lock, flags); 1877 if (dmabuf->count > (signed) dmabuf->dmasize) { 1878 /* buffer overrun, we are recovering from */ 1879 /* sleep_on_timeout, resync hwptr and swptr, */ 1880 /* make process flush the buffer */ 1881 dmabuf->count = dmabuf->dmasize; 1882 dmabuf->swptr = dmabuf->hwptr; 1883 } 1884 swptr = dmabuf->swptr; 1885 cnt = dmabuf->dmasize - swptr; 1886 if (dmabuf->count < cnt) 1887 cnt = dmabuf->count; 1888 spin_unlock_irqrestore(&state->card->lock, flags); 1889 1890 if (cnt > count) 1891 cnt = count; 1892 if (cnt <= 0) { 1893 unsigned long tmo; 1894 /* buffer is empty, start the dma machine and */ 1895 /* wait for data to be recorded */ 1896 start_adc(state); 1897 if (file->f_flags & O_NONBLOCK) { 1898 if (!ret) 1899 ret = -EAGAIN; 1900 goto out; 1901 } 1902 1903 mutex_unlock(&state->sem); 1904 /* No matter how much space left in the buffer, */ 1905 /* we have to wait until CSO == ESO/2 or CSO == ESO */ 1906 /* when address engine interrupts */ 1907 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2); 1908 tmo >>= sample_shift[dmabuf->fmt]; 1909 /* There are two situations when sleep_on_timeout returns, one is when 1910 the interrupt is serviced correctly and the process is waked up by 1911 ISR ON TIME. Another is when timeout is expired, which means that 1912 either interrupt is NOT serviced correctly (pending interrupt) or it 1913 is TOO LATE for the process to be scheduled to run (scheduler latency) 1914 which results in a (potential) buffer overrun. And worse, there is 1915 NOTHING we can do to prevent it. */ 1916 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) { 1917 pr_debug(KERN_ERR "trident: recording schedule timeout, " 1918 "dmasz %u fragsz %u count %i hwptr %u swptr %u\n", 1919 dmabuf->dmasize, dmabuf->fragsize, dmabuf->count, 1920 dmabuf->hwptr, dmabuf->swptr); 1921 1922 /* a buffer overrun, we delay the recovery until next time the 1923 while loop begin and we REALLY have space to record */ 1924 } 1925 if (signal_pending(current)) { 1926 if (!ret) 1927 ret = -ERESTARTSYS; 1928 goto out; 1929 } 1930 mutex_lock(&state->sem); 1931 if (dmabuf->mapped) { 1932 if (!ret) 1933 ret = -ENXIO; 1934 goto out; 1935 } 1936 continue; 1937 } 1938 1939 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) { 1940 if (!ret) 1941 ret = -EFAULT; 1942 goto out; 1943 } 1944 1945 swptr = (swptr + cnt) % dmabuf->dmasize; 1946 1947 spin_lock_irqsave(&state->card->lock, flags); 1948 dmabuf->swptr = swptr; 1949 dmabuf->count -= cnt; 1950 spin_unlock_irqrestore(&state->card->lock, flags); 1951 1952 count -= cnt; 1953 buffer += cnt; 1954 ret += cnt; 1955 start_adc(state); 1956 } 1957out: 1958 mutex_unlock(&state->sem); 1959 return ret; 1960} 1961 1962/* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to 1963 the soundcard. it is drained by the dma machine and filled by this loop. */ 1964 1965static ssize_t 1966trident_write(struct file *file, const char __user *buffer, size_t count, loff_t * ppos) 1967{ 1968 struct trident_state *state = (struct trident_state *)file->private_data; 1969 struct dmabuf *dmabuf = &state->dmabuf; 1970 ssize_t ret; 1971 unsigned long flags; 1972 unsigned swptr; 1973 int cnt; 1974 unsigned int state_cnt; 1975 unsigned int copy_count; 1976 int lret; /* for lock_set_fmt */ 1977 1978 pr_debug("trident: trident_write called, count = %zd\n", count); 1979 1980 VALIDATE_STATE(state); 1981 1982 /* 1983 * Guard against an mmap or ioctl while writing 1984 */ 1985 1986 mutex_lock(&state->sem); 1987 1988 if (dmabuf->mapped) { 1989 ret = -ENXIO; 1990 goto out; 1991 } 1992 if (!dmabuf->ready && (ret = prog_dmabuf_playback(state))) 1993 goto out; 1994 1995 if (!access_ok(VERIFY_READ, buffer, count)) { 1996 ret = -EFAULT; 1997 goto out; 1998 } 1999 2000 ret = 0; 2001 2002 while (count > 0) { 2003 spin_lock_irqsave(&state->card->lock, flags); 2004 if (dmabuf->count < 0) { 2005 /* buffer underrun, we are recovering from */ 2006 /* sleep_on_timeout, resync hwptr and swptr */ 2007 dmabuf->count = 0; 2008 dmabuf->swptr = dmabuf->hwptr; 2009 } 2010 swptr = dmabuf->swptr; 2011 cnt = dmabuf->dmasize - swptr; 2012 if (dmabuf->count + cnt > dmabuf->dmasize) 2013 cnt = dmabuf->dmasize - dmabuf->count; 2014 spin_unlock_irqrestore(&state->card->lock, flags); 2015 2016 if (cnt > count) 2017 cnt = count; 2018 if (cnt <= 0) { 2019 unsigned long tmo; 2020 /* buffer is full, start the dma machine and */ 2021 /* wait for data to be played */ 2022 start_dac(state); 2023 if (file->f_flags & O_NONBLOCK) { 2024 if (!ret) 2025 ret = -EAGAIN; 2026 goto out; 2027 } 2028 /* No matter how much data left in the buffer, */ 2029 /* we have to wait until CSO == ESO/2 or CSO == ESO */ 2030 /* when address engine interrupts */ 2031 lock_set_fmt(state); 2032 tmo = (dmabuf->dmasize * HZ) / (dmabuf->rate * 2); 2033 tmo >>= sample_shift[dmabuf->fmt]; 2034 unlock_set_fmt(state); 2035 mutex_unlock(&state->sem); 2036 2037 /* There are two situations when sleep_on_timeout */ 2038 /* returns, one is when the interrupt is serviced */ 2039 /* correctly and the process is waked up by ISR */ 2040 /* ON TIME. Another is when timeout is expired, which */ 2041 /* means that either interrupt is NOT serviced */ 2042 /* correctly (pending interrupt) or it is TOO LATE */ 2043 /* for the process to be scheduled to run */ 2044 /* (scheduler latency) which results in a (potential) */ 2045 /* buffer underrun. And worse, there is NOTHING we */ 2046 /* can do to prevent it. */ 2047 if (!interruptible_sleep_on_timeout(&dmabuf->wait, tmo)) { 2048 pr_debug(KERN_ERR "trident: playback schedule " 2049 "timeout, dmasz %u fragsz %u count %i " 2050 "hwptr %u swptr %u\n", dmabuf->dmasize, 2051 dmabuf->fragsize, dmabuf->count, 2052 dmabuf->hwptr, dmabuf->swptr); 2053 2054 /* a buffer underrun, we delay the recovery */ 2055 /* until next time the while loop begin and */ 2056 /* we REALLY have data to play */ 2057 } 2058 if (signal_pending(current)) { 2059 if (!ret) 2060 ret = -ERESTARTSYS; 2061 goto out_nolock; 2062 } 2063 mutex_lock(&state->sem); 2064 if (dmabuf->mapped) { 2065 if (!ret) 2066 ret = -ENXIO; 2067 goto out; 2068 } 2069 continue; 2070 } 2071 if ((lret = lock_set_fmt(state)) < 0) { 2072 ret = lret; 2073 goto out; 2074 } 2075 2076 if (state->chans_num == 6) { 2077 copy_count = 0; 2078 state_cnt = 0; 2079 if (ali_write_5_1(state, buffer, cnt, ©_count, 2080 &state_cnt) == -EFAULT) { 2081 if (state_cnt) { 2082 swptr = (swptr + state_cnt) % dmabuf->dmasize; 2083 spin_lock_irqsave(&state->card->lock, flags); 2084 dmabuf->swptr = swptr; 2085 dmabuf->count += state_cnt; 2086 dmabuf->endcleared = 0; 2087 spin_unlock_irqrestore(&state->card->lock, flags); 2088 } 2089 ret += copy_count; 2090 if (!ret) 2091 ret = -EFAULT; 2092 unlock_set_fmt(state); 2093 goto out; 2094 } 2095 } else { 2096 if (copy_from_user(dmabuf->rawbuf + swptr, 2097 buffer, cnt)) { 2098 if (!ret) 2099 ret = -EFAULT; 2100 unlock_set_fmt(state); 2101 goto out; 2102 } 2103 state_cnt = cnt; 2104 } 2105 unlock_set_fmt(state); 2106 2107 swptr = (swptr + state_cnt) % dmabuf->dmasize; 2108 2109 spin_lock_irqsave(&state->card->lock, flags); 2110 dmabuf->swptr = swptr; 2111 dmabuf->count += state_cnt; 2112 dmabuf->endcleared = 0; 2113 spin_unlock_irqrestore(&state->card->lock, flags); 2114 2115 count -= cnt; 2116 buffer += cnt; 2117 ret += cnt; 2118 start_dac(state); 2119 } 2120out: 2121 mutex_unlock(&state->sem); 2122out_nolock: 2123 return ret; 2124} 2125 2126/* No kernel lock - we have our own spinlock */ 2127static unsigned int 2128trident_poll(struct file *file, struct poll_table_struct *wait) 2129{ 2130 struct trident_state *state = (struct trident_state *)file->private_data; 2131 struct dmabuf *dmabuf = &state->dmabuf; 2132 unsigned long flags; 2133 unsigned int mask = 0; 2134 2135 VALIDATE_STATE(state); 2136 2137 /* 2138 * Guard against a parallel poll and write causing multiple 2139 * prog_dmabuf events 2140 */ 2141 2142 mutex_lock(&state->sem); 2143 2144 if (file->f_mode & FMODE_WRITE) { 2145 if (!dmabuf->ready && prog_dmabuf_playback(state)) { 2146 mutex_unlock(&state->sem); 2147 return 0; 2148 } 2149 poll_wait(file, &dmabuf->wait, wait); 2150 } 2151 if (file->f_mode & FMODE_READ) { 2152 if (!dmabuf->ready && prog_dmabuf_record(state)) { 2153 mutex_unlock(&state->sem); 2154 return 0; 2155 } 2156 poll_wait(file, &dmabuf->wait, wait); 2157 } 2158 2159 mutex_unlock(&state->sem); 2160 2161 spin_lock_irqsave(&state->card->lock, flags); 2162 trident_update_ptr(state); 2163 if (file->f_mode & FMODE_READ) { 2164 if (dmabuf->count >= (signed) dmabuf->fragsize) 2165 mask |= POLLIN | POLLRDNORM; 2166 } 2167 if (file->f_mode & FMODE_WRITE) { 2168 if (dmabuf->mapped) { 2169 if (dmabuf->count >= (signed) dmabuf->fragsize) 2170 mask |= POLLOUT | POLLWRNORM; 2171 } else { 2172 if ((signed) dmabuf->dmasize >= dmabuf->count + 2173 (signed) dmabuf->fragsize) 2174 mask |= POLLOUT | POLLWRNORM; 2175 } 2176 } 2177 spin_unlock_irqrestore(&state->card->lock, flags); 2178 2179 return mask; 2180} 2181 2182static int 2183trident_mmap(struct file *file, struct vm_area_struct *vma) 2184{ 2185 struct trident_state *state = (struct trident_state *)file->private_data; 2186 struct dmabuf *dmabuf = &state->dmabuf; 2187 int ret = -EINVAL; 2188 unsigned long size; 2189 2190 VALIDATE_STATE(state); 2191 2192 /* 2193 * Lock against poll read write or mmap creating buffers. Also lock 2194 * a read or write against an mmap. 2195 */ 2196 2197 mutex_lock(&state->sem); 2198 2199 if (vma->vm_flags & VM_WRITE) { 2200 if ((ret = prog_dmabuf_playback(state)) != 0) 2201 goto out; 2202 } else if (vma->vm_flags & VM_READ) { 2203 if ((ret = prog_dmabuf_record(state)) != 0) 2204 goto out; 2205 } else 2206 goto out; 2207 2208 ret = -EINVAL; 2209 if (vma->vm_pgoff != 0) 2210 goto out; 2211 size = vma->vm_end - vma->vm_start; 2212 if (size > (PAGE_SIZE << dmabuf->buforder)) 2213 goto out; 2214 ret = -EAGAIN; 2215 if (remap_pfn_range(vma, vma->vm_start, 2216 virt_to_phys(dmabuf->rawbuf) >> PAGE_SHIFT, 2217 size, vma->vm_page_prot)) 2218 goto out; 2219 dmabuf->mapped = 1; 2220 ret = 0; 2221out: 2222 mutex_unlock(&state->sem); 2223 return ret; 2224} 2225 2226static int 2227trident_ioctl(struct inode *inode, struct file *file, 2228 unsigned int cmd, unsigned long arg) 2229{ 2230 struct trident_state *state = (struct trident_state *)file->private_data; 2231 struct dmabuf *dmabuf = &state->dmabuf; 2232 unsigned long flags; 2233 audio_buf_info abinfo; 2234 count_info cinfo; 2235 int val, mapped, ret = 0; 2236 struct trident_card *card = state->card; 2237 void __user *argp = (void __user *)arg; 2238 int __user *p = argp; 2239 2240 VALIDATE_STATE(state); 2241 2242 2243 mapped = ((file->f_mode & (FMODE_WRITE | FMODE_READ)) && dmabuf->mapped); 2244 2245 pr_debug("trident: trident_ioctl, command = %2d, arg = 0x%08x\n", 2246 _IOC_NR(cmd), arg ? *p : 0); 2247 2248 switch (cmd) { 2249 case OSS_GETVERSION: 2250 ret = put_user(SOUND_VERSION, p); 2251 break; 2252 2253 case SNDCTL_DSP_RESET: 2254 if (file->f_mode & FMODE_WRITE) { 2255 stop_dac(state); 2256 synchronize_irq(card->irq); 2257 dmabuf->ready = 0; 2258 dmabuf->swptr = dmabuf->hwptr = 0; 2259 dmabuf->count = dmabuf->total_bytes = 0; 2260 } 2261 if (file->f_mode & FMODE_READ) { 2262 stop_adc(state); 2263 synchronize_irq(card->irq); 2264 dmabuf->ready = 0; 2265 dmabuf->swptr = dmabuf->hwptr = 0; 2266 dmabuf->count = dmabuf->total_bytes = 0; 2267 } 2268 break; 2269 2270 case SNDCTL_DSP_SYNC: 2271 if (file->f_mode & FMODE_WRITE) 2272 ret = drain_dac(state, file->f_flags & O_NONBLOCK); 2273 break; 2274 2275 case SNDCTL_DSP_SPEED: /* set smaple rate */ 2276 if (get_user(val, p)) { 2277 ret = -EFAULT; 2278 break; 2279 } 2280 if (val >= 0) { 2281 if (file->f_mode & FMODE_WRITE) { 2282 stop_dac(state); 2283 dmabuf->ready = 0; 2284 spin_lock_irqsave(&state->card->lock, flags); 2285 trident_set_dac_rate(state, val); 2286 spin_unlock_irqrestore(&state->card->lock, flags); 2287 } 2288 if (file->f_mode & FMODE_READ) { 2289 stop_adc(state); 2290 dmabuf->ready = 0; 2291 spin_lock_irqsave(&state->card->lock, flags); 2292 trident_set_adc_rate(state, val); 2293 spin_unlock_irqrestore(&state->card->lock, flags); 2294 } 2295 } 2296 ret = put_user(dmabuf->rate, p); 2297 break; 2298 2299 case SNDCTL_DSP_STEREO: /* set stereo or mono channel */ 2300 if (get_user(val, p)) { 2301 ret = -EFAULT; 2302 break; 2303 } 2304 if ((ret = lock_set_fmt(state)) < 0) 2305 return ret; 2306 2307 if (file->f_mode & FMODE_WRITE) { 2308 stop_dac(state); 2309 dmabuf->ready = 0; 2310 if (val) 2311 dmabuf->fmt |= TRIDENT_FMT_STEREO; 2312 else 2313 dmabuf->fmt &= ~TRIDENT_FMT_STEREO; 2314 } 2315 if (file->f_mode & FMODE_READ) { 2316 stop_adc(state); 2317 dmabuf->ready = 0; 2318 if (val) 2319 dmabuf->fmt |= TRIDENT_FMT_STEREO; 2320 else 2321 dmabuf->fmt &= ~TRIDENT_FMT_STEREO; 2322 } 2323 unlock_set_fmt(state); 2324 break; 2325 2326 case SNDCTL_DSP_GETBLKSIZE: 2327 if (file->f_mode & FMODE_WRITE) { 2328 if ((val = prog_dmabuf_playback(state))) 2329 ret = val; 2330 else 2331 ret = put_user(dmabuf->fragsize, p); 2332 break; 2333 } 2334 if (file->f_mode & FMODE_READ) { 2335 if ((val = prog_dmabuf_record(state))) 2336 ret = val; 2337 else 2338 ret = put_user(dmabuf->fragsize, p); 2339 break; 2340 } 2341 /* neither READ nor WRITE? is this even possible? */ 2342 ret = -EINVAL; 2343 break; 2344 2345 2346 case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format */ 2347 ret = put_user(AFMT_S16_LE | AFMT_U16_LE | AFMT_S8 | 2348 AFMT_U8, p); 2349 break; 2350 2351 case SNDCTL_DSP_SETFMT: /* Select sample format */ 2352 if (get_user(val, p)) { 2353 ret = -EFAULT; 2354 break; 2355 } 2356 if ((ret = lock_set_fmt(state)) < 0) 2357 return ret; 2358 2359 if (val != AFMT_QUERY) { 2360 if (file->f_mode & FMODE_WRITE) { 2361 stop_dac(state); 2362 dmabuf->ready = 0; 2363 if (val == AFMT_S16_LE) 2364 dmabuf->fmt |= TRIDENT_FMT_16BIT; 2365 else 2366 dmabuf->fmt &= ~TRIDENT_FMT_16BIT; 2367 } 2368 if (file->f_mode & FMODE_READ) { 2369 stop_adc(state); 2370 dmabuf->ready = 0; 2371 if (val == AFMT_S16_LE) 2372 dmabuf->fmt |= TRIDENT_FMT_16BIT; 2373 else 2374 dmabuf->fmt &= ~TRIDENT_FMT_16BIT; 2375 } 2376 } 2377 unlock_set_fmt(state); 2378 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ? AFMT_S16_LE : 2379 AFMT_U8, p); 2380 break; 2381 2382 case SNDCTL_DSP_CHANNELS: 2383 if (get_user(val, p)) { 2384 ret = -EFAULT; 2385 break; 2386 } 2387 if (val != 0) { 2388 if ((ret = lock_set_fmt(state)) < 0) 2389 return ret; 2390 2391 if (file->f_mode & FMODE_WRITE) { 2392 stop_dac(state); 2393 dmabuf->ready = 0; 2394 2395 //prevent from memory leak 2396 if ((state->chans_num > 2) && (state->chans_num != val)) { 2397 ali_free_other_states_resources(state); 2398 state->chans_num = 1; 2399 } 2400 2401 if (val >= 2) { 2402 2403 dmabuf->fmt |= TRIDENT_FMT_STEREO; 2404 if ((val == 6) && (state->card->pci_id == PCI_DEVICE_ID_ALI_5451)) { 2405 if (card->rec_channel_use_count > 0) { 2406 printk(KERN_ERR "trident: Record is " 2407 "working on the card!\n"); 2408 ret = -EBUSY; 2409 unlock_set_fmt(state); 2410 break; 2411 } 2412 2413 ret = ali_setup_multi_channels(state->card, 6); 2414 if (ret < 0) { 2415 unlock_set_fmt(state); 2416 break; 2417 } 2418 mutex_lock(&state->card->open_mutex); 2419 ret = ali_allocate_other_states_resources(state, 6); 2420 if (ret < 0) { 2421 mutex_unlock(&state->card->open_mutex); 2422 unlock_set_fmt(state); 2423 break; 2424 } 2425 state->card->multi_channel_use_count++; 2426 mutex_unlock(&state->card->open_mutex); 2427 } else 2428 val = 2; /*yield to 2-channels */ 2429 } else 2430 dmabuf->fmt &= ~TRIDENT_FMT_STEREO; 2431 state->chans_num = val; 2432 } 2433 if (file->f_mode & FMODE_READ) { 2434 stop_adc(state); 2435 dmabuf->ready = 0; 2436 if (val >= 2) { 2437 if (!((file->f_mode & FMODE_WRITE) && 2438 (val == 6))) 2439 val = 2; 2440 dmabuf->fmt |= TRIDENT_FMT_STEREO; 2441 } else 2442 dmabuf->fmt &= ~TRIDENT_FMT_STEREO; 2443 state->chans_num = val; 2444 } 2445 unlock_set_fmt(state); 2446 } 2447 ret = put_user(val, p); 2448 break; 2449 2450 case SNDCTL_DSP_POST: 2451 /* Cause the working fragment to be output */ 2452 break; 2453 2454 case SNDCTL_DSP_SUBDIVIDE: 2455 if (dmabuf->subdivision) { 2456 ret = -EINVAL; 2457 break; 2458 } 2459 if (get_user(val, p)) { 2460 ret = -EFAULT; 2461 break; 2462 } 2463 if (val != 1 && val != 2 && val != 4) { 2464 ret = -EINVAL; 2465 break; 2466 } 2467 dmabuf->subdivision = val; 2468 break; 2469 2470 case SNDCTL_DSP_SETFRAGMENT: 2471 if (get_user(val, p)) { 2472 ret = -EFAULT; 2473 break; 2474 } 2475 2476 dmabuf->ossfragshift = val & 0xffff; 2477 dmabuf->ossmaxfrags = (val >> 16) & 0xffff; 2478 if (dmabuf->ossfragshift < 4) 2479 dmabuf->ossfragshift = 4; 2480 if (dmabuf->ossfragshift > 15) 2481 dmabuf->ossfragshift = 15; 2482 if (dmabuf->ossmaxfrags < 4) 2483 dmabuf->ossmaxfrags = 4; 2484 2485 break; 2486 2487 case SNDCTL_DSP_GETOSPACE: 2488 if (!(file->f_mode & FMODE_WRITE)) { 2489 ret = -EINVAL; 2490 break; 2491 } 2492 if (!dmabuf->ready && (val = prog_dmabuf_playback(state)) != 0) { 2493 ret = val; 2494 break; 2495 } 2496 spin_lock_irqsave(&state->card->lock, flags); 2497 trident_update_ptr(state); 2498 abinfo.fragsize = dmabuf->fragsize; 2499 abinfo.bytes = dmabuf->dmasize - dmabuf->count; 2500 abinfo.fragstotal = dmabuf->numfrag; 2501 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift; 2502 spin_unlock_irqrestore(&state->card->lock, flags); 2503 ret = copy_to_user(argp, &abinfo, sizeof (abinfo)) ? 2504 -EFAULT : 0; 2505 break; 2506 2507 case SNDCTL_DSP_GETISPACE: 2508 if (!(file->f_mode & FMODE_READ)) { 2509 ret = -EINVAL; 2510 break; 2511 } 2512 if (!dmabuf->ready && (val = prog_dmabuf_record(state)) != 0) { 2513 ret = val; 2514 break; 2515 } 2516 spin_lock_irqsave(&state->card->lock, flags); 2517 trident_update_ptr(state); 2518 abinfo.fragsize = dmabuf->fragsize; 2519 abinfo.bytes = dmabuf->count; 2520 abinfo.fragstotal = dmabuf->numfrag; 2521 abinfo.fragments = abinfo.bytes >> dmabuf->fragshift; 2522 spin_unlock_irqrestore(&state->card->lock, flags); 2523 ret = copy_to_user(argp, &abinfo, sizeof (abinfo)) ? 2524 -EFAULT : 0; 2525 break; 2526 2527 case SNDCTL_DSP_NONBLOCK: 2528 file->f_flags |= O_NONBLOCK; 2529 break; 2530 2531 case SNDCTL_DSP_GETCAPS: 2532 ret = put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER | 2533 DSP_CAP_MMAP | DSP_CAP_BIND, p); 2534 break; 2535 2536 case SNDCTL_DSP_GETTRIGGER: 2537 val = 0; 2538 if ((file->f_mode & FMODE_READ) && dmabuf->enable) 2539 val |= PCM_ENABLE_INPUT; 2540 if ((file->f_mode & FMODE_WRITE) && dmabuf->enable) 2541 val |= PCM_ENABLE_OUTPUT; 2542 ret = put_user(val, p); 2543 break; 2544 2545 case SNDCTL_DSP_SETTRIGGER: 2546 if (get_user(val, p)) { 2547 ret = -EFAULT; 2548 break; 2549 } 2550 if (file->f_mode & FMODE_READ) { 2551 if (val & PCM_ENABLE_INPUT) { 2552 if (!dmabuf->ready && 2553 (ret = prog_dmabuf_record(state))) 2554 break; 2555 start_adc(state); 2556 } else 2557 stop_adc(state); 2558 } 2559 if (file->f_mode & FMODE_WRITE) { 2560 if (val & PCM_ENABLE_OUTPUT) { 2561 if (!dmabuf->ready && 2562 (ret = prog_dmabuf_playback(state))) 2563 break; 2564 start_dac(state); 2565 } else 2566 stop_dac(state); 2567 } 2568 break; 2569 2570 case SNDCTL_DSP_GETIPTR: 2571 if (!(file->f_mode & FMODE_READ)) { 2572 ret = -EINVAL; 2573 break; 2574 } 2575 if (!dmabuf->ready && (val = prog_dmabuf_record(state)) 2576 != 0) { 2577 ret = val; 2578 break; 2579 } 2580 spin_lock_irqsave(&state->card->lock, flags); 2581 trident_update_ptr(state); 2582 cinfo.bytes = dmabuf->total_bytes; 2583 cinfo.blocks = dmabuf->count >> dmabuf->fragshift; 2584 cinfo.ptr = dmabuf->hwptr; 2585 if (dmabuf->mapped) 2586 dmabuf->count &= dmabuf->fragsize - 1; 2587 spin_unlock_irqrestore(&state->card->lock, flags); 2588 ret = copy_to_user(argp, &cinfo, sizeof (cinfo)) ? 2589 -EFAULT : 0; 2590 break; 2591 2592 case SNDCTL_DSP_GETOPTR: 2593 if (!(file->f_mode & FMODE_WRITE)) { 2594 ret = -EINVAL; 2595 break; 2596 } 2597 if (!dmabuf->ready && (val = prog_dmabuf_playback(state)) 2598 != 0) { 2599 ret = val; 2600 break; 2601 } 2602 2603 spin_lock_irqsave(&state->card->lock, flags); 2604 trident_update_ptr(state); 2605 cinfo.bytes = dmabuf->total_bytes; 2606 cinfo.blocks = dmabuf->count >> dmabuf->fragshift; 2607 cinfo.ptr = dmabuf->hwptr; 2608 if (dmabuf->mapped) 2609 dmabuf->count &= dmabuf->fragsize - 1; 2610 spin_unlock_irqrestore(&state->card->lock, flags); 2611 ret = copy_to_user(argp, &cinfo, sizeof (cinfo)) ? 2612 -EFAULT : 0; 2613 break; 2614 2615 case SNDCTL_DSP_SETDUPLEX: 2616 ret = -EINVAL; 2617 break; 2618 2619 case SNDCTL_DSP_GETODELAY: 2620 if (!(file->f_mode & FMODE_WRITE)) { 2621 ret = -EINVAL; 2622 break; 2623 } 2624 if (!dmabuf->ready && (val = prog_dmabuf_playback(state)) != 0) { 2625 ret = val; 2626 break; 2627 } 2628 spin_lock_irqsave(&state->card->lock, flags); 2629 trident_update_ptr(state); 2630 val = dmabuf->count; 2631 spin_unlock_irqrestore(&state->card->lock, flags); 2632 ret = put_user(val, p); 2633 break; 2634 2635 case SOUND_PCM_READ_RATE: 2636 ret = put_user(dmabuf->rate, p); 2637 break; 2638 2639 case SOUND_PCM_READ_CHANNELS: 2640 ret = put_user((dmabuf->fmt & TRIDENT_FMT_STEREO) ? 2 : 1, 2641 p); 2642 break; 2643 2644 case SOUND_PCM_READ_BITS: 2645 ret = put_user((dmabuf->fmt & TRIDENT_FMT_16BIT) ? AFMT_S16_LE : 2646 AFMT_U8, p); 2647 break; 2648 2649 case SNDCTL_DSP_GETCHANNELMASK: 2650 ret = put_user(DSP_BIND_FRONT | DSP_BIND_SURR | 2651 DSP_BIND_CENTER_LFE, p); 2652 break; 2653 2654 case SNDCTL_DSP_BIND_CHANNEL: 2655 if (state->card->pci_id != PCI_DEVICE_ID_SI_7018) { 2656 ret = -EINVAL; 2657 break; 2658 } 2659 2660 if (get_user(val, p)) { 2661 ret = -EFAULT; 2662 break; 2663 } 2664 if (val == DSP_BIND_QUERY) { 2665 val = dmabuf->channel->attribute | 0x3c00; 2666 val = attr2mask[val >> 8]; 2667 } else { 2668 dmabuf->ready = 0; 2669 if (file->f_mode & FMODE_READ) 2670 dmabuf->channel->attribute = (CHANNEL_REC | 2671 SRC_ENABLE); 2672 if (file->f_mode & FMODE_WRITE) 2673 dmabuf->channel->attribute = (CHANNEL_SPC_PB | 2674 SRC_ENABLE); 2675 dmabuf->channel->attribute |= mask2attr[ffs(val)]; 2676 } 2677 ret = put_user(val, p); 2678 break; 2679 2680 case SNDCTL_DSP_MAPINBUF: 2681 case SNDCTL_DSP_MAPOUTBUF: 2682 case SNDCTL_DSP_SETSYNCRO: 2683 case SOUND_PCM_WRITE_FILTER: 2684 case SOUND_PCM_READ_FILTER: 2685 default: 2686 ret = -EINVAL; 2687 break; 2688 2689 } 2690 return ret; 2691} 2692 2693static int 2694trident_open(struct inode *inode, struct file *file) 2695{ 2696 int i = 0; 2697 int minor = iminor(inode); 2698 struct trident_card *card = devs; 2699 struct trident_state *state = NULL; 2700 struct dmabuf *dmabuf = NULL; 2701 2702 /* Added by Matt Wu 01-05-2001 */ 2703 /* TODO: there's some redundacy here wrt the check below */ 2704 /* for multi_use_count > 0. Should we return -EBUSY or find */ 2705 /* a different card? for now, don't break current behaviour */ 2706 /* -- mulix */ 2707 if (file->f_mode & FMODE_READ) { 2708 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 2709 if (card->multi_channel_use_count > 0) 2710 return -EBUSY; 2711 } 2712 } 2713 2714 /* find an available virtual channel (instance of /dev/dsp) */ 2715 while (card != NULL) { 2716 mutex_lock(&card->open_mutex); 2717 if (file->f_mode & FMODE_READ) { 2718 /* Skip opens on cards that are in 6 channel mode */ 2719 if (card->multi_channel_use_count > 0) { 2720 mutex_unlock(&card->open_mutex); 2721 card = card->next; 2722 continue; 2723 } 2724 } 2725 for (i = 0; i < NR_HW_CH; i++) { 2726 if (card->states[i] == NULL) { 2727 state = card->states[i] = kzalloc(sizeof(*state), GFP_KERNEL); 2728 if (state == NULL) { 2729 mutex_unlock(&card->open_mutex); 2730 return -ENOMEM; 2731 } 2732 mutex_init(&state->sem); 2733 dmabuf = &state->dmabuf; 2734 goto found_virt; 2735 } 2736 } 2737 mutex_unlock(&card->open_mutex); 2738 card = card->next; 2739 } 2740 /* no more virtual channel avaiable */ 2741 if (!state) { 2742 return -ENODEV; 2743 } 2744 found_virt: 2745 /* found a free virtual channel, allocate hardware channels */ 2746 if (file->f_mode & FMODE_READ) 2747 dmabuf->channel = card->alloc_rec_pcm_channel(card); 2748 else 2749 dmabuf->channel = card->alloc_pcm_channel(card); 2750 2751 if (dmabuf->channel == NULL) { 2752 kfree(card->states[i]); 2753 card->states[i] = NULL; 2754 return -ENODEV; 2755 } 2756 2757 /* initialize the virtual channel */ 2758 state->virt = i; 2759 state->card = card; 2760 state->magic = TRIDENT_STATE_MAGIC; 2761 init_waitqueue_head(&dmabuf->wait); 2762 file->private_data = state; 2763 2764 /* set default sample format. According to OSS Programmer's */ 2765 /* Guide /dev/dsp should be default to unsigned 8-bits, mono, */ 2766 /* with sample rate 8kHz and /dev/dspW will accept 16-bits sample */ 2767 if (file->f_mode & FMODE_WRITE) { 2768 dmabuf->fmt &= ~TRIDENT_FMT_MASK; 2769 if ((minor & 0x0f) == SND_DEV_DSP16) 2770 dmabuf->fmt |= TRIDENT_FMT_16BIT; 2771 dmabuf->ossfragshift = 0; 2772 dmabuf->ossmaxfrags = 0; 2773 dmabuf->subdivision = 0; 2774 if (card->pci_id == PCI_DEVICE_ID_SI_7018) { 2775 /* set default channel attribute to normal playback */ 2776 dmabuf->channel->attribute = CHANNEL_PB; 2777 } 2778 trident_set_dac_rate(state, 8000); 2779 } 2780 2781 if (file->f_mode & FMODE_READ) { 2782 /* 48kHz sample, to be dealed with in trident_set_adc_rate() ?? */ 2783 dmabuf->fmt &= ~TRIDENT_FMT_MASK; 2784 if ((minor & 0x0f) == SND_DEV_DSP16) 2785 dmabuf->fmt |= TRIDENT_FMT_16BIT; 2786 dmabuf->ossfragshift = 0; 2787 dmabuf->ossmaxfrags = 0; 2788 dmabuf->subdivision = 0; 2789 if (card->pci_id == PCI_DEVICE_ID_SI_7018) { 2790 /* set default channel attribute to 0x8a80, record from 2791 PCM L/R FIFO and mono = (left + right + 1)/2 */ 2792 dmabuf->channel->attribute = (CHANNEL_REC | PCM_LR | 2793 MONO_MIX); 2794 } 2795 trident_set_adc_rate(state, 8000); 2796 2797 /* Added by Matt Wu 01-05-2001 */ 2798 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) 2799 card->rec_channel_use_count++; 2800 } 2801 2802 state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE); 2803 mutex_unlock(&card->open_mutex); 2804 2805 pr_debug("trident: open virtual channel %d, hard channel %d\n", 2806 state->virt, dmabuf->channel->num); 2807 2808 return nonseekable_open(inode, file); 2809} 2810 2811static int 2812trident_release(struct inode *inode, struct file *file) 2813{ 2814 struct trident_state *state = (struct trident_state *)file->private_data; 2815 struct trident_card *card; 2816 struct dmabuf *dmabuf; 2817 2818 VALIDATE_STATE(state); 2819 2820 card = state->card; 2821 dmabuf = &state->dmabuf; 2822 2823 if (file->f_mode & FMODE_WRITE) { 2824 trident_clear_tail(state); 2825 drain_dac(state, file->f_flags & O_NONBLOCK); 2826 } 2827 2828 pr_debug("trident: closing virtual channel %d, hard channel %d\n", 2829 state->virt, dmabuf->channel->num); 2830 2831 /* stop DMA state machine and free DMA buffers/channels */ 2832 mutex_lock(&card->open_mutex); 2833 2834 if (file->f_mode & FMODE_WRITE) { 2835 stop_dac(state); 2836 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev); 2837 state->card->free_pcm_channel(state->card, dmabuf->channel->num); 2838 2839 /* Added by Matt Wu */ 2840 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 2841 if (state->chans_num > 2) { 2842 if (card->multi_channel_use_count-- < 0) 2843 card->multi_channel_use_count = 0; 2844 if (card->multi_channel_use_count == 0) 2845 ali_close_multi_channels(); 2846 ali_free_other_states_resources(state); 2847 } 2848 } 2849 } 2850 if (file->f_mode & FMODE_READ) { 2851 stop_adc(state); 2852 dealloc_dmabuf(&state->dmabuf, state->card->pci_dev); 2853 state->card->free_pcm_channel(state->card, dmabuf->channel->num); 2854 2855 /* Added by Matt Wu */ 2856 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 2857 if (card->rec_channel_use_count-- < 0) 2858 card->rec_channel_use_count = 0; 2859 } 2860 } 2861 2862 card->states[state->virt] = NULL; 2863 kfree(state); 2864 2865 /* we're covered by the open_mutex */ 2866 mutex_unlock(&card->open_mutex); 2867 2868 return 0; 2869} 2870 2871static /*const */ struct file_operations trident_audio_fops = { 2872 .owner = THIS_MODULE, 2873 .llseek = no_llseek, 2874 .read = trident_read, 2875 .write = trident_write, 2876 .poll = trident_poll, 2877 .ioctl = trident_ioctl, 2878 .mmap = trident_mmap, 2879 .open = trident_open, 2880 .release = trident_release, 2881}; 2882 2883/* trident specific AC97 functions */ 2884/* Write AC97 codec registers */ 2885static void 2886trident_ac97_set(struct ac97_codec *codec, u8 reg, u16 val) 2887{ 2888 struct trident_card *card = (struct trident_card *)codec->private_data; 2889 unsigned int address, mask, busy; 2890 unsigned short count = 0xffff; 2891 unsigned long flags; 2892 u32 data; 2893 2894 data = ((u32) val) << 16; 2895 2896 switch (card->pci_id) { 2897 default: 2898 case PCI_DEVICE_ID_SI_7018: 2899 address = SI_AC97_WRITE; 2900 mask = SI_AC97_BUSY_WRITE | SI_AC97_AUDIO_BUSY; 2901 if (codec->id) 2902 mask |= SI_AC97_SECONDARY; 2903 busy = SI_AC97_BUSY_WRITE; 2904 break; 2905 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 2906 address = DX_ACR0_AC97_W; 2907 mask = busy = DX_AC97_BUSY_WRITE; 2908 break; 2909 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 2910 address = NX_ACR1_AC97_W; 2911 mask = NX_AC97_BUSY_WRITE; 2912 if (codec->id) 2913 mask |= NX_AC97_WRITE_SECONDARY; 2914 busy = NX_AC97_BUSY_WRITE; 2915 break; 2916 case PCI_DEVICE_ID_INTERG_5050: 2917 address = SI_AC97_WRITE; 2918 mask = busy = SI_AC97_BUSY_WRITE; 2919 if (codec->id) 2920 mask |= SI_AC97_SECONDARY; 2921 break; 2922 } 2923 2924 spin_lock_irqsave(&card->lock, flags); 2925 do { 2926 if ((inw(TRID_REG(card, address)) & busy) == 0) 2927 break; 2928 } while (count--); 2929 2930 data |= (mask | (reg & AC97_REG_ADDR)); 2931 2932 if (count == 0) { 2933 printk(KERN_ERR "trident: AC97 CODEC write timed out.\n"); 2934 spin_unlock_irqrestore(&card->lock, flags); 2935 return; 2936 } 2937 2938 outl(data, TRID_REG(card, address)); 2939 spin_unlock_irqrestore(&card->lock, flags); 2940} 2941 2942/* Read AC97 codec registers */ 2943static u16 2944trident_ac97_get(struct ac97_codec *codec, u8 reg) 2945{ 2946 struct trident_card *card = (struct trident_card *)codec->private_data; 2947 unsigned int address, mask, busy; 2948 unsigned short count = 0xffff; 2949 unsigned long flags; 2950 u32 data; 2951 2952 switch (card->pci_id) { 2953 default: 2954 case PCI_DEVICE_ID_SI_7018: 2955 address = SI_AC97_READ; 2956 mask = SI_AC97_BUSY_READ | SI_AC97_AUDIO_BUSY; 2957 if (codec->id) 2958 mask |= SI_AC97_SECONDARY; 2959 busy = SI_AC97_BUSY_READ; 2960 break; 2961 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 2962 address = DX_ACR1_AC97_R; 2963 mask = busy = DX_AC97_BUSY_READ; 2964 break; 2965 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 2966 if (codec->id) 2967 address = NX_ACR3_AC97_R_SECONDARY; 2968 else 2969 address = NX_ACR2_AC97_R_PRIMARY; 2970 mask = NX_AC97_BUSY_READ; 2971 busy = NX_AC97_BUSY_READ | NX_AC97_BUSY_DATA; 2972 break; 2973 case PCI_DEVICE_ID_INTERG_5050: 2974 address = SI_AC97_READ; 2975 mask = busy = SI_AC97_BUSY_READ; 2976 if (codec->id) 2977 mask |= SI_AC97_SECONDARY; 2978 break; 2979 } 2980 2981 data = (mask | (reg & AC97_REG_ADDR)); 2982 2983 spin_lock_irqsave(&card->lock, flags); 2984 outl(data, TRID_REG(card, address)); 2985 do { 2986 data = inl(TRID_REG(card, address)); 2987 if ((data & busy) == 0) 2988 break; 2989 } while (count--); 2990 spin_unlock_irqrestore(&card->lock, flags); 2991 2992 if (count == 0) { 2993 printk(KERN_ERR "trident: AC97 CODEC read timed out.\n"); 2994 data = 0; 2995 } 2996 return ((u16) (data >> 16)); 2997} 2998 2999/* rewrite ac97 read and write mixer register by hulei for ALI*/ 3000static int 3001acquirecodecaccess(struct trident_card *card) 3002{ 3003 u16 wsemamask = 0x6000; /* bit 14..13 */ 3004 u16 wsemabits; 3005 u16 wcontrol; 3006 int block = 0; 3007 int ncount = 25; 3008 while (1) { 3009 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE)); 3010 wsemabits = wcontrol & wsemamask; 3011 3012 if (wsemabits == 0x4000) 3013 return 1; /* 0x4000 is audio ,then success */ 3014 if (ncount-- < 0) 3015 break; 3016 if (wsemabits == 0) { 3017 unlock: 3018 outl(((u32) (wcontrol & 0x1eff) | 0x00004000), 3019 TRID_REG(card, ALI_AC97_WRITE)); 3020 continue; 3021 } 3022 udelay(20); 3023 } 3024 if (!block) { 3025 pr_debug("accesscodecsemaphore: try unlock\n"); 3026 block = 1; 3027 goto unlock; 3028 } 3029 return 0; 3030} 3031 3032static void 3033releasecodecaccess(struct trident_card *card) 3034{ 3035 unsigned long wcontrol; 3036 wcontrol = inl(TRID_REG(card, ALI_AC97_WRITE)); 3037 outl((wcontrol & 0xffff1eff), TRID_REG(card, ALI_AC97_WRITE)); 3038} 3039 3040static int 3041waitforstimertick(struct trident_card *card) 3042{ 3043 unsigned long chk1, chk2; 3044 unsigned int wcount = 0xffff; 3045 chk1 = inl(TRID_REG(card, ALI_STIMER)); 3046 3047 while (1) { 3048 chk2 = inl(TRID_REG(card, ALI_STIMER)); 3049 if ((wcount > 0) && chk1 != chk2) 3050 return 1; 3051 if (wcount <= 0) 3052 break; 3053 udelay(50); 3054 } 3055 return 0; 3056} 3057 3058/* Read AC97 codec registers for ALi*/ 3059static u16 3060ali_ac97_get(struct trident_card *card, int secondary, u8 reg) 3061{ 3062 unsigned int address, mask; 3063 unsigned int ncount; 3064 unsigned long aud_reg; 3065 u32 data; 3066 u16 wcontrol; 3067 unsigned long flags; 3068 3069 if (!card) 3070 BUG(); 3071 3072 address = ALI_AC97_READ; 3073 if (card->revision == ALI_5451_V02) { 3074 address = ALI_AC97_WRITE; 3075 } 3076 mask = ALI_AC97_READ_ACTION | ALI_AC97_AUDIO_BUSY; 3077 if (secondary) 3078 mask |= ALI_AC97_SECONDARY; 3079 3080 spin_lock_irqsave(&card->lock, flags); 3081 3082 if (!acquirecodecaccess(card)) 3083 printk(KERN_ERR "access codec fail\n"); 3084 3085 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE)); 3086 wcontrol &= 0xfe00; 3087 wcontrol |= (0x8000 | reg); 3088 outw(wcontrol, TRID_REG(card, ALI_AC97_WRITE)); 3089 3090 data = (mask | (reg & AC97_REG_ADDR)); 3091 3092 if (!waitforstimertick(card)) { 3093 printk(KERN_ERR "ali_ac97_read: BIT_CLOCK is dead\n"); 3094 goto releasecodec; 3095 } 3096 3097 udelay(20); 3098 3099 ncount = 10; 3100 3101 while (1) { 3102 if ((inw(TRID_REG(card, ALI_AC97_WRITE)) & ALI_AC97_BUSY_READ) 3103 != 0) 3104 break; 3105 if (ncount <= 0) 3106 break; 3107 if (ncount-- == 1) { 3108 pr_debug("ali_ac97_read :try clear busy flag\n"); 3109 aud_reg = inl(TRID_REG(card, ALI_AC97_WRITE)); 3110 outl((aud_reg & 0xffff7fff), 3111 TRID_REG(card, ALI_AC97_WRITE)); 3112 } 3113 udelay(10); 3114 } 3115 3116 data = inl(TRID_REG(card, address)); 3117 3118 spin_unlock_irqrestore(&card->lock, flags); 3119 3120 return ((u16) (data >> 16)); 3121 3122 releasecodec: 3123 releasecodecaccess(card); 3124 spin_unlock_irqrestore(&card->lock, flags); 3125 printk(KERN_ERR "ali_ac97_read: AC97 CODEC read timed out.\n"); 3126 return 0; 3127} 3128 3129/* Write AC97 codec registers for hulei*/ 3130static void 3131ali_ac97_set(struct trident_card *card, int secondary, u8 reg, u16 val) 3132{ 3133 unsigned int address, mask; 3134 unsigned int ncount; 3135 u32 data; 3136 u16 wcontrol; 3137 unsigned long flags; 3138 3139 data = ((u32) val) << 16; 3140 3141 if (!card) 3142 BUG(); 3143 3144 address = ALI_AC97_WRITE; 3145 mask = ALI_AC97_WRITE_ACTION | ALI_AC97_AUDIO_BUSY; 3146 if (secondary) 3147 mask |= ALI_AC97_SECONDARY; 3148 if (card->revision == ALI_5451_V02) 3149 mask |= ALI_AC97_WRITE_MIXER_REGISTER; 3150 3151 spin_lock_irqsave(&card->lock, flags); 3152 if (!acquirecodecaccess(card)) 3153 printk(KERN_ERR "ali_ac97_write: access codec fail\n"); 3154 3155 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE)); 3156 wcontrol &= 0xff00; 3157 wcontrol |= (0x8100 | reg); /* bit 8=1: (ali1535 )reserved/ */ 3158 /* ali1535+ write */ 3159 outl((data | wcontrol), TRID_REG(card, ALI_AC97_WRITE)); 3160 3161 if (!waitforstimertick(card)) { 3162 printk(KERN_ERR "BIT_CLOCK is dead\n"); 3163 goto releasecodec; 3164 } 3165 3166 ncount = 10; 3167 while (1) { 3168 wcontrol = inw(TRID_REG(card, ALI_AC97_WRITE)); 3169 if (!(wcontrol & 0x8000)) 3170 break; 3171 if (ncount <= 0) 3172 break; 3173 if (ncount-- == 1) { 3174 pr_debug("ali_ac97_set :try clear busy flag!!\n"); 3175 outw(wcontrol & 0x7fff, 3176 TRID_REG(card, ALI_AC97_WRITE)); 3177 } 3178 udelay(10); 3179 } 3180 3181 releasecodec: 3182 releasecodecaccess(card); 3183 spin_unlock_irqrestore(&card->lock, flags); 3184 return; 3185} 3186 3187static void 3188ali_enable_special_channel(struct trident_state *stat) 3189{ 3190 struct trident_card *card = stat->card; 3191 unsigned long s_channels; 3192 3193 s_channels = inl(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3194 s_channels |= (1 << stat->dmabuf.channel->num); 3195 outl(s_channels, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3196} 3197 3198static u16 3199ali_ac97_read(struct ac97_codec *codec, u8 reg) 3200{ 3201 int id; 3202 u16 data; 3203 struct trident_card *card = NULL; 3204 3205 /* Added by Matt Wu */ 3206 if (!codec) 3207 BUG(); 3208 3209 card = (struct trident_card *) codec->private_data; 3210 3211 if (!card->mixer_regs_ready) 3212 return ali_ac97_get(card, codec->id, reg); 3213 3214 if (codec->id) 3215 id = 1; 3216 else 3217 id = 0; 3218 3219 data = card->mixer_regs[reg / 2][id]; 3220 return data; 3221} 3222 3223static void 3224ali_ac97_write(struct ac97_codec *codec, u8 reg, u16 val) 3225{ 3226 int id; 3227 struct trident_card *card; 3228 3229 /* Added by Matt Wu */ 3230 if (!codec) 3231 BUG(); 3232 3233 card = (struct trident_card *) codec->private_data; 3234 3235 if (!card->mixer_regs_ready) { 3236 ali_ac97_set(card, codec->id, reg, val); 3237 return; 3238 } 3239 3240 if (codec->id) 3241 id = 1; 3242 else 3243 id = 0; 3244 3245 card->mixer_regs[reg / 2][id] = val; 3246 ali_ac97_set(card, codec->id, reg, val); 3247} 3248 3249/* 3250flag: ALI_SPDIF_OUT_TO_SPDIF_OUT 3251 ALI_PCM_TO_SPDIF_OUT 3252*/ 3253 3254static void 3255ali_setup_spdif_out(struct trident_card *card, int flag) 3256{ 3257 unsigned long spdif; 3258 unsigned char ch; 3259 3260 char temp; 3261 struct pci_dev *pci_dev = NULL; 3262 3263 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, 3264 pci_dev); 3265 if (pci_dev == NULL) 3266 return; 3267 pci_read_config_byte(pci_dev, 0x61, &temp); 3268 temp |= 0x40; 3269 pci_write_config_byte(pci_dev, 0x61, temp); 3270 pci_read_config_byte(pci_dev, 0x7d, &temp); 3271 temp |= 0x01; 3272 pci_write_config_byte(pci_dev, 0x7d, temp); 3273 pci_read_config_byte(pci_dev, 0x7e, &temp); 3274 temp &= (~0x20); 3275 temp |= 0x10; 3276 pci_write_config_byte(pci_dev, 0x7e, temp); 3277 3278 pci_dev_put(pci_dev); 3279 3280 ch = inb(TRID_REG(card, ALI_SCTRL)); 3281 outb(ch | ALI_SPDIF_OUT_ENABLE, TRID_REG(card, ALI_SCTRL)); 3282 ch = inb(TRID_REG(card, ALI_SPDIF_CTRL)); 3283 outb(ch & ALI_SPDIF_OUT_CH_STATUS, TRID_REG(card, ALI_SPDIF_CTRL)); 3284 3285 if (flag & ALI_SPDIF_OUT_TO_SPDIF_OUT) { 3286 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3287 spdif |= ALI_SPDIF_OUT_CH_ENABLE; 3288 spdif &= ALI_SPDIF_OUT_SEL_SPDIF; 3289 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3290 spdif = inw(TRID_REG(card, ALI_SPDIF_CS)); 3291 if (flag & ALI_SPDIF_OUT_NON_PCM) 3292 spdif |= 0x0002; 3293 else 3294 spdif &= (~0x0002); 3295 outw(spdif, TRID_REG(card, ALI_SPDIF_CS)); 3296 } else { 3297 spdif = inw(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3298 spdif |= ALI_SPDIF_OUT_SEL_PCM; 3299 outw(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3300 } 3301} 3302 3303static void 3304ali_disable_special_channel(struct trident_card *card, int ch) 3305{ 3306 unsigned long sc; 3307 3308 sc = inl(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3309 sc &= ~(1 << ch); 3310 outl(sc, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3311} 3312 3313static void 3314ali_disable_spdif_in(struct trident_card *card) 3315{ 3316 unsigned long spdif; 3317 3318 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3319 spdif &= (~ALI_SPDIF_IN_SUPPORT); 3320 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3321 3322 ali_disable_special_channel(card, ALI_SPDIF_IN_CHANNEL); 3323} 3324 3325static void 3326ali_setup_spdif_in(struct trident_card *card) 3327{ 3328 unsigned long spdif; 3329 3330 //Set SPDIF IN Supported 3331 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3332 spdif |= ALI_SPDIF_IN_SUPPORT; 3333 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3334 3335 //Set SPDIF IN Rec 3336 spdif = inl(TRID_REG(card, ALI_GLOBAL_CONTROL)); 3337 spdif |= ALI_SPDIF_IN_CH_ENABLE; 3338 outl(spdif, TRID_REG(card, ALI_GLOBAL_CONTROL)); 3339 3340 spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL)); 3341 spdif |= ALI_SPDIF_IN_CH_STATUS; 3342 outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL)); 3343/* 3344 spdif = inb(TRID_REG(card, ALI_SPDIF_CTRL)); 3345 spdif |= ALI_SPDIF_IN_FUNC_ENABLE; 3346 outb(spdif, TRID_REG(card, ALI_SPDIF_CTRL)); 3347*/ 3348} 3349 3350static void 3351ali_delay(struct trident_card *card, int interval) 3352{ 3353 unsigned long begintimer, currenttimer; 3354 3355 begintimer = inl(TRID_REG(card, ALI_STIMER)); 3356 currenttimer = inl(TRID_REG(card, ALI_STIMER)); 3357 3358 while (currenttimer < begintimer + interval) 3359 currenttimer = inl(TRID_REG(card, ALI_STIMER)); 3360} 3361 3362static void 3363ali_detect_spdif_rate(struct trident_card *card) 3364{ 3365 u16 wval = 0; 3366 u16 count = 0; 3367 u8 bval = 0, R1 = 0, R2 = 0; 3368 3369 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL)); 3370 bval |= 0x02; 3371 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL)); 3372 3373 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1)); 3374 bval |= 0x1F; 3375 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL + 1)); 3376 3377 while (((R1 < 0x0B) || (R1 > 0x0E)) && (R1 != 0x12) && 3378 count <= 50000) { 3379 count++; 3380 3381 ali_delay(card, 6); 3382 3383 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1)); 3384 R1 = bval & 0x1F; 3385 } 3386 3387 if (count > 50000) { 3388 printk(KERN_WARNING "trident: Error in " 3389 "ali_detect_spdif_rate!\n"); 3390 return; 3391 } 3392 3393 count = 0; 3394 3395 while (count <= 50000) { 3396 count++; 3397 3398 ali_delay(card, 6); 3399 3400 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL + 1)); 3401 R2 = bval & 0x1F; 3402 3403 if (R2 != R1) 3404 R1 = R2; 3405 else 3406 break; 3407 } 3408 3409 if (count > 50000) { 3410 printk(KERN_WARNING "trident: Error in " 3411 "ali_detect_spdif_rate!\n"); 3412 return; 3413 } 3414 3415 switch (R2) { 3416 case 0x0b: 3417 case 0x0c: 3418 case 0x0d: 3419 case 0x0e: 3420 wval = inw(TRID_REG(card, ALI_SPDIF_CTRL + 2)); 3421 wval &= 0xE0F0; 3422 wval |= (u16) 0x09 << 8 | (u16) 0x05; 3423 outw(wval, TRID_REG(card, ALI_SPDIF_CTRL + 2)); 3424 3425 bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3)) & 0xF0; 3426 outb(bval | 0x02, TRID_REG(card, ALI_SPDIF_CS + 3)); 3427 break; 3428 3429 case 0x12: 3430 wval = inw(TRID_REG(card, ALI_SPDIF_CTRL + 2)); 3431 wval &= 0xE0F0; 3432 wval |= (u16) 0x0E << 8 | (u16) 0x08; 3433 outw(wval, TRID_REG(card, ALI_SPDIF_CTRL + 2)); 3434 3435 bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3)) & 0xF0; 3436 outb(bval | 0x03, TRID_REG(card, ALI_SPDIF_CS + 3)); 3437 break; 3438 3439 default: 3440 break; 3441 } 3442 3443} 3444 3445static unsigned int 3446ali_get_spdif_in_rate(struct trident_card *card) 3447{ 3448 u32 dwRate = 0; 3449 u8 bval = 0; 3450 3451 ali_detect_spdif_rate(card); 3452 3453 bval = inb(TRID_REG(card, ALI_SPDIF_CTRL)); 3454 bval &= 0x7F; 3455 bval |= 0x40; 3456 outb(bval, TRID_REG(card, ALI_SPDIF_CTRL)); 3457 3458 bval = inb(TRID_REG(card, ALI_SPDIF_CS + 3)); 3459 bval &= 0x0F; 3460 3461 switch (bval) { 3462 case 0: 3463 dwRate = 44100; 3464 break; 3465 case 1: 3466 dwRate = 48000; 3467 break; 3468 case 2: 3469 dwRate = 32000; 3470 break; 3471 default: 3472 // Error occurs 3473 break; 3474 } 3475 3476 return dwRate; 3477 3478} 3479 3480static int 3481ali_close_multi_channels(void) 3482{ 3483 char temp = 0; 3484 struct pci_dev *pci_dev = NULL; 3485 3486 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, 3487 pci_dev); 3488 if (pci_dev == NULL) 3489 return -1; 3490 3491 pci_read_config_byte(pci_dev, 0x59, &temp); 3492 temp &= ~0x80; 3493 pci_write_config_byte(pci_dev, 0x59, temp); 3494 3495 pci_dev_put(pci_dev); 3496 3497 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, 3498 NULL); 3499 if (pci_dev == NULL) 3500 return -1; 3501 3502 pci_read_config_byte(pci_dev, 0xB8, &temp); 3503 temp &= ~0x20; 3504 pci_write_config_byte(pci_dev, 0xB8, temp); 3505 3506 pci_dev_put(pci_dev); 3507 3508 return 0; 3509} 3510 3511static int 3512ali_setup_multi_channels(struct trident_card *card, int chan_nums) 3513{ 3514 unsigned long dwValue; 3515 char temp = 0; 3516 struct pci_dev *pci_dev = NULL; 3517 3518 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, 3519 pci_dev); 3520 if (pci_dev == NULL) 3521 return -1; 3522 pci_read_config_byte(pci_dev, 0x59, &temp); 3523 temp |= 0x80; 3524 pci_write_config_byte(pci_dev, 0x59, temp); 3525 3526 pci_dev_put(pci_dev); 3527 3528 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, 3529 NULL); 3530 if (pci_dev == NULL) 3531 return -1; 3532 pci_read_config_byte(pci_dev, (int) 0xB8, &temp); 3533 temp |= 0x20; 3534 pci_write_config_byte(pci_dev, (int) 0xB8, (u8) temp); 3535 3536 pci_dev_put(pci_dev); 3537 3538 if (chan_nums == 6) { 3539 dwValue = inl(TRID_REG(card, ALI_SCTRL)) | 0x000f0000; 3540 outl(dwValue, TRID_REG(card, ALI_SCTRL)); 3541 mdelay(4); 3542 dwValue = inl(TRID_REG(card, ALI_SCTRL)); 3543 if (dwValue & 0x2000000) { 3544 ali_ac97_write(card->ac97_codec[0], 0x02, 8080); 3545 ali_ac97_write(card->ac97_codec[0], 0x36, 0); 3546 ali_ac97_write(card->ac97_codec[0], 0x38, 0); 3547 /* 3548 * On a board with a single codec you won't get the 3549 * surround. On other boards configure it. 3550 */ 3551 if (card->ac97_codec[1] != NULL) { 3552 ali_ac97_write(card->ac97_codec[1], 0x36, 0); 3553 ali_ac97_write(card->ac97_codec[1], 0x38, 0); 3554 ali_ac97_write(card->ac97_codec[1], 0x02, 0x0606); 3555 ali_ac97_write(card->ac97_codec[1], 0x18, 0x0303); 3556 ali_ac97_write(card->ac97_codec[1], 0x74, 0x3); 3557 } 3558 return 1; 3559 } 3560 } 3561 return -EINVAL; 3562} 3563 3564static void 3565ali_free_pcm_channel(struct trident_card *card, unsigned int channel) 3566{ 3567 int bank; 3568 3569 if (channel > 31) 3570 return; 3571 3572 bank = channel >> 5; 3573 channel = channel & 0x1f; 3574 3575 card->banks[bank].bitmap &= ~(1 << (channel)); 3576} 3577 3578static int 3579ali_allocate_other_states_resources(struct trident_state *state, int chan_nums) 3580{ 3581 struct trident_card *card = state->card; 3582 struct trident_state *s; 3583 int i, state_count = 0; 3584 struct trident_pcm_bank *bank; 3585 struct trident_channel *channel; 3586 unsigned long num; 3587 3588 bank = &card->banks[BANK_A]; 3589 3590 if (chan_nums != 6) 3591 return 0; 3592 3593 for (i = 0; (i < ALI_CHANNELS) && (state_count != 4); i++) { 3594 if (card->states[i]) 3595 continue; 3596 3597 num = ali_multi_channels_5_1[state_count]; 3598 if (!(bank->bitmap & (1 << num))) { 3599 bank->bitmap |= 1 << num; 3600 channel = &bank->channels[num]; 3601 channel->num = num; 3602 } else { 3603 state_count--; 3604 for (; state_count >= 0; state_count--) { 3605 kfree(state->other_states[state_count]); 3606 num = ali_multi_channels_5_1[state_count]; 3607 ali_free_pcm_channel(card, num); 3608 } 3609 return -EBUSY; 3610 } 3611 s = card->states[i] = kzalloc(sizeof(*state), GFP_KERNEL); 3612 if (!s) { 3613 num = ali_multi_channels_5_1[state_count]; 3614 ali_free_pcm_channel(card, num); 3615 state_count--; 3616 for (; state_count >= 0; state_count--) { 3617 num = ali_multi_channels_5_1[state_count]; 3618 ali_free_pcm_channel(card, num); 3619 kfree(state->other_states[state_count]); 3620 } 3621 return -ENOMEM; 3622 } 3623 3624 s->dmabuf.channel = channel; 3625 s->dmabuf.ossfragshift = s->dmabuf.ossmaxfrags = 3626 s->dmabuf.subdivision = 0; 3627 init_waitqueue_head(&s->dmabuf.wait); 3628 s->magic = card->magic; 3629 s->card = card; 3630 s->virt = i; 3631 ali_enable_special_channel(s); 3632 state->other_states[state_count++] = s; 3633 } 3634 3635 if (state_count != 4) { 3636 state_count--; 3637 for (; state_count >= 0; state_count--) { 3638 kfree(state->other_states[state_count]); 3639 num = ali_multi_channels_5_1[state_count]; 3640 ali_free_pcm_channel(card, num); 3641 } 3642 return -EBUSY; 3643 } 3644 return 0; 3645} 3646 3647#ifdef CONFIG_PM 3648/* save registers for ALi Power Management */ 3649static struct ali_saved_registers { 3650 unsigned long global_regs[ALI_GLOBAL_REGS]; 3651 unsigned long channel_regs[ALI_CHANNELS][ALI_CHANNEL_REGS]; 3652 unsigned mixer_regs[ALI_MIXER_REGS]; 3653} ali_registers; 3654 3655static void 3656ali_save_regs(struct trident_card *card) 3657{ 3658 unsigned long flags; 3659 int i, j; 3660 3661 spin_lock_irqsave(&card->lock, flags); 3662 3663 ali_registers.global_regs[0x2c] = inl(TRID_REG(card, T4D_MISCINT)); 3664 //ali_registers.global_regs[0x20] = inl(TRID_REG(card,T4D_START_A)); 3665 ali_registers.global_regs[0x21] = inl(TRID_REG(card, T4D_STOP_A)); 3666 3667 //disable all IRQ bits 3668 outl(ALI_DISABLE_ALL_IRQ, TRID_REG(card, T4D_MISCINT)); 3669 3670 for (i = 1; i < ALI_MIXER_REGS; i++) 3671 ali_registers.mixer_regs[i] = ali_ac97_read(card->ac97_codec[0], 3672 i * 2); 3673 3674 for (i = 0; i < ALI_GLOBAL_REGS; i++) { 3675 if ((i * 4 == T4D_MISCINT) || (i * 4 == T4D_STOP_A)) 3676 continue; 3677 ali_registers.global_regs[i] = inl(TRID_REG(card, i * 4)); 3678 } 3679 3680 for (i = 0; i < ALI_CHANNELS; i++) { 3681 outb(i, TRID_REG(card, T4D_LFO_GC_CIR)); 3682 for (j = 0; j < ALI_CHANNEL_REGS; j++) 3683 ali_registers.channel_regs[i][j] = inl(TRID_REG(card, 3684 j * 4 + 0xe0)); 3685 } 3686 3687 //Stop all HW channel 3688 outl(ALI_STOP_ALL_CHANNELS, TRID_REG(card, T4D_STOP_A)); 3689 3690 spin_unlock_irqrestore(&card->lock, flags); 3691} 3692 3693static void 3694ali_restore_regs(struct trident_card *card) 3695{ 3696 unsigned long flags; 3697 int i, j; 3698 3699 spin_lock_irqsave(&card->lock, flags); 3700 3701 for (i = 1; i < ALI_MIXER_REGS; i++) 3702 ali_ac97_write(card->ac97_codec[0], i * 2, 3703 ali_registers.mixer_regs[i]); 3704 3705 for (i = 0; i < ALI_CHANNELS; i++) { 3706 outb(i, TRID_REG(card, T4D_LFO_GC_CIR)); 3707 for (j = 0; j < ALI_CHANNEL_REGS; j++) 3708 outl(ali_registers.channel_regs[i][j], 3709 TRID_REG(card, j * 4 + 0xe0)); 3710 } 3711 3712 for (i = 0; i < ALI_GLOBAL_REGS; i++) { 3713 if ((i * 4 == T4D_MISCINT) || (i * 4 == T4D_STOP_A) || 3714 (i * 4 == T4D_START_A)) 3715 continue; 3716 outl(ali_registers.global_regs[i], TRID_REG(card, i * 4)); 3717 } 3718 3719 //start HW channel 3720 outl(ali_registers.global_regs[0x20], TRID_REG(card, T4D_START_A)); 3721 //restore IRQ enable bits 3722 outl(ali_registers.global_regs[0x2c], TRID_REG(card, T4D_MISCINT)); 3723 3724 spin_unlock_irqrestore(&card->lock, flags); 3725} 3726 3727static int 3728trident_suspend(struct pci_dev *dev, pm_message_t unused) 3729{ 3730 struct trident_card *card = pci_get_drvdata(dev); 3731 3732 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 3733 ali_save_regs(card); 3734 } 3735 return 0; 3736} 3737 3738static int 3739trident_resume(struct pci_dev *dev) 3740{ 3741 struct trident_card *card = pci_get_drvdata(dev); 3742 3743 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 3744 ali_restore_regs(card); 3745 } 3746 return 0; 3747} 3748#endif 3749 3750static struct trident_channel * 3751ali_alloc_pcm_channel(struct trident_card *card) 3752{ 3753 struct trident_pcm_bank *bank; 3754 int idx; 3755 3756 bank = &card->banks[BANK_A]; 3757 3758 if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) & 3759 (ALI_SPDIF_OUT_CH_ENABLE)) { 3760 idx = ALI_SPDIF_OUT_CHANNEL; 3761 if (!(bank->bitmap & (1 << idx))) { 3762 struct trident_channel *channel = &bank->channels[idx]; 3763 bank->bitmap |= 1 << idx; 3764 channel->num = idx; 3765 return channel; 3766 } 3767 } 3768 3769 for (idx = ALI_PCM_OUT_CHANNEL_FIRST; idx <= ALI_PCM_OUT_CHANNEL_LAST; 3770 idx++) { 3771 if (!(bank->bitmap & (1 << idx))) { 3772 struct trident_channel *channel = &bank->channels[idx]; 3773 bank->bitmap |= 1 << idx; 3774 channel->num = idx; 3775 return channel; 3776 } 3777 } 3778 3779 /* no more free channels avaliable */ 3780 return NULL; 3781} 3782 3783static struct trident_channel * 3784ali_alloc_rec_pcm_channel(struct trident_card *card) 3785{ 3786 struct trident_pcm_bank *bank; 3787 int idx; 3788 3789 if (inl(TRID_REG(card, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_IN_SUPPORT) 3790 idx = ALI_SPDIF_IN_CHANNEL; 3791 else 3792 idx = ALI_PCM_IN_CHANNEL; 3793 3794 bank = &card->banks[BANK_A]; 3795 3796 if (!(bank->bitmap & (1 << idx))) { 3797 struct trident_channel *channel = &bank->channels[idx]; 3798 bank->bitmap |= 1 << idx; 3799 channel->num = idx; 3800 return channel; 3801 } 3802 3803 /* no free recordable channels avaliable */ 3804 return NULL; 3805} 3806 3807static void 3808ali_set_spdif_out_rate(struct trident_card *card, unsigned int rate) 3809{ 3810 unsigned char ch_st_sel; 3811 unsigned short status_rate; 3812 3813 switch (rate) { 3814 case 44100: 3815 status_rate = 0; 3816 break; 3817 case 32000: 3818 status_rate = 0x300; 3819 break; 3820 case 48000: 3821 default: 3822 status_rate = 0x200; 3823 break; 3824 } 3825 3826 /* select spdif_out */ 3827 ch_st_sel = inb(TRID_REG(card, ALI_SPDIF_CTRL)) & ALI_SPDIF_OUT_CH_STATUS; 3828 3829 ch_st_sel |= 0x80; /* select right */ 3830 outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL)); 3831 outb(status_rate | 0x20, TRID_REG(card, ALI_SPDIF_CS + 2)); 3832 3833 ch_st_sel &= (~0x80); /* select left */ 3834 outb(ch_st_sel, TRID_REG(card, ALI_SPDIF_CTRL)); 3835 outw(status_rate | 0x10, TRID_REG(card, ALI_SPDIF_CS + 2)); 3836} 3837 3838static void 3839ali_address_interrupt(struct trident_card *card) 3840{ 3841 int i, channel; 3842 struct trident_state *state; 3843 u32 mask, channel_mask; 3844 3845 mask = trident_get_interrupt_mask(card, 0); 3846 for (i = 0; i < NR_HW_CH; i++) { 3847 if ((state = card->states[i]) == NULL) 3848 continue; 3849 channel = state->dmabuf.channel->num; 3850 if ((channel_mask = 1 << channel) & mask) { 3851 mask &= ~channel_mask; 3852 trident_ack_channel_interrupt(card, channel); 3853 udelay(100); 3854 state->dmabuf.update_flag |= ALI_ADDRESS_INT_UPDATE; 3855 trident_update_ptr(state); 3856 } 3857 } 3858 if (mask) { 3859 for (i = 0; i < NR_HW_CH; i++) { 3860 if (mask & (1 << i)) { 3861 printk("ali: spurious channel irq %d.\n", i); 3862 trident_ack_channel_interrupt(card, i); 3863 trident_stop_voice(card, i); 3864 trident_disable_voice_irq(card, i); 3865 } 3866 } 3867 } 3868} 3869 3870/* Updating the values of counters of other_states' DMAs without lock 3871protection is no harm because all DMAs of multi-channels and interrupt 3872depend on a master state's DMA, and changing the counters of the master 3873state DMA is protected by a spinlock. 3874*/ 3875static int 3876ali_write_5_1(struct trident_state *state, const char __user *buf, 3877 int cnt_for_multi_channel, unsigned int *copy_count, 3878 unsigned int *state_cnt) 3879{ 3880 3881 struct dmabuf *dmabuf = &state->dmabuf; 3882 struct dmabuf *dmabuf_temp; 3883 const char __user *buffer = buf; 3884 unsigned swptr, other_dma_nums, sample_s; 3885 unsigned int i, loop; 3886 3887 other_dma_nums = 4; 3888 sample_s = sample_size[dmabuf->fmt] >> 1; 3889 swptr = dmabuf->swptr; 3890 3891 if ((i = state->multi_channels_adjust_count) > 0) { 3892 if (i == 1) { 3893 if (copy_from_user(dmabuf->rawbuf + swptr, 3894 buffer, sample_s)) 3895 return -EFAULT; 3896 seek_offset(swptr, buffer, cnt_for_multi_channel, 3897 sample_s, *copy_count); 3898 i--; 3899 (*state_cnt) += sample_s; 3900 state->multi_channels_adjust_count++; 3901 } else 3902 i = i - (state->chans_num - other_dma_nums); 3903 for (; (i < other_dma_nums) && (cnt_for_multi_channel > 0); i++) { 3904 dmabuf_temp = &state->other_states[i]->dmabuf; 3905 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, 3906 buffer, sample_s)) 3907 return -EFAULT; 3908 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, 3909 sample_s, *copy_count); 3910 } 3911 if (cnt_for_multi_channel == 0) 3912 state->multi_channels_adjust_count += i; 3913 } 3914 if (cnt_for_multi_channel > 0) { 3915 loop = cnt_for_multi_channel / (state->chans_num * sample_s); 3916 for (i = 0; i < loop; i++) { 3917 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, 3918 sample_s * 2)) 3919 return -EFAULT; 3920 seek_offset(swptr, buffer, cnt_for_multi_channel, 3921 sample_s * 2, *copy_count); 3922 (*state_cnt) += (sample_s * 2); 3923 3924 dmabuf_temp = &state->other_states[0]->dmabuf; 3925 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, 3926 buffer, sample_s)) 3927 return -EFAULT; 3928 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, 3929 sample_s, *copy_count); 3930 3931 dmabuf_temp = &state->other_states[1]->dmabuf; 3932 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, 3933 buffer, sample_s)) 3934 return -EFAULT; 3935 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, 3936 sample_s, *copy_count); 3937 3938 dmabuf_temp = &state->other_states[2]->dmabuf; 3939 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, 3940 buffer, sample_s)) 3941 return -EFAULT; 3942 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, 3943 sample_s, *copy_count); 3944 3945 dmabuf_temp = &state->other_states[3]->dmabuf; 3946 if (copy_from_user(dmabuf_temp->rawbuf + dmabuf_temp->swptr, 3947 buffer, sample_s)) 3948 return -EFAULT; 3949 seek_offset(dmabuf_temp->swptr, buffer, cnt_for_multi_channel, 3950 sample_s, *copy_count); 3951 } 3952 3953 if (cnt_for_multi_channel > 0) { 3954 state->multi_channels_adjust_count = cnt_for_multi_channel / sample_s; 3955 3956 if (copy_from_user(dmabuf->rawbuf + swptr, buffer, sample_s)) 3957 return -EFAULT; 3958 seek_offset(swptr, buffer, cnt_for_multi_channel, 3959 sample_s, *copy_count); 3960 (*state_cnt) += sample_s; 3961 3962 if (cnt_for_multi_channel > 0) { 3963 if (copy_from_user(dmabuf->rawbuf + swptr, 3964 buffer, sample_s)) 3965 return -EFAULT; 3966 seek_offset(swptr, buffer, cnt_for_multi_channel, 3967 sample_s, *copy_count); 3968 (*state_cnt) += sample_s; 3969 3970 if (cnt_for_multi_channel > 0) { 3971 int diff = state->chans_num - other_dma_nums; 3972 loop = state->multi_channels_adjust_count - diff; 3973 for (i = 0; i < loop; i++) { 3974 dmabuf_temp = &state->other_states[i]->dmabuf; 3975 if (copy_from_user(dmabuf_temp->rawbuf + 3976 dmabuf_temp->swptr, 3977 buffer, sample_s)) 3978 return -EFAULT; 3979 seek_offset(dmabuf_temp->swptr, buffer, 3980 cnt_for_multi_channel, 3981 sample_s, *copy_count); 3982 } 3983 } 3984 } 3985 } else 3986 state->multi_channels_adjust_count = 0; 3987 } 3988 for (i = 0; i < other_dma_nums; i++) { 3989 dmabuf_temp = &state->other_states[i]->dmabuf; 3990 dmabuf_temp->swptr = dmabuf_temp->swptr % dmabuf_temp->dmasize; 3991 } 3992 return *state_cnt; 3993} 3994 3995static void 3996ali_free_other_states_resources(struct trident_state *state) 3997{ 3998 int i; 3999 struct trident_card *card = state->card; 4000 struct trident_state *s; 4001 unsigned other_states_count; 4002 4003 other_states_count = state->chans_num - 2; /* except PCM L/R channels */ 4004 for (i = 0; i < other_states_count; i++) { 4005 s = state->other_states[i]; 4006 dealloc_dmabuf(&s->dmabuf, card->pci_dev); 4007 ali_disable_special_channel(s->card, s->dmabuf.channel->num); 4008 state->card->free_pcm_channel(s->card, s->dmabuf.channel->num); 4009 card->states[s->virt] = NULL; 4010 kfree(s); 4011 } 4012} 4013 4014static struct proc_dir_entry *res; 4015 4016static int 4017ali_write_proc(struct file *file, const char __user *buffer, unsigned long count, void *data) 4018{ 4019 struct trident_card *card = (struct trident_card *) data; 4020 unsigned long flags; 4021 char c; 4022 4023 if (count < 0) 4024 return -EINVAL; 4025 if (count == 0) 4026 return 0; 4027 if (get_user(c, buffer)) 4028 return -EFAULT; 4029 4030 spin_lock_irqsave(&card->lock, flags); 4031 switch (c) { 4032 case '0': 4033 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT); 4034 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL); 4035 break; 4036 case '1': 4037 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT | 4038 ALI_SPDIF_OUT_PCM); 4039 break; 4040 case '2': 4041 ali_setup_spdif_out(card, ALI_SPDIF_OUT_TO_SPDIF_OUT | 4042 ALI_SPDIF_OUT_NON_PCM); 4043 break; 4044 case '3': 4045 ali_disable_spdif_in(card); //default 4046 break; 4047 case '4': 4048 ali_setup_spdif_in(card); 4049 break; 4050 } 4051 spin_unlock_irqrestore(&card->lock, flags); 4052 4053 return count; 4054} 4055 4056/* OSS /dev/mixer file operation methods */ 4057static int 4058trident_open_mixdev(struct inode *inode, struct file *file) 4059{ 4060 int i = 0; 4061 int minor = iminor(inode); 4062 struct trident_card *card = devs; 4063 4064 for (card = devs; card != NULL; card = card->next) 4065 for (i = 0; i < NR_AC97; i++) 4066 if (card->ac97_codec[i] != NULL && 4067 card->ac97_codec[i]->dev_mixer == minor) 4068 goto match; 4069 4070 if (!card) { 4071 return -ENODEV; 4072 } 4073 match: 4074 file->private_data = card->ac97_codec[i]; 4075 4076 return nonseekable_open(inode, file); 4077} 4078 4079static int 4080trident_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, 4081 unsigned long arg) 4082{ 4083 struct ac97_codec *codec = (struct ac97_codec *) file->private_data; 4084 4085 return codec->mixer_ioctl(codec, cmd, arg); 4086} 4087 4088static /*const */ struct file_operations trident_mixer_fops = { 4089 .owner = THIS_MODULE, 4090 .llseek = no_llseek, 4091 .ioctl = trident_ioctl_mixdev, 4092 .open = trident_open_mixdev, 4093}; 4094 4095static int 4096ali_reset_5451(struct trident_card *card) 4097{ 4098 struct pci_dev *pci_dev = NULL; 4099 unsigned int dwVal; 4100 unsigned short wCount, wReg; 4101 4102 pci_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, 4103 pci_dev); 4104 if (pci_dev == NULL) 4105 return -1; 4106 4107 pci_read_config_dword(pci_dev, 0x7c, &dwVal); 4108 pci_write_config_dword(pci_dev, 0x7c, dwVal | 0x08000000); 4109 udelay(5000); 4110 pci_read_config_dword(pci_dev, 0x7c, &dwVal); 4111 pci_write_config_dword(pci_dev, 0x7c, dwVal & 0xf7ffffff); 4112 udelay(5000); 4113 pci_dev_put(pci_dev); 4114 4115 pci_dev = card->pci_dev; 4116 if (pci_dev == NULL) 4117 return -1; 4118 4119 pci_read_config_dword(pci_dev, 0x44, &dwVal); 4120 pci_write_config_dword(pci_dev, 0x44, dwVal | 0x000c0000); 4121 udelay(500); 4122 pci_read_config_dword(pci_dev, 0x44, &dwVal); 4123 pci_write_config_dword(pci_dev, 0x44, dwVal & 0xfffbffff); 4124 udelay(5000); 4125 4126 /* TODO: recognize if we have a PM capable codec and only do this */ 4127 /* if the codec is PM capable */ 4128 wCount = 2000; 4129 while (wCount--) { 4130 wReg = ali_ac97_get(card, 0, AC97_POWER_CONTROL); 4131 if ((wReg & 0x000f) == 0x000f) 4132 return 0; 4133 udelay(5000); 4134 } 4135 /* This is non fatal if you have a non PM capable codec.. */ 4136 return 0; 4137} 4138 4139/* AC97 codec initialisation. */ 4140static int __devinit 4141trident_ac97_init(struct trident_card *card) 4142{ 4143 int num_ac97 = 0; 4144 unsigned long ready_2nd = 0; 4145 struct ac97_codec *codec; 4146 int i = 0; 4147 4148 /* initialize controller side of AC link, and find out if secondary codes 4149 really exist */ 4150 switch (card->pci_id) { 4151 case PCI_DEVICE_ID_ALI_5451: 4152 if (ali_reset_5451(card)) { 4153 printk(KERN_ERR "trident_ac97_init: error " 4154 "resetting 5451.\n"); 4155 return -1; 4156 } 4157 outl(0x80000001, TRID_REG(card, ALI_GLOBAL_CONTROL)); 4158 outl(0x00000000, TRID_REG(card, T4D_AINTEN_A)); 4159 outl(0xffffffff, TRID_REG(card, T4D_AINT_A)); 4160 outl(0x00000000, TRID_REG(card, T4D_MUSICVOL_WAVEVOL)); 4161 outb(0x10, TRID_REG(card, ALI_MPUR2)); 4162 ready_2nd = inl(TRID_REG(card, ALI_SCTRL)); 4163 ready_2nd &= 0x3fff; 4164 outl(ready_2nd | PCMOUT | 0x8000, TRID_REG(card, ALI_SCTRL)); 4165 ready_2nd = inl(TRID_REG(card, ALI_SCTRL)); 4166 ready_2nd &= SI_AC97_SECONDARY_READY; 4167 if (card->revision < ALI_5451_V02) 4168 ready_2nd = 0; 4169 break; 4170 case PCI_DEVICE_ID_SI_7018: 4171 /* disable AC97 GPIO interrupt */ 4172 outl(0x00, TRID_REG(card, SI_AC97_GPIO)); 4173 /* when power up the AC link is in cold reset mode so stop it */ 4174 outl(PCMOUT | SURROUT | CENTEROUT | LFEOUT | SECONDARY_ID, 4175 TRID_REG(card, SI_SERIAL_INTF_CTRL)); 4176 /* it take a long time to recover from a cold reset */ 4177 /* (especially when you have more than one codec) */ 4178 udelay(2000); 4179 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL)); 4180 ready_2nd &= SI_AC97_SECONDARY_READY; 4181 break; 4182 case PCI_DEVICE_ID_TRIDENT_4DWAVE_DX: 4183 /* playback on */ 4184 outl(DX_AC97_PLAYBACK, TRID_REG(card, DX_ACR2_AC97_COM_STAT)); 4185 break; 4186 case PCI_DEVICE_ID_TRIDENT_4DWAVE_NX: 4187 /* enable AC97 Output Slot 3,4 (PCM Left/Right Playback) */ 4188 outl(NX_AC97_PCM_OUTPUT, TRID_REG(card, NX_ACR0_AC97_COM_STAT)); 4189 ready_2nd = inl(TRID_REG(card, NX_ACR0_AC97_COM_STAT)); 4190 ready_2nd &= NX_AC97_SECONDARY_READY; 4191 break; 4192 case PCI_DEVICE_ID_INTERG_5050: 4193 /* disable AC97 GPIO interrupt */ 4194 outl(0x00, TRID_REG(card, SI_AC97_GPIO)); 4195 /* when power up, the AC link is in cold reset mode, so stop it */ 4196 outl(PCMOUT | SURROUT | CENTEROUT | LFEOUT, 4197 TRID_REG(card, SI_SERIAL_INTF_CTRL)); 4198 /* it take a long time to recover from a cold reset (especially */ 4199 /* when you have more than one codec) */ 4200 udelay(2000); 4201 ready_2nd = inl(TRID_REG(card, SI_SERIAL_INTF_CTRL)); 4202 ready_2nd &= SI_AC97_SECONDARY_READY; 4203 break; 4204 } 4205 4206 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) { 4207 if ((codec = ac97_alloc_codec()) == NULL) 4208 return -ENOMEM; 4209 4210 /* initialize some basic codec information, other fields */ 4211 /* will be filled in ac97_probe_codec */ 4212 codec->private_data = card; 4213 codec->id = num_ac97; 4214 4215 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 4216 codec->codec_read = ali_ac97_read; 4217 codec->codec_write = ali_ac97_write; 4218 } else { 4219 codec->codec_read = trident_ac97_get; 4220 codec->codec_write = trident_ac97_set; 4221 } 4222 4223 if (ac97_probe_codec(codec) == 0) 4224 break; 4225 4226 codec->dev_mixer = register_sound_mixer(&trident_mixer_fops, -1); 4227 if (codec->dev_mixer < 0) { 4228 printk(KERN_ERR "trident: couldn't register mixer!\n"); 4229 ac97_release_codec(codec); 4230 break; 4231 } 4232 4233 card->ac97_codec[num_ac97] = codec; 4234 4235 /* if there is no secondary codec at all, don't probe any more */ 4236 if (!ready_2nd) 4237 break; 4238 } 4239 4240 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 4241 for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) { 4242 if (card->ac97_codec[num_ac97] == NULL) 4243 break; 4244 for (i = 0; i < 64; i++) { 4245 u16 reg = ali_ac97_get(card, num_ac97, i * 2); 4246 card->mixer_regs[i][num_ac97] = reg; 4247 } 4248 } 4249 } 4250 return num_ac97 + 1; 4251} 4252 4253#ifdef SUPPORT_JOYSTICK 4254/* Gameport functions for the cards ADC gameport */ 4255 4256static unsigned char trident_game_read(struct gameport *gameport) 4257{ 4258 struct trident_card *card = gameport->port_data; 4259 4260 return inb(TRID_REG(card, T4D_GAME_LEG)); 4261} 4262 4263static void trident_game_trigger(struct gameport *gameport) 4264{ 4265 struct trident_card *card = gameport->port_data; 4266 4267 outb(0xff, TRID_REG(card, T4D_GAME_LEG)); 4268} 4269 4270static int trident_game_cooked_read(struct gameport *gameport, 4271 int *axes, int *buttons) 4272{ 4273 struct trident_card *card = gameport->port_data; 4274 int i; 4275 4276 *buttons = (~inb(TRID_REG(card, T4D_GAME_LEG)) >> 4) & 0xf; 4277 4278 for (i = 0; i < 4; i++) { 4279 axes[i] = inw(TRID_REG(card, T4D_GAME_AXD) + i * sizeof (u16)); 4280 if (axes[i] == 0xffff) 4281 axes[i] = -1; 4282 } 4283 4284 return 0; 4285} 4286 4287static int trident_game_open(struct gameport *gameport, int mode) 4288{ 4289 struct trident_card *card = gameport->port_data; 4290 4291 switch (mode) { 4292 case GAMEPORT_MODE_COOKED: 4293 outb(0x80, TRID_REG(card, T4D_GAME_CR)); 4294 msleep(20); 4295 return 0; 4296 case GAMEPORT_MODE_RAW: 4297 outb(0x00, TRID_REG(card, T4D_GAME_CR)); 4298 return 0; 4299 default: 4300 return -1; 4301 } 4302 4303 return 0; 4304} 4305 4306static int __devinit trident_register_gameport(struct trident_card *card) 4307{ 4308 struct gameport *gp; 4309 4310 card->gameport = gp = gameport_allocate_port(); 4311 if (!gp) { 4312 printk(KERN_ERR "trident: can not allocate memory for gameport\n"); 4313 return -ENOMEM; 4314 } 4315 4316 gameport_set_name(gp, "Trident 4DWave"); 4317 gameport_set_phys(gp, "pci%s/gameport0", pci_name(card->pci_dev)); 4318 gp->read = trident_game_read; 4319 gp->trigger = trident_game_trigger; 4320 gp->cooked_read = trident_game_cooked_read; 4321 gp->open = trident_game_open; 4322 gp->fuzz = 64; 4323 gp->port_data = card; 4324 4325 gameport_register_port(gp); 4326 4327 return 0; 4328} 4329 4330static inline void trident_unregister_gameport(struct trident_card *card) 4331{ 4332 if (card->gameport) 4333 gameport_unregister_port(card->gameport); 4334} 4335 4336#else 4337static inline int trident_register_gameport(struct trident_card *card) { return -ENOSYS; } 4338static inline void trident_unregister_gameport(struct trident_card *card) { } 4339#endif /* SUPPORT_JOYSTICK */ 4340 4341/* install the driver, we do not allocate hardware channel nor DMA buffer */ 4342/* now, they are defered until "ACCESS" time (in prog_dmabuf called by */ 4343/* open/read/write/ioctl/mmap) */ 4344static int __devinit 4345trident_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id) 4346{ 4347 unsigned long iobase; 4348 struct trident_card *card; 4349 u8 bits; 4350 u8 revision; 4351 int i = 0; 4352 u16 temp; 4353 struct pci_dev *pci_dev_m1533 = NULL; 4354 int rc = -ENODEV; 4355 u64 dma_mask; 4356 4357 if (pci_enable_device(pci_dev)) 4358 goto out; 4359 4360 if (pci_dev->device == PCI_DEVICE_ID_ALI_5451) 4361 dma_mask = ALI_DMA_MASK; 4362 else 4363 dma_mask = TRIDENT_DMA_MASK; 4364 if (pci_set_dma_mask(pci_dev, dma_mask)) { 4365 printk(KERN_ERR "trident: architecture does not support" 4366 " %s PCI busmaster DMA\n", 4367 pci_dev->device == PCI_DEVICE_ID_ALI_5451 ? 4368 "32-bit" : "30-bit"); 4369 goto out; 4370 } 4371 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision); 4372 4373 if (pci_id->device == PCI_DEVICE_ID_INTERG_5050) 4374 iobase = pci_resource_start(pci_dev, 1); 4375 else 4376 iobase = pci_resource_start(pci_dev, 0); 4377 4378 if (!request_region(iobase, 256, card_names[pci_id->driver_data])) { 4379 printk(KERN_ERR "trident: can't allocate I/O space at " 4380 "0x%4.4lx\n", iobase); 4381 goto out; 4382 } 4383 4384 rc = -ENOMEM; 4385 if ((card = kzalloc(sizeof(*card), GFP_KERNEL)) == NULL) { 4386 printk(KERN_ERR "trident: out of memory\n"); 4387 goto out_release_region; 4388 } 4389 4390 init_timer(&card->timer); 4391 card->iobase = iobase; 4392 card->pci_dev = pci_dev_get(pci_dev); 4393 card->pci_id = pci_id->device; 4394 card->revision = revision; 4395 card->irq = pci_dev->irq; 4396 card->next = devs; 4397 card->magic = TRIDENT_CARD_MAGIC; 4398 card->banks[BANK_A].addresses = &bank_a_addrs; 4399 card->banks[BANK_A].bitmap = 0UL; 4400 card->banks[BANK_B].addresses = &bank_b_addrs; 4401 card->banks[BANK_B].bitmap = 0UL; 4402 4403 mutex_init(&card->open_mutex); 4404 spin_lock_init(&card->lock); 4405 init_timer(&card->timer); 4406 4407 devs = card; 4408 4409 pci_set_master(pci_dev); 4410 4411 printk(KERN_INFO "trident: %s found at IO 0x%04lx, IRQ %d\n", 4412 card_names[pci_id->driver_data], card->iobase, card->irq); 4413 4414 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 4415 /* ALi channel Management */ 4416 card->alloc_pcm_channel = ali_alloc_pcm_channel; 4417 card->alloc_rec_pcm_channel = ali_alloc_rec_pcm_channel; 4418 card->free_pcm_channel = ali_free_pcm_channel; 4419 4420 card->address_interrupt = ali_address_interrupt; 4421 4422 /* Added by Matt Wu 01-05-2001 for spdif in */ 4423 card->multi_channel_use_count = 0; 4424 card->rec_channel_use_count = 0; 4425 4426 /* ALi SPDIF OUT function */ 4427 if (card->revision == ALI_5451_V02) { 4428 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT); 4429 res = create_proc_entry("ALi5451", 0, NULL); 4430 if (res) { 4431 res->write_proc = ali_write_proc; 4432 res->data = card; 4433 } 4434 } 4435 4436 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */ 4437 card->hwvolctl = 0; 4438 pci_dev_m1533 = pci_find_device(PCI_VENDOR_ID_AL, 4439 PCI_DEVICE_ID_AL_M1533, 4440 pci_dev_m1533); 4441 rc = -ENODEV; 4442 if (pci_dev_m1533 == NULL) 4443 goto out_proc_fs; 4444 pci_read_config_byte(pci_dev_m1533, 0x63, &bits); 4445 if (bits & (1 << 5)) 4446 card->hwvolctl = 1; 4447 if (card->hwvolctl) { 4448 /* Clear m1533 pci cfg 78h bit 30 to zero, which makes 4449 GPIO11/12/13 work as ACGP_UP/DOWN/MUTE. */ 4450 pci_read_config_byte(pci_dev_m1533, 0x7b, &bits); 4451 bits &= 0xbf; /*clear bit 6 */ 4452 pci_write_config_byte(pci_dev_m1533, 0x7b, bits); 4453 } 4454 } else if (card->pci_id == PCI_DEVICE_ID_INTERG_5050) { 4455 card->alloc_pcm_channel = cyber_alloc_pcm_channel; 4456 card->alloc_rec_pcm_channel = cyber_alloc_pcm_channel; 4457 card->free_pcm_channel = cyber_free_pcm_channel; 4458 card->address_interrupt = cyber_address_interrupt; 4459 cyber_init_ritual(card); 4460 } else { 4461 card->alloc_pcm_channel = trident_alloc_pcm_channel; 4462 card->alloc_rec_pcm_channel = trident_alloc_pcm_channel; 4463 card->free_pcm_channel = trident_free_pcm_channel; 4464 card->address_interrupt = trident_address_interrupt; 4465 } 4466 4467 /* claim our irq */ 4468 rc = -ENODEV; 4469 if (request_irq(card->irq, &trident_interrupt, IRQF_SHARED, 4470 card_names[pci_id->driver_data], card)) { 4471 printk(KERN_ERR "trident: unable to allocate irq %d\n", 4472 card->irq); 4473 goto out_proc_fs; 4474 } 4475 /* register /dev/dsp */ 4476 if ((card->dev_audio = register_sound_dsp(&trident_audio_fops, -1)) < 0) { 4477 printk(KERN_ERR "trident: couldn't register DSP device!\n"); 4478 goto out_free_irq; 4479 } 4480 card->mixer_regs_ready = 0; 4481 /* initialize AC97 codec and register /dev/mixer */ 4482 if (trident_ac97_init(card) <= 0) { 4483 /* unregister audio devices */ 4484 for (i = 0; i < NR_AC97; i++) { 4485 if (card->ac97_codec[i] != NULL) { 4486 struct ac97_codec* codec = card->ac97_codec[i]; 4487 unregister_sound_mixer(codec->dev_mixer); 4488 ac97_release_codec(codec); 4489 } 4490 } 4491 goto out_unregister_sound_dsp; 4492 } 4493 card->mixer_regs_ready = 1; 4494 outl(0x00, TRID_REG(card, T4D_MUSICVOL_WAVEVOL)); 4495 4496 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 4497 /* Add H/W Volume Control By Matt Wu Jul. 06, 2001 */ 4498 if (card->hwvolctl) { 4499 /* Enable GPIO IRQ (MISCINT bit 18h) */ 4500 temp = inw(TRID_REG(card, T4D_MISCINT + 2)); 4501 temp |= 0x0004; 4502 outw(temp, TRID_REG(card, T4D_MISCINT + 2)); 4503 4504 /* Enable H/W Volume Control GLOVAL CONTROL bit 0 */ 4505 temp = inw(TRID_REG(card, ALI_GLOBAL_CONTROL)); 4506 temp |= 0x0001; 4507 outw(temp, TRID_REG(card, ALI_GLOBAL_CONTROL)); 4508 4509 } 4510 if (card->revision == ALI_5451_V02) 4511 ali_close_multi_channels(); 4512 /* edited by HMSEO for GT sound */ 4513#if defined(CONFIG_ALPHA_NAUTILUS) || defined(CONFIG_ALPHA_GENERIC) 4514 { 4515 u16 ac97_data; 4516 extern struct hwrpb_struct *hwrpb; 4517 4518 if ((hwrpb->sys_type) == 201) { 4519 printk(KERN_INFO "trident: Running on Alpha system " 4520 "type Nautilus\n"); 4521 ac97_data = ali_ac97_get(card, 0, AC97_POWER_CONTROL); 4522 ali_ac97_set(card, 0, AC97_POWER_CONTROL, 4523 ac97_data | ALI_EAPD_POWER_DOWN); 4524 } 4525 } 4526#endif /* CONFIG_ALPHA_NAUTILUS || CONFIG_ALPHA_GENERIC */ 4527 /* edited by HMSEO for GT sound */ 4528 } 4529 rc = 0; 4530 pci_set_drvdata(pci_dev, card); 4531 4532 /* Enable Address Engine Interrupts */ 4533 trident_enable_loop_interrupts(card); 4534 4535 /* Register gameport */ 4536 trident_register_gameport(card); 4537 4538out: 4539 return rc; 4540 4541out_unregister_sound_dsp: 4542 unregister_sound_dsp(card->dev_audio); 4543out_free_irq: 4544 free_irq(card->irq, card); 4545out_proc_fs: 4546 pci_dev_put(card->pci_dev); 4547 if (res) { 4548 remove_proc_entry("ALi5451", NULL); 4549 res = NULL; 4550 } 4551 kfree(card); 4552 devs = NULL; 4553out_release_region: 4554 release_region(iobase, 256); 4555 return rc; 4556} 4557 4558static void __devexit 4559trident_remove(struct pci_dev *pci_dev) 4560{ 4561 int i; 4562 struct trident_card *card = pci_get_drvdata(pci_dev); 4563 4564 /* 4565 * Kill running timers before unload. We can't have them 4566 * going off after rmmod! 4567 */ 4568 if (card->hwvolctl) 4569 del_timer_sync(&card->timer); 4570 4571 /* ALi S/PDIF and Power Management */ 4572 if (card->pci_id == PCI_DEVICE_ID_ALI_5451) { 4573 ali_setup_spdif_out(card, ALI_PCM_TO_SPDIF_OUT); 4574 ali_disable_special_channel(card, ALI_SPDIF_OUT_CHANNEL); 4575 ali_disable_spdif_in(card); 4576 remove_proc_entry("ALi5451", NULL); 4577 } 4578 4579 /* Unregister gameport */ 4580 trident_unregister_gameport(card); 4581 4582 /* Kill interrupts, and SP/DIF */ 4583 trident_disable_loop_interrupts(card); 4584 4585 /* free hardware resources */ 4586 free_irq(card->irq, card); 4587 release_region(card->iobase, 256); 4588 4589 /* unregister audio devices */ 4590 for (i = 0; i < NR_AC97; i++) 4591 if (card->ac97_codec[i] != NULL) { 4592 unregister_sound_mixer(card->ac97_codec[i]->dev_mixer); 4593 ac97_release_codec(card->ac97_codec[i]); 4594 } 4595 unregister_sound_dsp(card->dev_audio); 4596 4597 pci_set_drvdata(pci_dev, NULL); 4598 pci_dev_put(card->pci_dev); 4599 kfree(card); 4600} 4601 4602MODULE_AUTHOR("Alan Cox, Aaron Holtzman, Ollie Lho, Ching Ling Lee, Muli Ben-Yehuda"); 4603MODULE_DESCRIPTION("Trident 4DWave/SiS 7018/ALi 5451 and Tvia/IGST CyberPro5050 PCI " 4604 "Audio Driver"); 4605MODULE_LICENSE("GPL"); 4606 4607#define TRIDENT_MODULE_NAME "trident" 4608 4609static struct pci_driver trident_pci_driver = { 4610 .name = TRIDENT_MODULE_NAME, 4611 .id_table = trident_pci_tbl, 4612 .probe = trident_probe, 4613 .remove = __devexit_p(trident_remove), 4614#ifdef CONFIG_PM 4615 .suspend = trident_suspend, 4616 .resume = trident_resume 4617#endif 4618}; 4619 4620static int __init 4621trident_init_module(void) 4622{ 4623 printk(KERN_INFO "Trident 4DWave/SiS 7018/ALi 5451,Tvia CyberPro " 4624 "5050 PCI Audio, version " DRIVER_VERSION ", " __TIME__ " " 4625 __DATE__ "\n"); 4626 4627 return pci_register_driver(&trident_pci_driver); 4628} 4629 4630static void __exit 4631trident_cleanup_module(void) 4632{ 4633 pci_unregister_driver(&trident_pci_driver); 4634} 4635 4636module_init(trident_init_module); 4637module_exit(trident_cleanup_module); 4638