1/* 2 * Routines for control of the AK4117 via 4-wire serial interface 3 * IEC958 (S/PDIF) receiver by Asahi Kasei 4 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 5 * 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23#include <sound/driver.h> 24#include <linux/slab.h> 25#include <linux/delay.h> 26#include <sound/core.h> 27#include <sound/control.h> 28#include <sound/pcm.h> 29#include <sound/ak4117.h> 30#include <sound/asoundef.h> 31 32MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); 33MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei"); 34MODULE_LICENSE("GPL"); 35 36#define AK4117_ADDR 0x00 /* fixed address */ 37 38static void snd_ak4117_timer(unsigned long data); 39 40static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val) 41{ 42 ak4117->write(ak4117->private_data, reg, val); 43 if (reg < sizeof(ak4117->regmap)) 44 ak4117->regmap[reg] = val; 45} 46 47static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg) 48{ 49 return ak4117->read(ak4117->private_data, reg); 50} 51 52 53static void snd_ak4117_free(struct ak4117 *chip) 54{ 55 del_timer(&chip->timer); 56 kfree(chip); 57} 58 59static int snd_ak4117_dev_free(struct snd_device *device) 60{ 61 struct ak4117 *chip = device->device_data; 62 snd_ak4117_free(chip); 63 return 0; 64} 65 66int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write, 67 const unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117) 68{ 69 struct ak4117 *chip; 70 int err = 0; 71 unsigned char reg; 72 static struct snd_device_ops ops = { 73 .dev_free = snd_ak4117_dev_free, 74 }; 75 76 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 77 if (chip == NULL) 78 return -ENOMEM; 79 spin_lock_init(&chip->lock); 80 chip->card = card; 81 chip->read = read; 82 chip->write = write; 83 chip->private_data = private_data; 84 init_timer(&chip->timer); 85 chip->timer.data = (unsigned long)chip; 86 chip->timer.function = snd_ak4117_timer; 87 88 for (reg = 0; reg < 5; reg++) 89 chip->regmap[reg] = pgm[reg]; 90 snd_ak4117_reinit(chip); 91 92 chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC); 93 chip->rcs1 = reg_read(chip, AK4117_REG_RCS1); 94 chip->rcs2 = reg_read(chip, AK4117_REG_RCS2); 95 96 if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0) 97 goto __fail; 98 99 if (r_ak4117) 100 *r_ak4117 = chip; 101 return 0; 102 103 __fail: 104 snd_ak4117_free(chip); 105 return err < 0 ? err : -EIO; 106} 107 108void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val) 109{ 110 if (reg >= 5) 111 return; 112 reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val); 113} 114 115void snd_ak4117_reinit(struct ak4117 *chip) 116{ 117 unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg; 118 119 del_timer(&chip->timer); 120 chip->init = 1; 121 /* bring the chip to reset state and powerdown state */ 122 reg_write(chip, AK4117_REG_PWRDN, 0); 123 udelay(200); 124 /* release reset, but leave powerdown */ 125 reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN); 126 udelay(200); 127 for (reg = 1; reg < 5; reg++) 128 reg_write(chip, reg, chip->regmap[reg]); 129 /* release powerdown, everything is initialized now */ 130 reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN); 131 chip->init = 0; 132 chip->timer.expires = 1 + jiffies; 133 add_timer(&chip->timer); 134} 135 136static unsigned int external_rate(unsigned char rcs1) 137{ 138 switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) { 139 case AK4117_FS_32000HZ: return 32000; 140 case AK4117_FS_44100HZ: return 44100; 141 case AK4117_FS_48000HZ: return 48000; 142 case AK4117_FS_88200HZ: return 88200; 143 case AK4117_FS_96000HZ: return 96000; 144 case AK4117_FS_176400HZ: return 176400; 145 case AK4117_FS_192000HZ: return 192000; 146 default: return 0; 147 } 148} 149 150static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol, 151 struct snd_ctl_elem_info *uinfo) 152{ 153 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 154 uinfo->count = 1; 155 uinfo->value.integer.min = 0; 156 uinfo->value.integer.max = LONG_MAX; 157 return 0; 158} 159 160static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol, 161 struct snd_ctl_elem_value *ucontrol) 162{ 163 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 164 long *ptr; 165 166 spin_lock_irq(&chip->lock); 167 ptr = (long *)(((char *)chip) + kcontrol->private_value); 168 ucontrol->value.integer.value[0] = *ptr; 169 *ptr = 0; 170 spin_unlock_irq(&chip->lock); 171 return 0; 172} 173 174static int snd_ak4117_in_bit_info(struct snd_kcontrol *kcontrol, 175 struct snd_ctl_elem_info *uinfo) 176{ 177 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 178 uinfo->count = 1; 179 uinfo->value.integer.min = 0; 180 uinfo->value.integer.max = 1; 181 return 0; 182} 183 184static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol, 185 struct snd_ctl_elem_value *ucontrol) 186{ 187 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 188 unsigned char reg = kcontrol->private_value & 0xff; 189 unsigned char bit = (kcontrol->private_value >> 8) & 0xff; 190 unsigned char inv = (kcontrol->private_value >> 31) & 1; 191 192 ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv; 193 return 0; 194} 195 196static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol, 197 struct snd_ctl_elem_info *uinfo) 198{ 199 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 200 uinfo->count = 1; 201 uinfo->value.integer.min = 0; 202 uinfo->value.integer.max = 1; 203 return 0; 204} 205 206static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol, 207 struct snd_ctl_elem_value *ucontrol) 208{ 209 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 210 211 ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0; 212 return 0; 213} 214 215static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol, 216 struct snd_ctl_elem_value *ucontrol) 217{ 218 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 219 int change; 220 u8 old_val; 221 222 spin_lock_irq(&chip->lock); 223 old_val = chip->regmap[AK4117_REG_IO]; 224 change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0); 225 if (change) 226 reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0)); 227 spin_unlock_irq(&chip->lock); 228 return change; 229} 230 231static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol, 232 struct snd_ctl_elem_info *uinfo) 233{ 234 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 235 uinfo->count = 1; 236 uinfo->value.integer.min = 0; 237 uinfo->value.integer.max = 192000; 238 return 0; 239} 240 241static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol, 242 struct snd_ctl_elem_value *ucontrol) 243{ 244 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 245 246 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1)); 247 return 0; 248} 249 250static int snd_ak4117_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 251{ 252 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 253 uinfo->count = 1; 254 return 0; 255} 256 257static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol, 258 struct snd_ctl_elem_value *ucontrol) 259{ 260 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 261 unsigned i; 262 263 for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++) 264 ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i); 265 return 0; 266} 267 268static int snd_ak4117_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 269{ 270 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 271 uinfo->count = 1; 272 return 0; 273} 274 275static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol, 276 struct snd_ctl_elem_value *ucontrol) 277{ 278 memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE); 279 return 0; 280} 281 282static int snd_ak4117_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 283{ 284 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 285 uinfo->value.integer.min = 0; 286 uinfo->value.integer.max = 0xffff; 287 uinfo->count = 4; 288 return 0; 289} 290 291static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol, 292 struct snd_ctl_elem_value *ucontrol) 293{ 294 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 295 unsigned short tmp; 296 297 ucontrol->value.integer.value[0] = 0xf8f2; 298 ucontrol->value.integer.value[1] = 0x4e1f; 299 tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8); 300 ucontrol->value.integer.value[2] = tmp; 301 tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8); 302 ucontrol->value.integer.value[3] = tmp; 303 return 0; 304} 305 306static int snd_ak4117_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 307{ 308 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 309 uinfo->count = AK4117_REG_QSUB_SIZE; 310 return 0; 311} 312 313static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol, 314 struct snd_ctl_elem_value *ucontrol) 315{ 316 struct ak4117 *chip = snd_kcontrol_chip(kcontrol); 317 unsigned i; 318 319 for (i = 0; i < AK4117_REG_QSUB_SIZE; i++) 320 ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i); 321 return 0; 322} 323 324/* Don't forget to change AK4117_CONTROLS define!!! */ 325static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = { 326{ 327 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 328 .name = "IEC958 Parity Errors", 329 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 330 .info = snd_ak4117_in_error_info, 331 .get = snd_ak4117_in_error_get, 332 .private_value = offsetof(struct ak4117, parity_errors), 333}, 334{ 335 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 336 .name = "IEC958 V-Bit Errors", 337 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 338 .info = snd_ak4117_in_error_info, 339 .get = snd_ak4117_in_error_get, 340 .private_value = offsetof(struct ak4117, v_bit_errors), 341}, 342{ 343 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 344 .name = "IEC958 C-CRC Errors", 345 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 346 .info = snd_ak4117_in_error_info, 347 .get = snd_ak4117_in_error_get, 348 .private_value = offsetof(struct ak4117, ccrc_errors), 349}, 350{ 351 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 352 .name = "IEC958 Q-CRC Errors", 353 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 354 .info = snd_ak4117_in_error_info, 355 .get = snd_ak4117_in_error_get, 356 .private_value = offsetof(struct ak4117, qcrc_errors), 357}, 358{ 359 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 360 .name = "IEC958 External Rate", 361 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 362 .info = snd_ak4117_rate_info, 363 .get = snd_ak4117_rate_get, 364}, 365{ 366 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 367 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK), 368 .access = SNDRV_CTL_ELEM_ACCESS_READ, 369 .info = snd_ak4117_spdif_mask_info, 370 .get = snd_ak4117_spdif_mask_get, 371}, 372{ 373 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 374 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT), 375 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 376 .info = snd_ak4117_spdif_info, 377 .get = snd_ak4117_spdif_get, 378}, 379{ 380 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 381 .name = "IEC958 Preample Capture Default", 382 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 383 .info = snd_ak4117_spdif_pinfo, 384 .get = snd_ak4117_spdif_pget, 385}, 386{ 387 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 388 .name = "IEC958 Q-subcode Capture Default", 389 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 390 .info = snd_ak4117_spdif_qinfo, 391 .get = snd_ak4117_spdif_qget, 392}, 393{ 394 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 395 .name = "IEC958 Audio", 396 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 397 .info = snd_ak4117_in_bit_info, 398 .get = snd_ak4117_in_bit_get, 399 .private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0, 400}, 401{ 402 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 403 .name = "IEC958 Non-PCM Bitstream", 404 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 405 .info = snd_ak4117_in_bit_info, 406 .get = snd_ak4117_in_bit_get, 407 .private_value = (5<<8) | AK4117_REG_RCS1, 408}, 409{ 410 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 411 .name = "IEC958 DTS Bitstream", 412 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 413 .info = snd_ak4117_in_bit_info, 414 .get = snd_ak4117_in_bit_get, 415 .private_value = (6<<8) | AK4117_REG_RCS1, 416}, 417{ 418 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 419 .name = "AK4117 Input Select", 420 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE, 421 .info = snd_ak4117_rx_info, 422 .get = snd_ak4117_rx_get, 423 .put = snd_ak4117_rx_put, 424} 425}; 426 427int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *cap_substream) 428{ 429 struct snd_kcontrol *kctl; 430 unsigned int idx; 431 int err; 432 433 snd_assert(cap_substream, return -EINVAL); 434 ak4117->substream = cap_substream; 435 for (idx = 0; idx < AK4117_CONTROLS; idx++) { 436 kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117); 437 if (kctl == NULL) 438 return -ENOMEM; 439 kctl->id.device = cap_substream->pcm->device; 440 kctl->id.subdevice = cap_substream->number; 441 err = snd_ctl_add(ak4117->card, kctl); 442 if (err < 0) 443 return err; 444 ak4117->kctls[idx] = kctl; 445 } 446 return 0; 447} 448 449int snd_ak4117_external_rate(struct ak4117 *ak4117) 450{ 451 unsigned char rcs1; 452 453 rcs1 = reg_read(ak4117, AK4117_REG_RCS1); 454 return external_rate(rcs1); 455} 456 457int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags) 458{ 459 struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL; 460 unsigned long _flags; 461 int res = 0; 462 unsigned char rcs0, rcs1, rcs2; 463 unsigned char c0, c1; 464 465 rcs1 = reg_read(ak4117, AK4117_REG_RCS1); 466 if (flags & AK4117_CHECK_NO_STAT) 467 goto __rate; 468 rcs0 = reg_read(ak4117, AK4117_REG_RCS0); 469 rcs2 = reg_read(ak4117, AK4117_REG_RCS2); 470 // printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2); 471 spin_lock_irqsave(&ak4117->lock, _flags); 472 if (rcs0 & AK4117_PAR) 473 ak4117->parity_errors++; 474 if (rcs0 & AK4117_V) 475 ak4117->v_bit_errors++; 476 if (rcs2 & AK4117_CCRC) 477 ak4117->ccrc_errors++; 478 if (rcs2 & AK4117_QCRC) 479 ak4117->qcrc_errors++; 480 c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^ 481 (rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)); 482 c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^ 483 (rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)); 484 ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC); 485 ak4117->rcs1 = rcs1; 486 ak4117->rcs2 = rcs2; 487 spin_unlock_irqrestore(&ak4117->lock, _flags); 488 489 if (rcs0 & AK4117_PAR) 490 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id); 491 if (rcs0 & AK4117_V) 492 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id); 493 if (rcs2 & AK4117_CCRC) 494 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id); 495 if (rcs2 & AK4117_QCRC) 496 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id); 497 498 /* rate change */ 499 if (c1 & 0x0f) 500 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id); 501 502 if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT)) 503 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id); 504 if (c0 & AK4117_QINT) 505 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id); 506 507 if (c0 & AK4117_AUDION) 508 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id); 509 if (c1 & AK4117_NPCM) 510 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id); 511 if (c1 & AK4117_DTSCD) 512 snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id); 513 514 if (ak4117->change_callback && (c0 | c1) != 0) 515 ak4117->change_callback(ak4117, c0, c1); 516 517 __rate: 518 /* compare rate */ 519 res = external_rate(rcs1); 520 if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) { 521 snd_pcm_stream_lock_irqsave(ak4117->substream, _flags); 522 if (snd_pcm_running(ak4117->substream)) { 523 // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res); 524 snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING); 525 wake_up(&runtime->sleep); 526 res = 1; 527 } 528 snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags); 529 } 530 return res; 531} 532 533static void snd_ak4117_timer(unsigned long data) 534{ 535 struct ak4117 *chip = (struct ak4117 *)data; 536 537 if (chip->init) 538 return; 539 snd_ak4117_check_rate_and_errors(chip, 0); 540 chip->timer.expires = 1 + jiffies; 541 add_timer(&chip->timer); 542} 543 544EXPORT_SYMBOL(snd_ak4117_create); 545EXPORT_SYMBOL(snd_ak4117_reg_write); 546EXPORT_SYMBOL(snd_ak4117_reinit); 547EXPORT_SYMBOL(snd_ak4117_build); 548EXPORT_SYMBOL(snd_ak4117_external_rate); 549EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors); 550