1#ifndef _TDFX_H 2#define _TDFX_H 3 4/* membase0 register offsets */ 5#define STATUS 0x00 6#define PCIINIT0 0x04 7#define SIPMONITOR 0x08 8#define LFBMEMORYCONFIG 0x0c 9#define MISCINIT0 0x10 10#define MISCINIT1 0x14 11#define DRAMINIT0 0x18 12#define DRAMINIT1 0x1c 13#define AGPINIT 0x20 14#define TMUGBEINIT 0x24 15#define VGAINIT0 0x28 16#define VGAINIT1 0x2c 17#define DRAMCOMMAND 0x30 18#define DRAMDATA 0x34 19/* reserved 0x38 */ 20/* reserved 0x3c */ 21#define PLLCTRL0 0x40 22#define PLLCTRL1 0x44 23#define PLLCTRL2 0x48 24#define DACMODE 0x4c 25#define DACADDR 0x50 26#define DACDATA 0x54 27#define RGBMAXDELTA 0x58 28#define VIDPROCCFG 0x5c 29#define HWCURPATADDR 0x60 30#define HWCURLOC 0x64 31#define HWCURC0 0x68 32#define HWCURC1 0x6c 33#define VIDINFORMAT 0x70 34#define VIDINSTATUS 0x74 35#define VIDSERPARPORT 0x78 36#define VIDINXDELTA 0x7c 37#define VIDININITERR 0x80 38#define VIDINYDELTA 0x84 39#define VIDPIXBUFTHOLD 0x88 40#define VIDCHRMIN 0x8c 41#define VIDCHRMAX 0x90 42#define VIDCURLIN 0x94 43#define VIDSCREENSIZE 0x98 44#define VIDOVRSTARTCRD 0x9c 45#define VIDOVRENDCRD 0xa0 46#define VIDOVRDUDX 0xa4 47#define VIDOVRDUDXOFF 0xa8 48#define VIDOVRDVDY 0xac 49/* ... */ 50#define VIDOVRDVDYOFF 0xe0 51#define VIDDESKSTART 0xe4 52#define VIDDESKSTRIDE 0xe8 53#define VIDINADDR0 0xec 54#define VIDINADDR1 0xf0 55#define VIDINADDR2 0xf4 56#define VIDINSTRIDE 0xf8 57#define VIDCUROVRSTART 0xfc 58 59#define INTCTRL (0x00100000 + 0x04) 60#define CLIP0MIN (0x00100000 + 0x08) 61#define CLIP0MAX (0x00100000 + 0x0c) 62#define DSTBASE (0x00100000 + 0x10) 63#define DSTFORMAT (0x00100000 + 0x14) 64#define SRCBASE (0x00100000 + 0x34) 65#define COMMANDEXTRA_2D (0x00100000 + 0x38) 66#define CLIP1MIN (0x00100000 + 0x4c) 67#define CLIP1MAX (0x00100000 + 0x50) 68#define SRCFORMAT (0x00100000 + 0x54) 69#define SRCSIZE (0x00100000 + 0x58) 70#define SRCXY (0x00100000 + 0x5c) 71#define COLORBACK (0x00100000 + 0x60) 72#define COLORFORE (0x00100000 + 0x64) 73#define DSTSIZE (0x00100000 + 0x68) 74#define DSTXY (0x00100000 + 0x6c) 75#define COMMAND_2D (0x00100000 + 0x70) 76#define LAUNCH_2D (0x00100000 + 0x80) 77 78#define COMMAND_3D (0x00200000 + 0x120) 79 80/* register bitfields (not all, only as needed) */ 81 82#define BIT(x) (1UL << (x)) 83 84/* COMMAND_2D reg. values */ 85#define TDFX_ROP_COPY 0xcc // src 86#define TDFX_ROP_INVERT 0x55 // NOT dst 87#define TDFX_ROP_XOR 0x66 // src XOR dst 88 89#define AUTOINC_DSTX BIT(10) 90#define AUTOINC_DSTY BIT(11) 91#define COMMAND_2D_FILLRECT 0x05 92#define COMMAND_2D_S2S_BITBLT 0x01 // screen to screen 93#define COMMAND_2D_H2S_BITBLT 0x03 // host to screen 94 95#define COMMAND_3D_NOP 0x00 96#define STATUS_RETRACE BIT(6) 97#define STATUS_BUSY BIT(9) 98#define MISCINIT1_CLUT_INV BIT(0) 99#define MISCINIT1_2DBLOCK_DIS BIT(15) 100#define DRAMINIT0_SGRAM_NUM BIT(26) 101#define DRAMINIT0_SGRAM_TYPE BIT(27) 102#define DRAMINIT0_SGRAM_TYPE_MASK (BIT(27)|BIT(28)|BIT(29)) 103#define DRAMINIT0_SGRAM_TYPE_SHIFT 27 104#define DRAMINIT1_MEM_SDRAM BIT(30) 105#define VGAINIT0_VGA_DISABLE BIT(0) 106#define VGAINIT0_EXT_TIMING BIT(1) 107#define VGAINIT0_8BIT_DAC BIT(2) 108#define VGAINIT0_EXT_ENABLE BIT(6) 109#define VGAINIT0_WAKEUP_3C3 BIT(8) 110#define VGAINIT0_LEGACY_DISABLE BIT(9) 111#define VGAINIT0_ALT_READBACK BIT(10) 112#define VGAINIT0_FAST_BLINK BIT(11) 113#define VGAINIT0_EXTSHIFTOUT BIT(12) 114#define VGAINIT0_DECODE_3C6 BIT(13) 115#define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22) 116#define VGAINIT1_MASK 0x1fffff 117#define VIDCFG_VIDPROC_ENABLE BIT(0) 118#define VIDCFG_CURS_X11 BIT(1) 119#define VIDCFG_INTERLACE BIT(3) 120#define VIDCFG_HALF_MODE BIT(4) 121#define VIDCFG_DESK_ENABLE BIT(7) 122#define VIDCFG_CLUT_BYPASS BIT(10) 123#define VIDCFG_2X BIT(26) 124#define VIDCFG_HWCURSOR_ENABLE BIT(27) 125#define VIDCFG_PIXFMT_SHIFT 18 126#define DACMODE_2X BIT(0) 127 128/* VGA rubbish, need to change this for multihead support */ 129#define MISC_W 0x3c2 130#define MISC_R 0x3cc 131#define SEQ_I 0x3c4 132#define SEQ_D 0x3c5 133#define CRT_I 0x3d4 134#define CRT_D 0x3d5 135#define ATT_IW 0x3c0 136#define IS1_R 0x3da 137#define GRA_I 0x3ce 138#define GRA_D 0x3cf 139 140#ifdef __KERNEL__ 141 142struct banshee_reg { 143 /* VGA rubbish */ 144 unsigned char att[21]; 145 unsigned char crt[25]; 146 unsigned char gra[ 9]; 147 unsigned char misc[1]; 148 unsigned char seq[ 5]; 149 150 /* Banshee extensions */ 151 unsigned char ext[2]; 152 unsigned long vidcfg; 153 unsigned long vidpll; 154 unsigned long mempll; 155 unsigned long gfxpll; 156 unsigned long dacmode; 157 unsigned long vgainit0; 158 unsigned long vgainit1; 159 unsigned long screensize; 160 unsigned long stride; 161 unsigned long cursloc; 162 unsigned long curspataddr; 163 unsigned long cursc0; 164 unsigned long cursc1; 165 unsigned long startaddr; 166 unsigned long clip0min; 167 unsigned long clip0max; 168 unsigned long clip1min; 169 unsigned long clip1max; 170 unsigned long srcbase; 171 unsigned long dstbase; 172 unsigned long miscinit0; 173}; 174 175struct tdfx_par { 176 u32 max_pixclock; 177 u32 palette[16]; 178 void __iomem *regbase_virt; 179 unsigned long iobase; 180 u32 baseline; 181 182 struct { 183 int w,u,d; 184 unsigned long enable,disable; 185 struct timer_list timer; 186 } hwcursor; 187 188 spinlock_t DAClock; 189}; 190 191#endif /* __KERNEL__ */ 192 193#endif /* _TDFX_H */ 194