1/* 2 * include/asm-xtensa/io.h 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (C) 2001 - 2005 Tensilica Inc. 9 */ 10 11#ifndef _XTENSA_IO_H 12#define _XTENSA_IO_H 13 14#ifdef __KERNEL__ 15#include <asm/byteorder.h> 16 17#include <linux/types.h> 18 19#define XCHAL_KIO_CACHED_VADDR 0xf0000000 20#define XCHAL_KIO_BYPASS_VADDR 0xf8000000 21#define XCHAL_KIO_PADDR 0xf0000000 22#define XCHAL_KIO_SIZE 0x08000000 23 24/* 25 * swap functions to change byte order from little-endian to big-endian and 26 * vice versa. 27 */ 28 29static inline unsigned short _swapw (unsigned short v) 30{ 31 return (v << 8) | (v >> 8); 32} 33 34static inline unsigned int _swapl (unsigned int v) 35{ 36 return (v << 24) | ((v & 0xff00) << 8) | ((v >> 8) & 0xff00) | (v >> 24); 37} 38 39/* 40 * Change virtual addresses to physical addresses and vv. 41 * These are trivial on the 1:1 Linux/Xtensa mapping 42 */ 43 44static inline unsigned long virt_to_phys(volatile void * address) 45{ 46 return __pa(address); 47} 48 49static inline void * phys_to_virt(unsigned long address) 50{ 51 return __va(address); 52} 53 54/* 55 * virt_to_bus and bus_to_virt are deprecated. 56 */ 57 58#define virt_to_bus(x) virt_to_phys(x) 59#define bus_to_virt(x) phys_to_virt(x) 60 61/* 62 * Return the virtual (cached) address for the specified bus memory. 63 * Note that we currently don't support any address outside the KIO segment. 64 */ 65 66static inline void *ioremap(unsigned long offset, unsigned long size) 67{ 68 if (offset >= XCHAL_KIO_PADDR 69 && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE) 70 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR); 71 72 else 73 BUG(); 74} 75 76static inline void *ioremap_nocache(unsigned long offset, unsigned long size) 77{ 78 if (offset >= XCHAL_KIO_PADDR 79 && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE) 80 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR); 81 else 82 BUG(); 83} 84 85static inline void iounmap(void *addr) 86{ 87} 88 89/* 90 * Generic I/O 91 */ 92 93#define readb(addr) \ 94 ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; }) 95#define readw(addr) \ 96 ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; }) 97#define readl(addr) \ 98 ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; }) 99#define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b)) 100#define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b)) 101#define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b)) 102 103static inline __u8 __raw_readb(const volatile void __iomem *addr) 104{ 105 return *(__force volatile __u8 *)(addr); 106} 107static inline __u16 __raw_readw(const volatile void __iomem *addr) 108{ 109 return *(__force volatile __u16 *)(addr); 110} 111static inline __u32 __raw_readl(const volatile void __iomem *addr) 112{ 113 return *(__force volatile __u32 *)(addr); 114} 115static inline void __raw_writeb(__u8 b, volatile void __iomem *addr) 116{ 117 *(__force volatile __u8 *)(addr) = b; 118} 119static inline void __raw_writew(__u16 b, volatile void __iomem *addr) 120{ 121 *(__force volatile __u16 *)(addr) = b; 122} 123static inline void __raw_writel(__u32 b, volatile void __iomem *addr) 124{ 125 *(__force volatile __u32 *)(addr) = b; 126} 127 128/* These are the definitions for the x86 IO instructions 129 * inb/inw/inl/outb/outw/outl, the "string" versions 130 * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions 131 * inb_p/inw_p/... 132 * The macros don't do byte-swapping. 133 */ 134 135#define inb(port) readb((u8 *)((port))) 136#define outb(val, port) writeb((val),(u8 *)((unsigned long)(port))) 137#define inw(port) readw((u16 *)((port))) 138#define outw(val, port) writew((val),(u16 *)((unsigned long)(port))) 139#define inl(port) readl((u32 *)((port))) 140#define outl(val, port) writel((val),(u32 *)((unsigned long)(port))) 141 142#define inb_p(port) inb((port)) 143#define outb_p(val, port) outb((val), (port)) 144#define inw_p(port) inw((port)) 145#define outw_p(val, port) outw((val), (port)) 146#define inl_p(port) inl((port)) 147#define outl_p(val, port) outl((val), (port)) 148 149extern void insb (unsigned long port, void *dst, unsigned long count); 150extern void insw (unsigned long port, void *dst, unsigned long count); 151extern void insl (unsigned long port, void *dst, unsigned long count); 152extern void outsb (unsigned long port, const void *src, unsigned long count); 153extern void outsw (unsigned long port, const void *src, unsigned long count); 154extern void outsl (unsigned long port, const void *src, unsigned long count); 155 156#define IO_SPACE_LIMIT ~0 157 158#define memset_io(a,b,c) memset((void *)(a),(b),(c)) 159#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) 160#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) 161 162/* At this point the Xtensa doesn't provide byte swap instructions */ 163 164#ifdef __XTENSA_EB__ 165# define in_8(addr) (*(u8*)(addr)) 166# define in_le16(addr) _swapw(*(u16*)(addr)) 167# define in_le32(addr) _swapl(*(u32*)(addr)) 168# define out_8(b, addr) *(u8*)(addr) = (b) 169# define out_le16(b, addr) *(u16*)(addr) = _swapw(b) 170# define out_le32(b, addr) *(u32*)(addr) = _swapl(b) 171#elif defined(__XTENSA_EL__) 172# define in_8(addr) (*(u8*)(addr)) 173# define in_le16(addr) (*(u16*)(addr)) 174# define in_le32(addr) (*(u32*)(addr)) 175# define out_8(b, addr) *(u8*)(addr) = (b) 176# define out_le16(b, addr) *(u16*)(addr) = (b) 177# define out_le32(b, addr) *(u32*)(addr) = (b) 178#else 179# error processor byte order undefined! 180#endif 181 182 183/* 184 * Convert a physical pointer to a virtual kernel pointer for /dev/mem access 185 */ 186#define xlate_dev_mem_ptr(p) __va(p) 187 188/* 189 * Convert a virtual cached pointer to an uncached pointer 190 */ 191#define xlate_dev_kmem_ptr(p) p 192 193 194#endif /* __KERNEL__ */ 195 196#endif /* _XTENSA_IO_H */ 197